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63138812 KV |
1 | /* |
2 | * linux/arch/arm/mach-omap2/board-n8x0.c | |
3 | * | |
4 | * Copyright (C) 2005-2009 Nokia Corporation | |
5 | * Author: Juha Yrjola <juha.yrjola@nokia.com> | |
6 | * | |
7 | * Modified from mach-omap2/board-generic.c | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License version 2 as | |
11 | * published by the Free Software Foundation. | |
12 | */ | |
13 | ||
14 | #include <linux/clk.h> | |
15 | #include <linux/delay.h> | |
16 | #include <linux/gpio.h> | |
17 | #include <linux/init.h> | |
18 | #include <linux/io.h> | |
0857ba3c | 19 | #include <linux/irq.h> |
63138812 | 20 | #include <linux/stddef.h> |
9418c65f | 21 | #include <linux/i2c.h> |
63138812 KV |
22 | #include <linux/spi/spi.h> |
23 | #include <linux/usb/musb.h> | |
2203747c | 24 | #include <linux/platform_data/spi-omap2-mcspi.h> |
7bd3b618 | 25 | #include <linux/mfd/menelaus.h> |
366498d4 | 26 | #include <sound/tlv320aic3x.h> |
63138812 KV |
27 | |
28 | #include <asm/mach/arch.h> | |
29 | #include <asm/mach-types.h> | |
30 | ||
4e65331c | 31 | #include "common.h" |
68f39e74 | 32 | #include "mmc.h" |
810ac2a1 | 33 | #include "soc.h" |
e92ce89c | 34 | #include "common-board-devices.h" |
bd8f0fc9 | 35 | |
97b9ad16 FA |
36 | #define TUSB6010_ASYNC_CS 1 |
37 | #define TUSB6010_SYNC_CS 4 | |
38 | #define TUSB6010_GPIO_INT 58 | |
39 | #define TUSB6010_GPIO_ENABLE 0 | |
40 | #define TUSB6010_DMACHAN 0x3f | |
41 | ||
c8f27e97 TL |
42 | #define NOKIA_N810_WIMAX (1 << 2) |
43 | #define NOKIA_N810 (1 << 1) | |
44 | #define NOKIA_N800 (1 << 0) | |
45 | ||
46 | static u32 board_caps; | |
47 | ||
48 | #define board_is_n800() (board_caps & NOKIA_N800) | |
49 | #define board_is_n810() (board_caps & NOKIA_N810) | |
50 | #define board_is_n810_wimax() (board_caps & NOKIA_N810_WIMAX) | |
51 | ||
52 | static void board_check_revision(void) | |
53 | { | |
54 | if (of_have_populated_dt()) { | |
55 | if (of_machine_is_compatible("nokia,n800")) | |
56 | board_caps = NOKIA_N800; | |
57 | else if (of_machine_is_compatible("nokia,n810")) | |
58 | board_caps = NOKIA_N810; | |
59 | else if (of_machine_is_compatible("nokia,n810-wimax")) | |
60 | board_caps = NOKIA_N810_WIMAX; | |
c8f27e97 TL |
61 | } |
62 | ||
63 | if (!board_caps) | |
64 | pr_err("Unknown board\n"); | |
65 | } | |
66 | ||
9a35f876 | 67 | #if defined(CONFIG_USB_MUSB_TUSB6010) || defined(CONFIG_USB_MUSB_TUSB6010_MODULE) |
97b9ad16 FA |
68 | /* |
69 | * Enable or disable power to TUSB6010. When enabling, turn on 3.3 V and | |
70 | * 1.5 V voltage regulators of PM companion chip. Companion chip will then | |
71 | * provide then PGOOD signal to TUSB6010 which will release it from reset. | |
72 | */ | |
73 | static int tusb_set_power(int state) | |
74 | { | |
75 | int i, retval = 0; | |
76 | ||
77 | if (state) { | |
78 | gpio_set_value(TUSB6010_GPIO_ENABLE, 1); | |
79 | msleep(1); | |
80 | ||
81 | /* Wait until TUSB6010 pulls INT pin down */ | |
82 | i = 100; | |
83 | while (i && gpio_get_value(TUSB6010_GPIO_INT)) { | |
84 | msleep(1); | |
85 | i--; | |
86 | } | |
87 | ||
88 | if (!i) { | |
89 | printk(KERN_ERR "tusb: powerup failed\n"); | |
90 | retval = -ENODEV; | |
91 | } | |
92 | } else { | |
93 | gpio_set_value(TUSB6010_GPIO_ENABLE, 0); | |
94 | msleep(10); | |
95 | } | |
96 | ||
97 | return retval; | |
98 | } | |
99 | ||
100 | static struct musb_hdrc_config musb_config = { | |
101 | .multipoint = 1, | |
102 | .dyn_fifo = 1, | |
103 | .num_eps = 16, | |
104 | .ram_bits = 12, | |
105 | }; | |
106 | ||
107 | static struct musb_hdrc_platform_data tusb_data = { | |
97b9ad16 | 108 | .mode = MUSB_OTG, |
97b9ad16 FA |
109 | .set_power = tusb_set_power, |
110 | .min_power = 25, /* x2 = 50 mA drawn from VBUS as peripheral */ | |
111 | .power = 100, /* Max 100 mA VBUS for host mode */ | |
112 | .config = &musb_config, | |
113 | }; | |
114 | ||
115 | static void __init n8x0_usb_init(void) | |
116 | { | |
117 | int ret = 0; | |
118 | static char announce[] __initdata = KERN_INFO "TUSB 6010\n"; | |
119 | ||
120 | /* PM companion chip power control pin */ | |
bc593f5d IG |
121 | ret = gpio_request_one(TUSB6010_GPIO_ENABLE, GPIOF_OUT_INIT_LOW, |
122 | "TUSB6010 enable"); | |
97b9ad16 FA |
123 | if (ret != 0) { |
124 | printk(KERN_ERR "Could not get TUSB power GPIO%i\n", | |
125 | TUSB6010_GPIO_ENABLE); | |
126 | return; | |
127 | } | |
97b9ad16 FA |
128 | tusb_set_power(0); |
129 | ||
130 | ret = tusb6010_setup_interface(&tusb_data, TUSB6010_REFCLK_19, 2, | |
131 | TUSB6010_ASYNC_CS, TUSB6010_SYNC_CS, | |
132 | TUSB6010_GPIO_INT, TUSB6010_DMACHAN); | |
133 | if (ret != 0) | |
134 | goto err; | |
135 | ||
136 | printk(announce); | |
137 | ||
138 | return; | |
139 | ||
140 | err: | |
141 | gpio_free(TUSB6010_GPIO_ENABLE); | |
142 | } | |
143 | #else | |
144 | ||
145 | static void __init n8x0_usb_init(void) {} | |
146 | ||
7c925546 | 147 | #endif /*CONFIG_USB_MUSB_TUSB6010 */ |
97b9ad16 FA |
148 | |
149 | ||
63138812 KV |
150 | static struct omap2_mcspi_device_config p54spi_mcspi_config = { |
151 | .turbo_mode = 0, | |
63138812 KV |
152 | }; |
153 | ||
154 | static struct spi_board_info n800_spi_board_info[] __initdata = { | |
155 | { | |
156 | .modalias = "p54spi", | |
157 | .bus_num = 2, | |
158 | .chip_select = 0, | |
159 | .max_speed_hz = 48000000, | |
160 | .controller_data = &p54spi_mcspi_config, | |
161 | }, | |
162 | }; | |
163 | ||
9418c65f TL |
164 | #if defined(CONFIG_MENELAUS) && \ |
165 | (defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE)) | |
166 | ||
167 | /* | |
168 | * On both N800 and N810, only the first of the two MMC controllers is in use. | |
169 | * The two MMC slots are multiplexed via Menelaus companion chip over I2C. | |
170 | * On N800, both slots are powered via Menelaus. On N810, only one of the | |
171 | * slots is powered via Menelaus. The N810 EMMC is powered via GPIO. | |
172 | * | |
173 | * VMMC slot 1 on both N800 and N810 | |
174 | * VDCDC3_APE and VMCS2_APE slot 2 on N800 | |
175 | * GPIO23 and GPIO9 slot 2 EMMC on N810 | |
176 | * | |
177 | */ | |
178 | #define N8X0_SLOT_SWITCH_GPIO 96 | |
179 | #define N810_EMMC_VSD_GPIO 23 | |
1dea5c6b | 180 | #define N810_EMMC_VIO_GPIO 9 |
9418c65f | 181 | |
49b87c6d TL |
182 | static int slot1_cover_open; |
183 | static int slot2_cover_open; | |
184 | static struct device *mmc_device; | |
185 | ||
9418c65f TL |
186 | static int n8x0_mmc_switch_slot(struct device *dev, int slot) |
187 | { | |
188 | #ifdef CONFIG_MMC_DEBUG | |
189 | dev_dbg(dev, "Choose slot %d\n", slot + 1); | |
190 | #endif | |
191 | gpio_set_value(N8X0_SLOT_SWITCH_GPIO, slot); | |
192 | return 0; | |
193 | } | |
194 | ||
195 | static int n8x0_mmc_set_power_menelaus(struct device *dev, int slot, | |
196 | int power_on, int vdd) | |
197 | { | |
198 | int mV; | |
199 | ||
200 | #ifdef CONFIG_MMC_DEBUG | |
201 | dev_dbg(dev, "Set slot %d power: %s (vdd %d)\n", slot + 1, | |
202 | power_on ? "on" : "off", vdd); | |
203 | #endif | |
204 | if (slot == 0) { | |
205 | if (!power_on) | |
206 | return menelaus_set_vmmc(0); | |
207 | switch (1 << vdd) { | |
208 | case MMC_VDD_33_34: | |
209 | case MMC_VDD_32_33: | |
210 | case MMC_VDD_31_32: | |
211 | mV = 3100; | |
212 | break; | |
213 | case MMC_VDD_30_31: | |
214 | mV = 3000; | |
215 | break; | |
216 | case MMC_VDD_28_29: | |
217 | mV = 2800; | |
218 | break; | |
219 | case MMC_VDD_165_195: | |
220 | mV = 1850; | |
221 | break; | |
222 | default: | |
223 | BUG(); | |
224 | } | |
225 | return menelaus_set_vmmc(mV); | |
226 | } else { | |
227 | if (!power_on) | |
228 | return menelaus_set_vdcdc(3, 0); | |
229 | switch (1 << vdd) { | |
230 | case MMC_VDD_33_34: | |
231 | case MMC_VDD_32_33: | |
232 | mV = 3300; | |
233 | break; | |
234 | case MMC_VDD_30_31: | |
235 | case MMC_VDD_29_30: | |
236 | mV = 3000; | |
237 | break; | |
238 | case MMC_VDD_28_29: | |
239 | case MMC_VDD_27_28: | |
240 | mV = 2800; | |
241 | break; | |
242 | case MMC_VDD_24_25: | |
243 | case MMC_VDD_23_24: | |
244 | mV = 2400; | |
245 | break; | |
246 | case MMC_VDD_22_23: | |
247 | case MMC_VDD_21_22: | |
248 | mV = 2200; | |
249 | break; | |
250 | case MMC_VDD_20_21: | |
251 | mV = 2000; | |
252 | break; | |
253 | case MMC_VDD_165_195: | |
254 | mV = 1800; | |
255 | break; | |
256 | default: | |
257 | BUG(); | |
258 | } | |
259 | return menelaus_set_vdcdc(3, mV); | |
260 | } | |
261 | return 0; | |
262 | } | |
263 | ||
264 | static void n810_set_power_emmc(struct device *dev, | |
265 | int power_on) | |
266 | { | |
267 | dev_dbg(dev, "Set EMMC power %s\n", power_on ? "on" : "off"); | |
268 | ||
269 | if (power_on) { | |
270 | gpio_set_value(N810_EMMC_VSD_GPIO, 1); | |
271 | msleep(1); | |
1dea5c6b | 272 | gpio_set_value(N810_EMMC_VIO_GPIO, 1); |
9418c65f TL |
273 | msleep(1); |
274 | } else { | |
1dea5c6b | 275 | gpio_set_value(N810_EMMC_VIO_GPIO, 0); |
9418c65f TL |
276 | msleep(50); |
277 | gpio_set_value(N810_EMMC_VSD_GPIO, 0); | |
278 | msleep(50); | |
279 | } | |
280 | } | |
281 | ||
282 | static int n8x0_mmc_set_power(struct device *dev, int slot, int power_on, | |
283 | int vdd) | |
284 | { | |
c8f27e97 | 285 | if (board_is_n800() || slot == 0) |
9418c65f TL |
286 | return n8x0_mmc_set_power_menelaus(dev, slot, power_on, vdd); |
287 | ||
288 | n810_set_power_emmc(dev, power_on); | |
289 | ||
290 | return 0; | |
291 | } | |
292 | ||
293 | static int n8x0_mmc_set_bus_mode(struct device *dev, int slot, int bus_mode) | |
294 | { | |
295 | int r; | |
296 | ||
297 | dev_dbg(dev, "Set slot %d bus mode %s\n", slot + 1, | |
298 | bus_mode == MMC_BUSMODE_OPENDRAIN ? "open-drain" : "push-pull"); | |
299 | BUG_ON(slot != 0 && slot != 1); | |
300 | slot++; | |
301 | switch (bus_mode) { | |
302 | case MMC_BUSMODE_OPENDRAIN: | |
303 | r = menelaus_set_mmc_opendrain(slot, 1); | |
304 | break; | |
305 | case MMC_BUSMODE_PUSHPULL: | |
306 | r = menelaus_set_mmc_opendrain(slot, 0); | |
307 | break; | |
308 | default: | |
309 | BUG(); | |
310 | } | |
311 | if (r != 0 && printk_ratelimit()) | |
312 | dev_err(dev, "MMC: unable to set bus mode for slot %d\n", | |
313 | slot); | |
314 | return r; | |
315 | } | |
316 | ||
317 | static int n8x0_mmc_get_cover_state(struct device *dev, int slot) | |
318 | { | |
319 | slot++; | |
320 | BUG_ON(slot != 1 && slot != 2); | |
321 | if (slot == 1) | |
322 | return slot1_cover_open; | |
323 | else | |
324 | return slot2_cover_open; | |
325 | } | |
326 | ||
327 | static void n8x0_mmc_callback(void *data, u8 card_mask) | |
328 | { | |
329 | int bit, *openp, index; | |
330 | ||
c8f27e97 | 331 | if (board_is_n800()) { |
9418c65f TL |
332 | bit = 1 << 1; |
333 | openp = &slot2_cover_open; | |
334 | index = 1; | |
335 | } else { | |
336 | bit = 1; | |
337 | openp = &slot1_cover_open; | |
338 | index = 0; | |
339 | } | |
340 | ||
341 | if (card_mask & bit) | |
342 | *openp = 1; | |
343 | else | |
344 | *openp = 0; | |
345 | ||
d5171102 | 346 | #ifdef CONFIG_MMC_OMAP |
9418c65f | 347 | omap_mmc_notify_cover_event(mmc_device, index, *openp); |
d5171102 TL |
348 | #else |
349 | pr_warn("MMC: notify cover event not available\n"); | |
350 | #endif | |
9418c65f TL |
351 | } |
352 | ||
9418c65f TL |
353 | static int n8x0_mmc_late_init(struct device *dev) |
354 | { | |
355 | int r, bit, *openp; | |
356 | int vs2sel; | |
357 | ||
358 | mmc_device = dev; | |
359 | ||
360 | r = menelaus_set_slot_sel(1); | |
361 | if (r < 0) | |
362 | return r; | |
363 | ||
c8f27e97 | 364 | if (board_is_n800()) |
9418c65f TL |
365 | vs2sel = 0; |
366 | else | |
367 | vs2sel = 2; | |
368 | ||
369 | r = menelaus_set_mmc_slot(2, 0, vs2sel, 1); | |
370 | if (r < 0) | |
371 | return r; | |
372 | ||
373 | n8x0_mmc_set_power(dev, 0, MMC_POWER_ON, 16); /* MMC_VDD_28_29 */ | |
374 | n8x0_mmc_set_power(dev, 1, MMC_POWER_ON, 16); | |
375 | ||
376 | r = menelaus_set_mmc_slot(1, 1, 0, 1); | |
377 | if (r < 0) | |
378 | return r; | |
379 | r = menelaus_set_mmc_slot(2, 1, vs2sel, 1); | |
380 | if (r < 0) | |
381 | return r; | |
382 | ||
383 | r = menelaus_get_slot_pin_states(); | |
384 | if (r < 0) | |
385 | return r; | |
386 | ||
c8f27e97 | 387 | if (board_is_n800()) { |
9418c65f TL |
388 | bit = 1 << 1; |
389 | openp = &slot2_cover_open; | |
390 | } else { | |
391 | bit = 1; | |
392 | openp = &slot1_cover_open; | |
393 | slot2_cover_open = 0; | |
394 | } | |
395 | ||
396 | /* All slot pin bits seem to be inversed until first switch change */ | |
397 | if (r == 0xf || r == (0xf & ~bit)) | |
398 | r = ~r; | |
399 | ||
400 | if (r & bit) | |
401 | *openp = 1; | |
402 | else | |
403 | *openp = 0; | |
404 | ||
405 | r = menelaus_register_mmc_callback(n8x0_mmc_callback, NULL); | |
406 | ||
407 | return r; | |
408 | } | |
409 | ||
410 | static void n8x0_mmc_shutdown(struct device *dev) | |
411 | { | |
412 | int vs2sel; | |
413 | ||
c8f27e97 | 414 | if (board_is_n800()) |
9418c65f TL |
415 | vs2sel = 0; |
416 | else | |
417 | vs2sel = 2; | |
418 | ||
419 | menelaus_set_mmc_slot(1, 0, 0, 0); | |
420 | menelaus_set_mmc_slot(2, 0, vs2sel, 0); | |
421 | } | |
422 | ||
423 | static void n8x0_mmc_cleanup(struct device *dev) | |
424 | { | |
425 | menelaus_unregister_mmc_callback(); | |
426 | ||
427 | gpio_free(N8X0_SLOT_SWITCH_GPIO); | |
428 | ||
c8f27e97 | 429 | if (board_is_n810()) { |
9418c65f | 430 | gpio_free(N810_EMMC_VSD_GPIO); |
1dea5c6b | 431 | gpio_free(N810_EMMC_VIO_GPIO); |
9418c65f TL |
432 | } |
433 | } | |
434 | ||
435 | /* | |
436 | * MMC controller1 has two slots that are multiplexed via I2C. | |
437 | * MMC controller2 is not in use. | |
438 | */ | |
439 | static struct omap_mmc_platform_data mmc1_data = { | |
fa590c92 | 440 | .nr_slots = 0, |
9418c65f TL |
441 | .switch_slot = n8x0_mmc_switch_slot, |
442 | .init = n8x0_mmc_late_init, | |
443 | .cleanup = n8x0_mmc_cleanup, | |
444 | .shutdown = n8x0_mmc_shutdown, | |
445 | .max_freq = 24000000, | |
9418c65f TL |
446 | .slots[0] = { |
447 | .wires = 4, | |
448 | .set_power = n8x0_mmc_set_power, | |
449 | .set_bus_mode = n8x0_mmc_set_bus_mode, | |
450 | .get_cover_state = n8x0_mmc_get_cover_state, | |
451 | .ocr_mask = MMC_VDD_165_195 | MMC_VDD_30_31 | | |
452 | MMC_VDD_32_33 | MMC_VDD_33_34, | |
453 | .name = "internal", | |
454 | }, | |
455 | .slots[1] = { | |
456 | .set_power = n8x0_mmc_set_power, | |
457 | .set_bus_mode = n8x0_mmc_set_bus_mode, | |
458 | .get_cover_state = n8x0_mmc_get_cover_state, | |
459 | .ocr_mask = MMC_VDD_165_195 | MMC_VDD_20_21 | | |
460 | MMC_VDD_21_22 | MMC_VDD_22_23 | | |
461 | MMC_VDD_23_24 | MMC_VDD_24_25 | | |
462 | MMC_VDD_27_28 | MMC_VDD_28_29 | | |
463 | MMC_VDD_29_30 | MMC_VDD_30_31 | | |
464 | MMC_VDD_32_33 | MMC_VDD_33_34, | |
465 | .name = "external", | |
466 | }, | |
467 | }; | |
468 | ||
469 | static struct omap_mmc_platform_data *mmc_data[OMAP24XX_NR_MMC]; | |
470 | ||
bc593f5d IG |
471 | static struct gpio n810_emmc_gpios[] __initdata = { |
472 | { N810_EMMC_VSD_GPIO, GPIOF_OUT_INIT_LOW, "MMC slot 2 Vddf" }, | |
473 | { N810_EMMC_VIO_GPIO, GPIOF_OUT_INIT_LOW, "MMC slot 2 Vdd" }, | |
474 | }; | |
9418c65f | 475 | |
bc593f5d | 476 | static void __init n8x0_mmc_init(void) |
9418c65f TL |
477 | { |
478 | int err; | |
479 | ||
c8f27e97 | 480 | if (board_is_n810()) { |
9418c65f TL |
481 | mmc1_data.slots[0].name = "external"; |
482 | ||
483 | /* | |
484 | * Some Samsung Movinand chips do not like open-ended | |
485 | * multi-block reads and fall to braind-dead state | |
486 | * while doing so. Reducing the number of blocks in | |
487 | * the transfer or delays in clock disable do not help | |
488 | */ | |
489 | mmc1_data.slots[1].name = "internal"; | |
490 | mmc1_data.slots[1].ban_openended = 1; | |
491 | } | |
492 | ||
bc593f5d IG |
493 | err = gpio_request_one(N8X0_SLOT_SWITCH_GPIO, GPIOF_OUT_INIT_LOW, |
494 | "MMC slot switch"); | |
9418c65f | 495 | if (err) |
1dea5c6b | 496 | return; |
9418c65f | 497 | |
c8f27e97 | 498 | if (board_is_n810()) { |
bc593f5d IG |
499 | err = gpio_request_array(n810_emmc_gpios, |
500 | ARRAY_SIZE(n810_emmc_gpios)); | |
9418c65f TL |
501 | if (err) { |
502 | gpio_free(N8X0_SLOT_SWITCH_GPIO); | |
1dea5c6b | 503 | return; |
9418c65f | 504 | } |
9418c65f TL |
505 | } |
506 | ||
fa590c92 | 507 | mmc1_data.nr_slots = 2; |
9418c65f | 508 | mmc_data[0] = &mmc1_data; |
9418c65f TL |
509 | } |
510 | #else | |
fa590c92 | 511 | static struct omap_mmc_platform_data mmc1_data; |
9418c65f TL |
512 | void __init n8x0_mmc_init(void) |
513 | { | |
514 | } | |
9418c65f TL |
515 | #endif /* CONFIG_MMC_OMAP */ |
516 | ||
517 | #ifdef CONFIG_MENELAUS | |
518 | ||
519 | static int n8x0_auto_sleep_regulators(void) | |
520 | { | |
521 | u32 val; | |
522 | int ret; | |
523 | ||
524 | val = EN_VPLL_SLEEP | EN_VMMC_SLEEP \ | |
525 | | EN_VAUX_SLEEP | EN_VIO_SLEEP \ | |
526 | | EN_VMEM_SLEEP | EN_DC3_SLEEP \ | |
527 | | EN_VC_SLEEP | EN_DC2_SLEEP; | |
528 | ||
529 | ret = menelaus_set_regulator_sleep(1, val); | |
530 | if (ret < 0) { | |
7852ec05 PW |
531 | pr_err("Could not set regulators to sleep on menelaus: %u\n", |
532 | ret); | |
9418c65f TL |
533 | return ret; |
534 | } | |
535 | return 0; | |
536 | } | |
537 | ||
538 | static int n8x0_auto_voltage_scale(void) | |
539 | { | |
540 | int ret; | |
541 | ||
542 | ret = menelaus_set_vcore_hw(1400, 1050); | |
543 | if (ret < 0) { | |
7852ec05 | 544 | pr_err("Could not set VCORE voltage on menelaus: %u\n", ret); |
9418c65f TL |
545 | return ret; |
546 | } | |
547 | return 0; | |
548 | } | |
549 | ||
550 | static int n8x0_menelaus_late_init(struct device *dev) | |
551 | { | |
552 | int ret; | |
553 | ||
554 | ret = n8x0_auto_voltage_scale(); | |
555 | if (ret < 0) | |
556 | return ret; | |
557 | ret = n8x0_auto_sleep_regulators(); | |
558 | if (ret < 0) | |
559 | return ret; | |
560 | return 0; | |
561 | } | |
562 | ||
a7f97d25 JN |
563 | #else |
564 | static int n8x0_menelaus_late_init(struct device *dev) | |
565 | { | |
566 | return 0; | |
567 | } | |
568 | #endif | |
569 | ||
e92ce89c | 570 | struct menelaus_platform_data n8x0_menelaus_platform_data __initdata = { |
a7f97d25 JN |
571 | .late_init = n8x0_menelaus_late_init, |
572 | }; | |
573 | ||
e92ce89c | 574 | struct aic3x_pdata n810_aic33_data __initdata = { |
366498d4 | 575 | .gpio_reset = 118, |
9418c65f TL |
576 | }; |
577 | ||
810ac2a1 TL |
578 | static int __init n8x0_late_initcall(void) |
579 | { | |
580 | if (!board_caps) | |
581 | return -ENODEV; | |
582 | ||
810ac2a1 TL |
583 | n8x0_mmc_init(); |
584 | n8x0_usb_init(); | |
810ac2a1 TL |
585 | |
586 | return 0; | |
587 | } | |
588 | omap_late_initcall(n8x0_late_initcall); | |
589 | ||
fa590c92 TL |
590 | /* |
591 | * Legacy init pdata init for n8x0. Note that we want to follow the | |
592 | * I2C bus numbering starting at 0 for device tree like other omaps. | |
593 | */ | |
594 | void * __init n8x0_legacy_init(void) | |
595 | { | |
596 | board_check_revision(); | |
597 | spi_register_board_info(n800_spi_board_info, | |
598 | ARRAY_SIZE(n800_spi_board_info)); | |
fa590c92 TL |
599 | return &mmc1_data; |
600 | } |