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53c5ec31 SMK |
1 | /* |
2 | * linux/arch/arm/mach-omap2/board-omap3evm.c | |
3 | * | |
4 | * Copyright (C) 2008 Texas Instruments | |
5 | * | |
6 | * Modified from mach-omap2/board-3430sdp.c | |
7 | * | |
8 | * Initial code: Syed Mohammed Khasim | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License version 2 as | |
12 | * published by the Free Software Foundation. | |
13 | */ | |
14 | ||
15 | #include <linux/kernel.h> | |
16 | #include <linux/init.h> | |
17 | #include <linux/platform_device.h> | |
18 | #include <linux/delay.h> | |
19 | #include <linux/err.h> | |
20 | #include <linux/clk.h> | |
21 | #include <linux/gpio.h> | |
22 | #include <linux/input.h> | |
6135434a | 23 | #include <linux/input/matrix_keypad.h> |
53c5ec31 | 24 | #include <linux/leds.h> |
562138a4 | 25 | #include <linux/interrupt.h> |
53c5ec31 SMK |
26 | |
27 | #include <linux/spi/spi.h> | |
28 | #include <linux/spi/ads7846.h> | |
ebeb53e1 | 29 | #include <linux/i2c/twl.h> |
e8e2ff46 | 30 | #include <linux/usb/otg.h> |
562138a4 | 31 | #include <linux/smsc911x.h> |
53c5ec31 | 32 | |
741927f7 ER |
33 | #include <linux/wl12xx.h> |
34 | #include <linux/regulator/fixed.h> | |
1a7ec135 | 35 | #include <linux/regulator/machine.h> |
3a63833e | 36 | #include <linux/mmc/host.h> |
1a7ec135 | 37 | |
53c5ec31 SMK |
38 | #include <mach/hardware.h> |
39 | #include <asm/mach-types.h> | |
40 | #include <asm/mach/arch.h> | |
41 | #include <asm/mach/map.h> | |
42 | ||
ce491cf8 | 43 | #include <plat/board.h> |
ce491cf8 TL |
44 | #include <plat/usb.h> |
45 | #include <plat/common.h> | |
46 | #include <plat/mcspi.h> | |
a0b38cc4 | 47 | #include <video/omapdss.h> |
f8ae2f08 | 48 | #include <video/omap-panel-generic-dpi.h> |
53c5ec31 | 49 | |
ca5742bd | 50 | #include "mux.h" |
53c5ec31 | 51 | #include "sdram-micron-mt46h32m32lf-6.h" |
d02a900b | 52 | #include "hsmmc.h" |
96974a24 | 53 | #include "common-board-devices.h" |
53c5ec31 SMK |
54 | |
55 | #define OMAP3_EVM_TS_GPIO 175 | |
e8e51d29 AKG |
56 | #define OMAP3_EVM_EHCI_VBUS 22 |
57 | #define OMAP3_EVM_EHCI_SELECT 61 | |
53c5ec31 SMK |
58 | |
59 | #define OMAP3EVM_ETHR_START 0x2c000000 | |
60 | #define OMAP3EVM_ETHR_SIZE 1024 | |
db408023 | 61 | #define OMAP3EVM_ETHR_ID_REV 0x50 |
53c5ec31 | 62 | #define OMAP3EVM_ETHR_GPIO_IRQ 176 |
562138a4 | 63 | #define OMAP3EVM_SMSC911X_CS 5 |
9bc64b89 VH |
64 | /* |
65 | * Eth Reset signal | |
66 | * 64 = Generation 1 (<=RevD) | |
67 | * 7 = Generation 2 (>=RevE) | |
68 | */ | |
69 | #define OMAP3EVM_GEN1_ETHR_GPIO_RST 64 | |
70 | #define OMAP3EVM_GEN2_ETHR_GPIO_RST 7 | |
53c5ec31 | 71 | |
db408023 AKG |
72 | static u8 omap3_evm_version; |
73 | ||
74 | u8 get_omap3_evm_rev(void) | |
75 | { | |
76 | return omap3_evm_version; | |
77 | } | |
78 | EXPORT_SYMBOL(get_omap3_evm_rev); | |
79 | ||
80 | static void __init omap3_evm_get_revision(void) | |
81 | { | |
82 | void __iomem *ioaddr; | |
83 | unsigned int smsc_id; | |
84 | ||
85 | /* Ethernet PHY ID is stored at ID_REV register */ | |
86 | ioaddr = ioremap_nocache(OMAP3EVM_ETHR_START, SZ_1K); | |
87 | if (!ioaddr) | |
88 | return; | |
89 | smsc_id = readl(ioaddr + OMAP3EVM_ETHR_ID_REV) & 0xFFFF0000; | |
90 | iounmap(ioaddr); | |
91 | ||
92 | switch (smsc_id) { | |
93 | /*SMSC9115 chipset*/ | |
94 | case 0x01150000: | |
95 | omap3_evm_version = OMAP3EVM_BOARD_GEN_1; | |
96 | break; | |
97 | /*SMSC 9220 chipset*/ | |
98 | case 0x92200000: | |
99 | default: | |
100 | omap3_evm_version = OMAP3EVM_BOARD_GEN_2; | |
101 | } | |
102 | } | |
103 | ||
562138a4 | 104 | #if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE) |
21b42731 | 105 | #include <plat/gpmc-smsc911x.h> |
53c5ec31 | 106 | |
21b42731 MR |
107 | static struct omap_smsc911x_platform_data smsc911x_cfg = { |
108 | .cs = OMAP3EVM_SMSC911X_CS, | |
109 | .gpio_irq = OMAP3EVM_ETHR_GPIO_IRQ, | |
110 | .gpio_reset = -EINVAL, | |
111 | .flags = SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS, | |
53c5ec31 SMK |
112 | }; |
113 | ||
562138a4 | 114 | static inline void __init omap3evm_init_smsc911x(void) |
53c5ec31 | 115 | { |
53c5ec31 SMK |
116 | struct clk *l3ck; |
117 | unsigned int rate; | |
118 | ||
53c5ec31 SMK |
119 | l3ck = clk_get(NULL, "l3_ck"); |
120 | if (IS_ERR(l3ck)) | |
121 | rate = 100000000; | |
122 | else | |
123 | rate = clk_get_rate(l3ck); | |
124 | ||
9bc64b89 VH |
125 | /* Configure ethernet controller reset gpio */ |
126 | if (cpu_is_omap3430()) { | |
21b42731 MR |
127 | if (get_omap3_evm_rev() == OMAP3EVM_BOARD_GEN_1) |
128 | smsc911x_cfg.gpio_reset = OMAP3EVM_GEN1_ETHR_GPIO_RST; | |
129 | else | |
130 | smsc911x_cfg.gpio_reset = OMAP3EVM_GEN2_ETHR_GPIO_RST; | |
53c5ec31 SMK |
131 | } |
132 | ||
21b42731 | 133 | gpmc_smsc911x_init(&smsc911x_cfg); |
53c5ec31 SMK |
134 | } |
135 | ||
562138a4 S |
136 | #else |
137 | static inline void __init omap3evm_init_smsc911x(void) { return; } | |
138 | #endif | |
139 | ||
703e3061 VH |
140 | /* |
141 | * OMAP3EVM LCD Panel control signals | |
142 | */ | |
143 | #define OMAP3EVM_LCD_PANEL_LR 2 | |
144 | #define OMAP3EVM_LCD_PANEL_UD 3 | |
145 | #define OMAP3EVM_LCD_PANEL_INI 152 | |
146 | #define OMAP3EVM_LCD_PANEL_ENVDD 153 | |
147 | #define OMAP3EVM_LCD_PANEL_QVGA 154 | |
148 | #define OMAP3EVM_LCD_PANEL_RESB 155 | |
149 | #define OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO 210 | |
150 | #define OMAP3EVM_DVI_PANEL_EN_GPIO 199 | |
151 | ||
bc593f5d IG |
152 | static struct gpio omap3_evm_dss_gpios[] __initdata = { |
153 | { OMAP3EVM_LCD_PANEL_RESB, GPIOF_OUT_INIT_HIGH, "lcd_panel_resb" }, | |
154 | { OMAP3EVM_LCD_PANEL_INI, GPIOF_OUT_INIT_HIGH, "lcd_panel_ini" }, | |
155 | { OMAP3EVM_LCD_PANEL_QVGA, GPIOF_OUT_INIT_LOW, "lcd_panel_qvga" }, | |
156 | { OMAP3EVM_LCD_PANEL_LR, GPIOF_OUT_INIT_HIGH, "lcd_panel_lr" }, | |
157 | { OMAP3EVM_LCD_PANEL_UD, GPIOF_OUT_INIT_HIGH, "lcd_panel_ud" }, | |
158 | { OMAP3EVM_LCD_PANEL_ENVDD, GPIOF_OUT_INIT_LOW, "lcd_panel_envdd" }, | |
159 | }; | |
160 | ||
703e3061 VH |
161 | static int lcd_enabled; |
162 | static int dvi_enabled; | |
163 | ||
164 | static void __init omap3_evm_display_init(void) | |
165 | { | |
166 | int r; | |
167 | ||
bc593f5d IG |
168 | r = gpio_request_array(omap3_evm_dss_gpios, |
169 | ARRAY_SIZE(omap3_evm_dss_gpios)); | |
170 | if (r) | |
171 | printk(KERN_ERR "failed to get lcd_panel_* gpios\n"); | |
703e3061 VH |
172 | } |
173 | ||
174 | static int omap3_evm_enable_lcd(struct omap_dss_device *dssdev) | |
175 | { | |
176 | if (dvi_enabled) { | |
177 | printk(KERN_ERR "cannot enable LCD, DVI is enabled\n"); | |
178 | return -EINVAL; | |
179 | } | |
180 | gpio_set_value(OMAP3EVM_LCD_PANEL_ENVDD, 0); | |
181 | ||
182 | if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2) | |
f186e9b2 | 183 | gpio_set_value_cansleep(OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO, 0); |
703e3061 | 184 | else |
f186e9b2 | 185 | gpio_set_value_cansleep(OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO, 1); |
703e3061 VH |
186 | |
187 | lcd_enabled = 1; | |
188 | return 0; | |
189 | } | |
190 | ||
191 | static void omap3_evm_disable_lcd(struct omap_dss_device *dssdev) | |
192 | { | |
193 | gpio_set_value(OMAP3EVM_LCD_PANEL_ENVDD, 1); | |
194 | ||
195 | if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2) | |
f186e9b2 | 196 | gpio_set_value_cansleep(OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO, 1); |
703e3061 | 197 | else |
f186e9b2 | 198 | gpio_set_value_cansleep(OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO, 0); |
703e3061 VH |
199 | |
200 | lcd_enabled = 0; | |
201 | } | |
202 | ||
203 | static struct omap_dss_device omap3_evm_lcd_device = { | |
204 | .name = "lcd", | |
205 | .driver_name = "sharp_ls_panel", | |
206 | .type = OMAP_DISPLAY_TYPE_DPI, | |
207 | .phy.dpi.data_lines = 18, | |
208 | .platform_enable = omap3_evm_enable_lcd, | |
209 | .platform_disable = omap3_evm_disable_lcd, | |
210 | }; | |
211 | ||
212 | static int omap3_evm_enable_tv(struct omap_dss_device *dssdev) | |
213 | { | |
214 | return 0; | |
215 | } | |
216 | ||
217 | static void omap3_evm_disable_tv(struct omap_dss_device *dssdev) | |
218 | { | |
219 | } | |
220 | ||
221 | static struct omap_dss_device omap3_evm_tv_device = { | |
222 | .name = "tv", | |
223 | .driver_name = "venc", | |
224 | .type = OMAP_DISPLAY_TYPE_VENC, | |
225 | .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO, | |
226 | .platform_enable = omap3_evm_enable_tv, | |
227 | .platform_disable = omap3_evm_disable_tv, | |
228 | }; | |
229 | ||
230 | static int omap3_evm_enable_dvi(struct omap_dss_device *dssdev) | |
231 | { | |
232 | if (lcd_enabled) { | |
233 | printk(KERN_ERR "cannot enable DVI, LCD is enabled\n"); | |
234 | return -EINVAL; | |
235 | } | |
236 | ||
f186e9b2 | 237 | gpio_set_value_cansleep(OMAP3EVM_DVI_PANEL_EN_GPIO, 1); |
703e3061 VH |
238 | |
239 | dvi_enabled = 1; | |
240 | return 0; | |
241 | } | |
242 | ||
243 | static void omap3_evm_disable_dvi(struct omap_dss_device *dssdev) | |
244 | { | |
f186e9b2 | 245 | gpio_set_value_cansleep(OMAP3EVM_DVI_PANEL_EN_GPIO, 0); |
703e3061 VH |
246 | |
247 | dvi_enabled = 0; | |
248 | } | |
249 | ||
89747c91 BW |
250 | static struct panel_generic_dpi_data dvi_panel = { |
251 | .name = "generic", | |
252 | .platform_enable = omap3_evm_enable_dvi, | |
253 | .platform_disable = omap3_evm_disable_dvi, | |
254 | }; | |
255 | ||
703e3061 VH |
256 | static struct omap_dss_device omap3_evm_dvi_device = { |
257 | .name = "dvi", | |
703e3061 | 258 | .type = OMAP_DISPLAY_TYPE_DPI, |
89747c91 BW |
259 | .driver_name = "generic_dpi_panel", |
260 | .data = &dvi_panel, | |
703e3061 | 261 | .phy.dpi.data_lines = 24, |
703e3061 VH |
262 | }; |
263 | ||
264 | static struct omap_dss_device *omap3_evm_dss_devices[] = { | |
265 | &omap3_evm_lcd_device, | |
266 | &omap3_evm_tv_device, | |
267 | &omap3_evm_dvi_device, | |
268 | }; | |
269 | ||
270 | static struct omap_dss_board_info omap3_evm_dss_data = { | |
271 | .num_devices = ARRAY_SIZE(omap3_evm_dss_devices), | |
272 | .devices = omap3_evm_dss_devices, | |
273 | .default_device = &omap3_evm_lcd_device, | |
274 | }; | |
275 | ||
786b01a8 OD |
276 | static struct regulator_consumer_supply omap3evm_vmmc1_supply[] = { |
277 | REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), | |
1a7ec135 MR |
278 | }; |
279 | ||
786b01a8 OD |
280 | static struct regulator_consumer_supply omap3evm_vsim_supply[] = { |
281 | REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"), | |
1a7ec135 MR |
282 | }; |
283 | ||
284 | /* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */ | |
285 | static struct regulator_init_data omap3evm_vmmc1 = { | |
286 | .constraints = { | |
287 | .min_uV = 1850000, | |
288 | .max_uV = 3150000, | |
289 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
290 | | REGULATOR_MODE_STANDBY, | |
291 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | |
292 | | REGULATOR_CHANGE_MODE | |
293 | | REGULATOR_CHANGE_STATUS, | |
294 | }, | |
786b01a8 OD |
295 | .num_consumer_supplies = ARRAY_SIZE(omap3evm_vmmc1_supply), |
296 | .consumer_supplies = omap3evm_vmmc1_supply, | |
1a7ec135 MR |
297 | }; |
298 | ||
299 | /* VSIM for MMC1 pins DAT4..DAT7 (2 mA, plus card == max 50 mA) */ | |
300 | static struct regulator_init_data omap3evm_vsim = { | |
301 | .constraints = { | |
302 | .min_uV = 1800000, | |
303 | .max_uV = 3000000, | |
304 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
305 | | REGULATOR_MODE_STANDBY, | |
306 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | |
307 | | REGULATOR_CHANGE_MODE | |
308 | | REGULATOR_CHANGE_STATUS, | |
309 | }, | |
786b01a8 OD |
310 | .num_consumer_supplies = ARRAY_SIZE(omap3evm_vsim_supply), |
311 | .consumer_supplies = omap3evm_vsim_supply, | |
1a7ec135 MR |
312 | }; |
313 | ||
68ff0423 | 314 | static struct omap2_hsmmc_info mmc[] = { |
53c5ec31 SMK |
315 | { |
316 | .mmc = 1, | |
3a63833e | 317 | .caps = MMC_CAP_4_BIT_DATA, |
53c5ec31 SMK |
318 | .gpio_cd = -EINVAL, |
319 | .gpio_wp = 63, | |
320 | }, | |
741927f7 ER |
321 | #ifdef CONFIG_WL12XX_PLATFORM_DATA |
322 | { | |
323 | .name = "wl1271", | |
aca6ad07 | 324 | .mmc = 2, |
741927f7 ER |
325 | .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_POWER_OFF_CARD, |
326 | .gpio_wp = -EINVAL, | |
327 | .gpio_cd = -EINVAL, | |
328 | .nonremovable = true, | |
329 | }, | |
330 | #endif | |
53c5ec31 SMK |
331 | {} /* Terminator */ |
332 | }; | |
333 | ||
334 | static struct gpio_led gpio_leds[] = { | |
335 | { | |
336 | .name = "omap3evm::ledb", | |
337 | /* normally not visible (board underside) */ | |
338 | .default_trigger = "default-on", | |
339 | .gpio = -EINVAL, /* gets replaced */ | |
340 | .active_low = true, | |
341 | }, | |
342 | }; | |
343 | ||
344 | static struct gpio_led_platform_data gpio_led_info = { | |
345 | .leds = gpio_leds, | |
346 | .num_leds = ARRAY_SIZE(gpio_leds), | |
347 | }; | |
348 | ||
349 | static struct platform_device leds_gpio = { | |
350 | .name = "leds-gpio", | |
351 | .id = -1, | |
352 | .dev = { | |
353 | .platform_data = &gpio_led_info, | |
354 | }, | |
355 | }; | |
356 | ||
357 | ||
358 | static int omap3evm_twl_gpio_setup(struct device *dev, | |
359 | unsigned gpio, unsigned ngpio) | |
360 | { | |
bc593f5d | 361 | int r, lcd_bl_en; |
42fc8cab | 362 | |
53c5ec31 | 363 | /* gpio + 0 is "mmc0_cd" (input/IRQ) */ |
4896e394 | 364 | omap_mux_init_gpio(63, OMAP_PIN_INPUT); |
53c5ec31 | 365 | mmc[0].gpio_cd = gpio + 0; |
68ff0423 | 366 | omap2_hsmmc_init(mmc); |
53c5ec31 SMK |
367 | |
368 | /* | |
369 | * Most GPIOs are for USB OTG. Some are mostly sent to | |
370 | * the P2 connector; notably LEDA for the LCD backlight. | |
371 | */ | |
372 | ||
703e3061 | 373 | /* TWL4030_GPIO_MAX + 0 == ledA, LCD Backlight control */ |
bc593f5d IG |
374 | lcd_bl_en = get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2 ? |
375 | GPIOF_OUT_INIT_HIGH : GPIOF_OUT_INIT_LOW; | |
376 | r = gpio_request_one(gpio + TWL4030_GPIO_MAX, lcd_bl_en, "EN_LCD_BKL"); | |
42fc8cab VH |
377 | if (r) |
378 | printk(KERN_ERR "failed to get/set lcd_bkl gpio\n"); | |
703e3061 VH |
379 | |
380 | /* gpio + 7 == DVI Enable */ | |
bc593f5d | 381 | gpio_request_one(gpio + 7, GPIOF_OUT_INIT_LOW, "EN_DVI"); |
703e3061 | 382 | |
53c5ec31 SMK |
383 | /* TWL4030_GPIO_MAX + 1 == ledB (out, active low LED) */ |
384 | gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1; | |
385 | ||
386 | platform_device_register(&leds_gpio); | |
387 | ||
388 | return 0; | |
389 | } | |
390 | ||
391 | static struct twl4030_gpio_platform_data omap3evm_gpio_data = { | |
392 | .gpio_base = OMAP_MAX_GPIO_LINES, | |
393 | .irq_base = TWL4030_GPIO_IRQ_BASE, | |
394 | .irq_end = TWL4030_GPIO_IRQ_END, | |
395 | .use_leds = true, | |
396 | .setup = omap3evm_twl_gpio_setup, | |
397 | }; | |
398 | ||
bead4375 | 399 | static uint32_t board_keymap[] = { |
53c5ec31 | 400 | KEY(0, 0, KEY_LEFT), |
0621d756 SP |
401 | KEY(0, 1, KEY_DOWN), |
402 | KEY(0, 2, KEY_ENTER), | |
403 | KEY(0, 3, KEY_M), | |
404 | ||
405 | KEY(1, 0, KEY_RIGHT), | |
53c5ec31 | 406 | KEY(1, 1, KEY_UP), |
0621d756 SP |
407 | KEY(1, 2, KEY_I), |
408 | KEY(1, 3, KEY_N), | |
409 | ||
410 | KEY(2, 0, KEY_A), | |
411 | KEY(2, 1, KEY_E), | |
53c5ec31 | 412 | KEY(2, 2, KEY_J), |
0621d756 SP |
413 | KEY(2, 3, KEY_O), |
414 | ||
415 | KEY(3, 0, KEY_B), | |
416 | KEY(3, 1, KEY_F), | |
417 | KEY(3, 2, KEY_K), | |
53c5ec31 SMK |
418 | KEY(3, 3, KEY_P) |
419 | }; | |
420 | ||
4f543332 TL |
421 | static struct matrix_keymap_data board_map_data = { |
422 | .keymap = board_keymap, | |
423 | .keymap_size = ARRAY_SIZE(board_keymap), | |
424 | }; | |
425 | ||
53c5ec31 | 426 | static struct twl4030_keypad_data omap3evm_kp_data = { |
4f543332 | 427 | .keymap_data = &board_map_data, |
53c5ec31 SMK |
428 | .rows = 4, |
429 | .cols = 4, | |
53c5ec31 SMK |
430 | .rep = 1, |
431 | }; | |
432 | ||
410491d4 | 433 | /* ads7846 on SPI */ |
786b01a8 OD |
434 | static struct regulator_consumer_supply omap3evm_vio_supply[] = { |
435 | REGULATOR_SUPPLY("vcc", "spi1.0"), | |
436 | }; | |
410491d4 VH |
437 | |
438 | /* VIO for ads7846 */ | |
439 | static struct regulator_init_data omap3evm_vio = { | |
440 | .constraints = { | |
441 | .min_uV = 1800000, | |
442 | .max_uV = 1800000, | |
443 | .apply_uV = true, | |
444 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
445 | | REGULATOR_MODE_STANDBY, | |
446 | .valid_ops_mask = REGULATOR_CHANGE_MODE | |
447 | | REGULATOR_CHANGE_STATUS, | |
448 | }, | |
786b01a8 OD |
449 | .num_consumer_supplies = ARRAY_SIZE(omap3evm_vio_supply), |
450 | .consumer_supplies = omap3evm_vio_supply, | |
410491d4 VH |
451 | }; |
452 | ||
741927f7 ER |
453 | #ifdef CONFIG_WL12XX_PLATFORM_DATA |
454 | ||
455 | #define OMAP3EVM_WLAN_PMENA_GPIO (150) | |
456 | #define OMAP3EVM_WLAN_IRQ_GPIO (149) | |
457 | ||
786b01a8 | 458 | static struct regulator_consumer_supply omap3evm_vmmc2_supply[] = { |
d19f579a | 459 | REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"), |
786b01a8 | 460 | }; |
741927f7 ER |
461 | |
462 | /* VMMC2 for driving the WL12xx module */ | |
463 | static struct regulator_init_data omap3evm_vmmc2 = { | |
464 | .constraints = { | |
465 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, | |
466 | }, | |
d19f579a | 467 | .num_consumer_supplies = ARRAY_SIZE(omap3evm_vmmc2_supply), |
786b01a8 | 468 | .consumer_supplies = omap3evm_vmmc2_supply, |
741927f7 ER |
469 | }; |
470 | ||
471 | static struct fixed_voltage_config omap3evm_vwlan = { | |
472 | .supply_name = "vwl1271", | |
473 | .microvolts = 1800000, /* 1.80V */ | |
474 | .gpio = OMAP3EVM_WLAN_PMENA_GPIO, | |
475 | .startup_delay = 70000, /* 70ms */ | |
476 | .enable_high = 1, | |
477 | .enabled_at_boot = 0, | |
478 | .init_data = &omap3evm_vmmc2, | |
479 | }; | |
480 | ||
aca6ad07 | 481 | static struct platform_device omap3evm_wlan_regulator = { |
741927f7 ER |
482 | .name = "reg-fixed-voltage", |
483 | .id = 1, | |
484 | .dev = { | |
485 | .platform_data = &omap3evm_vwlan, | |
486 | }, | |
487 | }; | |
488 | ||
489 | struct wl12xx_platform_data omap3evm_wlan_data __initdata = { | |
490 | .irq = OMAP_GPIO_IRQ(OMAP3EVM_WLAN_IRQ_GPIO), | |
aca6ad07 | 491 | .board_ref_clock = WL12XX_REFCLOCK_38, /* 38.4 MHz */ |
741927f7 ER |
492 | }; |
493 | #endif | |
494 | ||
53c5ec31 | 495 | static struct twl4030_platform_data omap3evm_twldata = { |
53c5ec31 SMK |
496 | /* platform_data for children goes here */ |
497 | .keypad = &omap3evm_kp_data, | |
53c5ec31 | 498 | .gpio = &omap3evm_gpio_data, |
410491d4 | 499 | .vio = &omap3evm_vio, |
fbd8071c MR |
500 | .vmmc1 = &omap3evm_vmmc1, |
501 | .vsim = &omap3evm_vsim, | |
53c5ec31 SMK |
502 | }; |
503 | ||
504 | static int __init omap3_evm_i2c_init(void) | |
505 | { | |
827ed9ae | 506 | omap3_pmic_get_config(&omap3evm_twldata, |
b252b0ef PU |
507 | TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_MADC | |
508 | TWL_COMMON_PDATA_AUDIO, | |
509 | TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2); | |
510 | ||
511 | omap3evm_twldata.vdac->constraints.apply_uV = true; | |
512 | omap3evm_twldata.vpll2->constraints.apply_uV = true; | |
513 | ||
fbd8071c | 514 | omap3_pmic_init("twl4030", &omap3evm_twldata); |
53c5ec31 SMK |
515 | omap_register_i2c_bus(2, 400, NULL, 0); |
516 | omap_register_i2c_bus(3, 400, NULL, 0); | |
517 | return 0; | |
518 | } | |
519 | ||
b3c6df3a | 520 | static struct omap_board_config_kernel omap3_evm_config[] __initdata = { |
b3c6df3a PW |
521 | }; |
522 | ||
3dc3bad6 | 523 | static void __init omap3_evm_init_early(void) |
53c5ec31 | 524 | { |
4805734b PW |
525 | omap2_init_common_infrastructure(); |
526 | omap2_init_common_devices(mt46h32m32lf6_sdrc_params, NULL); | |
53c5ec31 SMK |
527 | } |
528 | ||
181b250c | 529 | static struct usbhs_omap_board_data usbhs_bdata __initdata = { |
58a5491c | 530 | |
181b250c KM |
531 | .port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED, |
532 | .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY, | |
533 | .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED, | |
58a5491c FB |
534 | |
535 | .phy_reset = true, | |
e8e51d29 | 536 | /* PHY reset GPIO will be runtime programmed based on EVM version */ |
58a5491c | 537 | .reset_gpio_port[0] = -EINVAL, |
e8e51d29 | 538 | .reset_gpio_port[1] = -EINVAL, |
58a5491c FB |
539 | .reset_gpio_port[2] = -EINVAL |
540 | }; | |
541 | ||
ca5742bd | 542 | #ifdef CONFIG_OMAP_MUX |
904c545c | 543 | static struct omap_board_mux omap35x_board_mux[] __initdata = { |
aa6912d8 | 544 | OMAP3_MUX(SYS_NIRQ, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP | |
f3a8cde6 | 545 | OMAP_PIN_OFF_INPUT_PULLUP | OMAP_PIN_OFF_OUTPUT_LOW | |
aa6912d8 | 546 | OMAP_PIN_OFF_WAKEUPENABLE), |
87520aae | 547 | OMAP3_MUX(MCSPI1_CS1, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP | |
854c122f VH |
548 | OMAP_PIN_OFF_INPUT_PULLUP | OMAP_PIN_OFF_OUTPUT_LOW | |
549 | OMAP_PIN_OFF_WAKEUPENABLE), | |
9bc64b89 VH |
550 | OMAP3_MUX(SYS_BOOT5, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP | |
551 | OMAP_PIN_OFF_NONE), | |
552 | OMAP3_MUX(GPMC_WAIT2, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP | | |
553 | OMAP_PIN_OFF_NONE), | |
741927f7 ER |
554 | #ifdef CONFIG_WL12XX_PLATFORM_DATA |
555 | /* WLAN IRQ - GPIO 149 */ | |
aca6ad07 | 556 | OMAP3_MUX(UART1_RTS, OMAP_MUX_MODE4 | OMAP_PIN_INPUT), |
741927f7 ER |
557 | |
558 | /* WLAN POWER ENABLE - GPIO 150 */ | |
559 | OMAP3_MUX(UART1_CTS, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT), | |
560 | ||
561 | /* MMC2 SDIO pin muxes for WL12xx */ | |
562 | OMAP3_MUX(SDMMC2_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP), | |
563 | OMAP3_MUX(SDMMC2_CMD, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP), | |
564 | OMAP3_MUX(SDMMC2_DAT0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP), | |
565 | OMAP3_MUX(SDMMC2_DAT1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP), | |
566 | OMAP3_MUX(SDMMC2_DAT2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP), | |
567 | OMAP3_MUX(SDMMC2_DAT3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP), | |
568 | #endif | |
ca5742bd TL |
569 | { .reg_offset = OMAP_MUX_TERMINATOR }, |
570 | }; | |
904c545c VH |
571 | |
572 | static struct omap_board_mux omap36x_board_mux[] __initdata = { | |
aa6912d8 | 573 | OMAP3_MUX(SYS_NIRQ, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP | |
f3a8cde6 | 574 | OMAP_PIN_OFF_INPUT_PULLUP | OMAP_PIN_OFF_OUTPUT_LOW | |
aa6912d8 | 575 | OMAP_PIN_OFF_WAKEUPENABLE), |
87520aae | 576 | OMAP3_MUX(MCSPI1_CS1, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP | |
854c122f VH |
577 | OMAP_PIN_OFF_INPUT_PULLUP | OMAP_PIN_OFF_OUTPUT_LOW | |
578 | OMAP_PIN_OFF_WAKEUPENABLE), | |
904c545c VH |
579 | /* AM/DM37x EVM: DSS data bus muxed with sys_boot */ |
580 | OMAP3_MUX(DSS_DATA18, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE), | |
581 | OMAP3_MUX(DSS_DATA19, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE), | |
582 | OMAP3_MUX(DSS_DATA22, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE), | |
583 | OMAP3_MUX(DSS_DATA21, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE), | |
584 | OMAP3_MUX(DSS_DATA22, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE), | |
585 | OMAP3_MUX(DSS_DATA23, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE), | |
586 | OMAP3_MUX(SYS_BOOT0, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE), | |
587 | OMAP3_MUX(SYS_BOOT1, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE), | |
588 | OMAP3_MUX(SYS_BOOT3, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE), | |
589 | OMAP3_MUX(SYS_BOOT4, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE), | |
590 | OMAP3_MUX(SYS_BOOT5, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE), | |
591 | OMAP3_MUX(SYS_BOOT6, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE), | |
aca6ad07 ER |
592 | #ifdef CONFIG_WL12XX_PLATFORM_DATA |
593 | /* WLAN IRQ - GPIO 149 */ | |
594 | OMAP3_MUX(UART1_RTS, OMAP_MUX_MODE4 | OMAP_PIN_INPUT), | |
595 | ||
596 | /* WLAN POWER ENABLE - GPIO 150 */ | |
597 | OMAP3_MUX(UART1_CTS, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT), | |
598 | ||
599 | /* MMC2 SDIO pin muxes for WL12xx */ | |
600 | OMAP3_MUX(SDMMC2_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP), | |
601 | OMAP3_MUX(SDMMC2_CMD, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP), | |
602 | OMAP3_MUX(SDMMC2_DAT0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP), | |
603 | OMAP3_MUX(SDMMC2_DAT1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP), | |
604 | OMAP3_MUX(SDMMC2_DAT2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP), | |
605 | OMAP3_MUX(SDMMC2_DAT3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP), | |
606 | #endif | |
904c545c | 607 | |
ca5742bd TL |
608 | { .reg_offset = OMAP_MUX_TERMINATOR }, |
609 | }; | |
904c545c VH |
610 | #else |
611 | #define omap35x_board_mux NULL | |
612 | #define omap36x_board_mux NULL | |
ca5742bd TL |
613 | #endif |
614 | ||
884b8369 MM |
615 | static struct omap_musb_board_data musb_board_data = { |
616 | .interface_type = MUSB_INTERFACE_ULPI, | |
617 | .mode = MUSB_OTG, | |
618 | .power = 100, | |
619 | }; | |
620 | ||
bc593f5d IG |
621 | static struct gpio omap3_evm_ehci_gpios[] __initdata = { |
622 | { OMAP3_EVM_EHCI_VBUS, GPIOF_OUT_INIT_HIGH, "enable EHCI VBUS" }, | |
623 | { OMAP3_EVM_EHCI_SELECT, GPIOF_OUT_INIT_LOW, "select EHCI port" }, | |
624 | }; | |
625 | ||
53c5ec31 SMK |
626 | static void __init omap3_evm_init(void) |
627 | { | |
db408023 | 628 | omap3_evm_get_revision(); |
904c545c VH |
629 | |
630 | if (cpu_is_omap3630()) | |
631 | omap3_mux_init(omap36x_board_mux, OMAP_PACKAGE_CBB); | |
632 | else | |
633 | omap3_mux_init(omap35x_board_mux, OMAP_PACKAGE_CBB); | |
db408023 | 634 | |
e41cccfe TL |
635 | omap_board_config = omap3_evm_config; |
636 | omap_board_config_size = ARRAY_SIZE(omap3_evm_config); | |
db408023 | 637 | |
53c5ec31 SMK |
638 | omap3_evm_i2c_init(); |
639 | ||
d5e13227 | 640 | omap_display_init(&omap3_evm_dss_data); |
53c5ec31 | 641 | |
53c5ec31 | 642 | omap_serial_init(); |
1a4f4637 | 643 | |
e8e2ff46 GAK |
644 | /* OMAP3EVM uses ISP1504 phy and so register nop transceiver */ |
645 | usb_nop_xceiv_register(); | |
1a4f4637 | 646 | |
e8e51d29 AKG |
647 | if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2) { |
648 | /* enable EHCI VBUS using GPIO22 */ | |
bc593f5d | 649 | omap_mux_init_gpio(OMAP3_EVM_EHCI_VBUS, OMAP_PIN_INPUT_PULLUP); |
e8e51d29 | 650 | /* Select EHCI port on main board */ |
bc593f5d IG |
651 | omap_mux_init_gpio(OMAP3_EVM_EHCI_SELECT, |
652 | OMAP_PIN_INPUT_PULLUP); | |
653 | gpio_request_array(omap3_evm_ehci_gpios, | |
654 | ARRAY_SIZE(omap3_evm_ehci_gpios)); | |
e8e51d29 AKG |
655 | |
656 | /* setup EHCI phy reset config */ | |
4896e394 | 657 | omap_mux_init_gpio(21, OMAP_PIN_INPUT_PULLUP); |
181b250c | 658 | usbhs_bdata.reset_gpio_port[1] = 21; |
e8e51d29 | 659 | |
58815fa3 AKG |
660 | /* EVM REV >= E can supply 500mA with EXTVBUS programming */ |
661 | musb_board_data.power = 500; | |
662 | musb_board_data.extvbus = 1; | |
e8e51d29 AKG |
663 | } else { |
664 | /* setup EHCI phy reset on MDC */ | |
4896e394 | 665 | omap_mux_init_gpio(135, OMAP_PIN_OUTPUT); |
181b250c | 666 | usbhs_bdata.reset_gpio_port[1] = 135; |
e8e51d29 | 667 | } |
884b8369 | 668 | usb_musb_init(&musb_board_data); |
9e64bb1e | 669 | usbhs_init(&usbhs_bdata); |
96974a24 | 670 | omap_ads7846_init(1, OMAP3_EVM_TS_GPIO, 310, NULL); |
562138a4 | 671 | omap3evm_init_smsc911x(); |
703e3061 | 672 | omap3_evm_display_init(); |
741927f7 ER |
673 | |
674 | #ifdef CONFIG_WL12XX_PLATFORM_DATA | |
675 | /* WL12xx WLAN Init */ | |
676 | if (wl12xx_set_platform_data(&omap3evm_wlan_data)) | |
677 | pr_err("error setting wl12xx data\n"); | |
aca6ad07 | 678 | platform_device_register(&omap3evm_wlan_regulator); |
741927f7 | 679 | #endif |
53c5ec31 SMK |
680 | } |
681 | ||
53c5ec31 SMK |
682 | MACHINE_START(OMAP3EVM, "OMAP3 EVM") |
683 | /* Maintainer: Syed Mohammed Khasim - Texas Instruments */ | |
53c5ec31 | 684 | .boot_params = 0x80000100, |
71ee7dad | 685 | .reserve = omap_reserve, |
3dc3bad6 RKAL |
686 | .map_io = omap3_map_io, |
687 | .init_early = omap3_evm_init_early, | |
741e3a89 | 688 | .init_irq = omap3_init_irq, |
53c5ec31 | 689 | .init_machine = omap3_evm_init, |
e74984e4 | 690 | .timer = &omap3_timer, |
53c5ec31 | 691 | MACHINE_END |