omap: Fix omap_4430sdp_defconfig for make oldconfig
[deliverable/linux.git] / arch / arm / mach-omap2 / board-overo.c
CommitLineData
eba2645a
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1/*
2 * board-overo.c (Gumstix Overo)
3 *
4 * Initial code: Steve Sakoman <steve@sakoman.com>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * version 2 as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
18 * 02110-1301 USA
19 *
20 */
21
22#include <linux/clk.h>
23#include <linux/delay.h>
24#include <linux/err.h>
25#include <linux/init.h>
26#include <linux/io.h>
27#include <linux/kernel.h>
28#include <linux/platform_device.h>
b07682b6 29#include <linux/i2c/twl.h>
bb3b9d8e 30#include <linux/regulator/machine.h>
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31
32#include <linux/mtd/mtd.h>
33#include <linux/mtd/nand.h>
34#include <linux/mtd/partitions.h>
35
36#include <asm/mach-types.h>
37#include <asm/mach/arch.h>
38#include <asm/mach/flash.h>
39#include <asm/mach/map.h>
40
ce491cf8
TL
41#include <plat/board.h>
42#include <plat/common.h>
eba2645a 43#include <mach/gpio.h>
ce491cf8 44#include <plat/gpmc.h>
eba2645a 45#include <mach/hardware.h>
ce491cf8 46#include <plat/nand.h>
ce491cf8 47#include <plat/usb.h>
eba2645a 48
ca5742bd 49#include "mux.h"
2e12bd7e 50#include "sdram-micron-mt46h32m32lf-6.h"
d02a900b 51#include "hsmmc.h"
90c62bf0 52
0d4d9ab0
TL
53#define OVERO_GPIO_BT_XGATE 15
54#define OVERO_GPIO_W2W_NRESET 16
6fd210a9 55#define OVERO_GPIO_PENDOWN 114
0d4d9ab0
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56#define OVERO_GPIO_BT_NRESET 164
57#define OVERO_GPIO_USBH_CPEN 168
58#define OVERO_GPIO_USBH_NRESET 183
59
eba2645a 60#define NAND_BLOCK_SIZE SZ_128K
eba2645a 61
172ef275
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62#define OVERO_SMSC911X_CS 5
63#define OVERO_SMSC911X_GPIO 176
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64#define OVERO_SMSC911X2_CS 4
65#define OVERO_SMSC911X2_GPIO 65
172ef275 66
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67#if defined(CONFIG_TOUCHSCREEN_ADS7846) || \
68 defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
69
ce491cf8 70#include <plat/mcspi.h>
c6a81316
SS
71#include <linux/spi/spi.h>
72#include <linux/spi/ads7846.h>
73
74static struct omap2_mcspi_device_config ads7846_mcspi_config = {
75 .turbo_mode = 0,
76 .single_channel = 1, /* 0: slave, 1: master */
77};
78
79static int ads7846_get_pendown_state(void)
80{
81 return !gpio_get_value(OVERO_GPIO_PENDOWN);
82}
83
84static struct ads7846_platform_data ads7846_config = {
85 .x_max = 0x0fff,
86 .y_max = 0x0fff,
87 .x_plate_ohms = 180,
88 .pressure_max = 255,
89 .debounce_max = 10,
90 .debounce_tol = 3,
91 .debounce_rep = 1,
92 .get_pendown_state = ads7846_get_pendown_state,
93 .keep_vref_on = 1,
94};
95
96static struct spi_board_info overo_spi_board_info[] __initdata = {
97 {
98 .modalias = "ads7846",
99 .bus_num = 1,
100 .chip_select = 0,
101 .max_speed_hz = 1500000,
102 .controller_data = &ads7846_mcspi_config,
103 .irq = OMAP_GPIO_IRQ(OVERO_GPIO_PENDOWN),
104 .platform_data = &ads7846_config,
105 }
106};
107
108static void __init overo_ads7846_init(void)
109{
110 if ((gpio_request(OVERO_GPIO_PENDOWN, "ADS7846_PENDOWN") == 0) &&
111 (gpio_direction_input(OVERO_GPIO_PENDOWN) == 0)) {
112 gpio_export(OVERO_GPIO_PENDOWN, 0);
113 } else {
114 printk(KERN_ERR "could not obtain gpio for ADS7846_PENDOWN\n");
115 return;
116 }
117
118 spi_register_board_info(overo_spi_board_info,
119 ARRAY_SIZE(overo_spi_board_info));
120}
121
122#else
123static inline void __init overo_ads7846_init(void) { return; }
124#endif
125
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126#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
127
128#include <linux/smsc911x.h>
129
130static struct resource overo_smsc911x_resources[] = {
131 {
132 .name = "smsc911x-memory",
133 .flags = IORESOURCE_MEM,
134 },
135 {
136 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
137 },
138};
139
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140static struct resource overo_smsc911x2_resources[] = {
141 {
142 .name = "smsc911x2-memory",
143 .flags = IORESOURCE_MEM,
144 },
145 {
146 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
147 },
148};
149
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150static struct smsc911x_platform_config overo_smsc911x_config = {
151 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
152 .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
153 .flags = SMSC911X_USE_32BIT ,
154 .phy_interface = PHY_INTERFACE_MODE_MII,
155};
156
157static struct platform_device overo_smsc911x_device = {
158 .name = "smsc911x",
5c9a29ed 159 .id = 0,
172ef275 160 .num_resources = ARRAY_SIZE(overo_smsc911x_resources),
5032902c 161 .resource = overo_smsc911x_resources,
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162 .dev = {
163 .platform_data = &overo_smsc911x_config,
164 },
165};
166
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167static struct platform_device overo_smsc911x2_device = {
168 .name = "smsc911x",
169 .id = 1,
170 .num_resources = ARRAY_SIZE(overo_smsc911x2_resources),
171 .resource = overo_smsc911x2_resources,
172 .dev = {
173 .platform_data = &overo_smsc911x_config,
174 },
175};
176
177static struct platform_device *smsc911x_devices[] = {
178 &overo_smsc911x_device,
179 &overo_smsc911x2_device,
180};
181
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182static inline void __init overo_init_smsc911x(void)
183{
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184 unsigned long cs_mem_base, cs_mem_base2;
185
186 /* set up first smsc911x chip */
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187
188 if (gpmc_cs_request(OVERO_SMSC911X_CS, SZ_16M, &cs_mem_base) < 0) {
189 printk(KERN_ERR "Failed request for GPMC mem for smsc911x\n");
190 return;
191 }
192
193 overo_smsc911x_resources[0].start = cs_mem_base + 0x0;
194 overo_smsc911x_resources[0].end = cs_mem_base + 0xff;
195
196 if ((gpio_request(OVERO_SMSC911X_GPIO, "SMSC911X IRQ") == 0) &&
197 (gpio_direction_input(OVERO_SMSC911X_GPIO) == 0)) {
198 gpio_export(OVERO_SMSC911X_GPIO, 0);
199 } else {
200 printk(KERN_ERR "could not obtain gpio for SMSC911X IRQ\n");
201 return;
202 }
203
204 overo_smsc911x_resources[1].start = OMAP_GPIO_IRQ(OVERO_SMSC911X_GPIO);
205 overo_smsc911x_resources[1].end = 0;
206
a5ba7ae2
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207 /* set up second smsc911x chip */
208
209 if (gpmc_cs_request(OVERO_SMSC911X2_CS, SZ_16M, &cs_mem_base2) < 0) {
210 printk(KERN_ERR "Failed request for GPMC mem for smsc911x2\n");
211 return;
212 }
213
214 overo_smsc911x2_resources[0].start = cs_mem_base2 + 0x0;
215 overo_smsc911x2_resources[0].end = cs_mem_base2 + 0xff;
216
217 if ((gpio_request(OVERO_SMSC911X2_GPIO, "SMSC911X2 IRQ") == 0) &&
218 (gpio_direction_input(OVERO_SMSC911X2_GPIO) == 0)) {
219 gpio_export(OVERO_SMSC911X2_GPIO, 0);
220 } else {
221 printk(KERN_ERR "could not obtain gpio for SMSC911X2 IRQ\n");
222 return;
223 }
224
225 overo_smsc911x2_resources[1].start = OMAP_GPIO_IRQ(OVERO_SMSC911X2_GPIO);
226 overo_smsc911x2_resources[1].end = 0;
227
228 platform_add_devices(smsc911x_devices, ARRAY_SIZE(smsc911x_devices));
172ef275
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229}
230
231#else
232static inline void __init overo_init_smsc911x(void) { return; }
233#endif
234
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235static struct mtd_partition overo_nand_partitions[] = {
236 {
237 .name = "xloader",
238 .offset = 0, /* Offset = 0x00000 */
239 .size = 4 * NAND_BLOCK_SIZE,
240 .mask_flags = MTD_WRITEABLE
241 },
242 {
243 .name = "uboot",
244 .offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */
245 .size = 14 * NAND_BLOCK_SIZE,
246 },
247 {
248 .name = "uboot environment",
249 .offset = MTDPART_OFS_APPEND, /* Offset = 0x240000 */
250 .size = 2 * NAND_BLOCK_SIZE,
251 },
252 {
253 .name = "linux",
254 .offset = MTDPART_OFS_APPEND, /* Offset = 0x280000 */
255 .size = 32 * NAND_BLOCK_SIZE,
256 },
257 {
258 .name = "rootfs",
259 .offset = MTDPART_OFS_APPEND, /* Offset = 0x680000 */
260 .size = MTDPART_SIZ_FULL,
261 },
262};
263
264static struct omap_nand_platform_data overo_nand_data = {
265 .parts = overo_nand_partitions,
266 .nr_parts = ARRAY_SIZE(overo_nand_partitions),
267 .dma_channel = -1, /* disable DMA in OMAP NAND driver */
268};
269
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270static void __init overo_flash_init(void)
271{
272 u8 cs = 0;
273 u8 nandcs = GPMC_CS_NUM + 1;
274
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275 /* find out the chip-select on which NAND exists */
276 while (cs < GPMC_CS_NUM) {
277 u32 ret = 0;
278 ret = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1);
279
280 if ((ret & 0xC00) == 0x800) {
281 printk(KERN_INFO "Found NAND on CS%d\n", cs);
282 if (nandcs > GPMC_CS_NUM)
283 nandcs = cs;
284 }
285 cs++;
286 }
287
288 if (nandcs > GPMC_CS_NUM) {
289 printk(KERN_INFO "NAND: Unable to find configuration "
290 "in GPMC\n ");
291 return;
292 }
293
294 if (nandcs < GPMC_CS_NUM) {
295 overo_nand_data.cs = nandcs;
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296
297 printk(KERN_INFO "Registering NAND on CS%d\n", nandcs);
f450d867 298 if (gpmc_nand_init(&overo_nand_data) < 0)
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299 printk(KERN_ERR "Unable to register NAND device\n");
300 }
301}
eba2645a 302
68ff0423 303static struct omap2_hsmmc_info mmc[] = {
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DB
304 {
305 .mmc = 1,
306 .wires = 4,
307 .gpio_cd = -EINVAL,
308 .gpio_wp = -EINVAL,
309 },
310 {
311 .mmc = 2,
312 .wires = 4,
313 .gpio_cd = -EINVAL,
314 .gpio_wp = -EINVAL,
315 .transceiver = true,
316 .ocr_mask = 0x00100000, /* 3.3V */
317 },
318 {} /* Terminator */
319};
320
321static struct regulator_consumer_supply overo_vmmc1_supply = {
322 .supply = "vmmc",
323};
324
325static int overo_twl_gpio_setup(struct device *dev,
326 unsigned gpio, unsigned ngpio)
327{
68ff0423 328 omap2_hsmmc_init(mmc);
bb3b9d8e
DB
329
330 overo_vmmc1_supply.dev = mmc[0].dev;
331
332 return 0;
333}
334
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335static struct twl4030_gpio_platform_data overo_gpio_data = {
336 .gpio_base = OMAP_MAX_GPIO_LINES,
337 .irq_base = TWL4030_GPIO_IRQ_BASE,
338 .irq_end = TWL4030_GPIO_IRQ_END,
bb3b9d8e
DB
339 .setup = overo_twl_gpio_setup,
340};
341
342static struct twl4030_usb_data overo_usb_data = {
343 .usb_mode = T2_USB_MODE_ULPI,
344};
345
346static struct regulator_init_data overo_vmmc1 = {
347 .constraints = {
348 .min_uV = 1850000,
349 .max_uV = 3150000,
350 .valid_modes_mask = REGULATOR_MODE_NORMAL
351 | REGULATOR_MODE_STANDBY,
352 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
353 | REGULATOR_CHANGE_MODE
354 | REGULATOR_CHANGE_STATUS,
355 },
356 .num_consumer_supplies = 1,
357 .consumer_supplies = &overo_vmmc1_supply,
90c62bf0
TL
358};
359
e86fa0b4
PU
360static struct twl4030_codec_audio_data overo_audio_data = {
361 .audio_mclk = 26000000,
362};
363
364static struct twl4030_codec_data overo_codec_data = {
6df74efb 365 .audio_mclk = 26000000,
e86fa0b4
PU
366 .audio = &overo_audio_data,
367};
368
bb3b9d8e
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369/* mmc2 (WLAN) and Bluetooth don't use twl4030 regulators */
370
90c62bf0
TL
371static struct twl4030_platform_data overo_twldata = {
372 .irq_base = TWL4030_IRQ_BASE,
373 .irq_end = TWL4030_IRQ_END,
374 .gpio = &overo_gpio_data,
bb3b9d8e 375 .usb = &overo_usb_data,
e86fa0b4 376 .codec = &overo_codec_data,
bb3b9d8e 377 .vmmc1 = &overo_vmmc1,
90c62bf0
TL
378};
379
380static struct i2c_board_info __initdata overo_i2c_boardinfo[] = {
381 {
bb3b9d8e 382 I2C_BOARD_INFO("tps65950", 0x48),
90c62bf0
TL
383 .flags = I2C_CLIENT_WAKE,
384 .irq = INT_34XX_SYS_NIRQ,
385 .platform_data = &overo_twldata,
386 },
387};
388
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389static int __init overo_i2c_init(void)
390{
90c62bf0
TL
391 omap_register_i2c_bus(1, 2600, overo_i2c_boardinfo,
392 ARRAY_SIZE(overo_i2c_boardinfo));
eba2645a
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393 /* i2c2 pins are used for gpio */
394 omap_register_i2c_bus(3, 400, NULL, 0);
395 return 0;
396}
397
eba2645a
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398static struct platform_device overo_lcd_device = {
399 .name = "overo_lcd",
400 .id = -1,
401};
402
403static struct omap_lcd_config overo_lcd_config __initdata = {
404 .ctrl_name = "internal",
405};
406
407static struct omap_board_config_kernel overo_config[] __initdata = {
eba2645a
SS
408 { OMAP_TAG_LCD, &overo_lcd_config },
409};
410
b3c6df3a
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411static void __init overo_init_irq(void)
412{
413 omap_board_config = overo_config;
414 omap_board_config_size = ARRAY_SIZE(overo_config);
415 omap2_init_common_hw(mt46h32m32lf6_sdrc_params,
416 mt46h32m32lf6_sdrc_params);
417 omap_init_irq();
418 omap_gpio_init();
419}
420
eba2645a
SS
421static struct platform_device *overo_devices[] __initdata = {
422 &overo_lcd_device,
423};
424
6f69a181 425static const struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
58a5491c
FB
426 .port_mode[0] = EHCI_HCD_OMAP_MODE_UNKNOWN,
427 .port_mode[1] = EHCI_HCD_OMAP_MODE_PHY,
428 .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN,
429
430 .phy_reset = true,
431 .reset_gpio_port[0] = -EINVAL,
432 .reset_gpio_port[1] = OVERO_GPIO_USBH_NRESET,
433 .reset_gpio_port[2] = -EINVAL
434};
435
ca5742bd
TL
436#ifdef CONFIG_OMAP_MUX
437static struct omap_board_mux board_mux[] __initdata = {
438 { .reg_offset = OMAP_MUX_TERMINATOR },
439};
440#else
441#define board_mux NULL
442#endif
58a5491c 443
884b8369
MM
444static struct omap_musb_board_data musb_board_data = {
445 .interface_type = MUSB_INTERFACE_ULPI,
446 .mode = MUSB_OTG,
447 .power = 100,
448};
449
eba2645a
SS
450static void __init overo_init(void)
451{
ca5742bd 452 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
eba2645a
SS
453 overo_i2c_init();
454 platform_add_devices(overo_devices, ARRAY_SIZE(overo_devices));
eba2645a
SS
455 omap_serial_init();
456 overo_flash_init();
884b8369 457 usb_musb_init(&musb_board_data);
58a5491c 458 usb_ehci_init(&ehci_pdata);
c6a81316 459 overo_ads7846_init();
172ef275 460 overo_init_smsc911x();
eba2645a 461
9fb97412 462 /* Ensure SDRC pins are mux'd for self-refresh */
4896e394
TL
463 omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT);
464 omap_mux_init_signal("sdrc_cke1", OMAP_PIN_OUTPUT);
9fb97412 465
eba2645a
SS
466 if ((gpio_request(OVERO_GPIO_W2W_NRESET,
467 "OVERO_GPIO_W2W_NRESET") == 0) &&
468 (gpio_direction_output(OVERO_GPIO_W2W_NRESET, 1) == 0)) {
469 gpio_export(OVERO_GPIO_W2W_NRESET, 0);
470 gpio_set_value(OVERO_GPIO_W2W_NRESET, 0);
471 udelay(10);
472 gpio_set_value(OVERO_GPIO_W2W_NRESET, 1);
473 } else {
474 printk(KERN_ERR "could not obtain gpio for "
475 "OVERO_GPIO_W2W_NRESET\n");
476 }
477
478 if ((gpio_request(OVERO_GPIO_BT_XGATE, "OVERO_GPIO_BT_XGATE") == 0) &&
479 (gpio_direction_output(OVERO_GPIO_BT_XGATE, 0) == 0))
480 gpio_export(OVERO_GPIO_BT_XGATE, 0);
481 else
482 printk(KERN_ERR "could not obtain gpio for OVERO_GPIO_BT_XGATE\n");
483
484 if ((gpio_request(OVERO_GPIO_BT_NRESET, "OVERO_GPIO_BT_NRESET") == 0) &&
485 (gpio_direction_output(OVERO_GPIO_BT_NRESET, 1) == 0)) {
486 gpio_export(OVERO_GPIO_BT_NRESET, 0);
487 gpio_set_value(OVERO_GPIO_BT_NRESET, 0);
488 mdelay(6);
489 gpio_set_value(OVERO_GPIO_BT_NRESET, 1);
490 } else {
491 printk(KERN_ERR "could not obtain gpio for "
492 "OVERO_GPIO_BT_NRESET\n");
493 }
494
495 if ((gpio_request(OVERO_GPIO_USBH_CPEN, "OVERO_GPIO_USBH_CPEN") == 0) &&
496 (gpio_direction_output(OVERO_GPIO_USBH_CPEN, 1) == 0))
497 gpio_export(OVERO_GPIO_USBH_CPEN, 0);
498 else
499 printk(KERN_ERR "could not obtain gpio for "
500 "OVERO_GPIO_USBH_CPEN\n");
eba2645a
SS
501}
502
eba2645a
SS
503MACHINE_START(OVERO, "Gumstix Overo")
504 .phys_io = 0x48000000,
b4224b23 505 .io_pg_offst = ((0xfa000000) >> 18) & 0xfffc,
eba2645a 506 .boot_params = 0x80000100,
869fef41 507 .map_io = omap3_map_io,
71ee7dad 508 .reserve = omap_reserve,
eba2645a
SS
509 .init_irq = overo_init_irq,
510 .init_machine = overo_init,
511 .timer = &omap_timer,
512MACHINE_END
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