Merge branch 'vmwgfx-fixes-3.13' of git://people.freedesktop.org/~thomash/linux into...
[deliverable/linux.git] / arch / arm / mach-omap2 / board-rx51-peripherals.c
CommitLineData
ffe7f95b 1/*
9312fffb 2 * linux/arch/arm/mach-omap2/board-rx51-peripherals.c
ffe7f95b
LL
3 *
4 * Copyright (C) 2008-2009 Nokia
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/platform_device.h>
14#include <linux/input.h>
6135434a 15#include <linux/input/matrix_keypad.h>
ffe7f95b 16#include <linux/spi/spi.h>
c1f9a095 17#include <linux/wl12xx.h>
3dad5356 18#include <linux/spi/tsc2005.h>
ffe7f95b 19#include <linux/i2c.h>
ebeb53e1 20#include <linux/i2c/twl.h>
ffe7f95b
LL
21#include <linux/clk.h>
22#include <linux/delay.h>
23#include <linux/regulator/machine.h>
24#include <linux/gpio.h>
f014ee32 25#include <linux/gpio_keys.h>
5e763d29 26#include <linux/mmc/host.h>
10299e2e 27#include <linux/power/isp1704_charger.h>
2203747c
AB
28#include <linux/platform_data/spi-omap2-mcspi.h>
29#include <linux/platform_data/mtd-onenand-omap2.h>
30
9f97da78 31#include <asm/system_info.h>
ffe7f95b 32
4e65331c 33#include "common.h"
45c3eb7d 34#include <linux/omap-dma.h>
60628152 35#include "gpmc-smc91x.h"
ffe7f95b 36
0a6f98c9 37#include "board-rx51.h"
04aeae77 38
87581fd4 39#include <sound/tlv320aic3x.h>
64d06691 40#include <sound/tpa6130a2-plat.h>
589541c0
JN
41#include <media/radio-si4713.h>
42#include <media/si4713.h>
df4094d2 43#include <linux/platform_data/leds-lp55xx.h>
87581fd4 44
9c2251dd 45#include <linux/platform_data/tsl2563.h>
3b511201 46#include <linux/lis3lv02d.h>
70b5d737 47
2320dc6f
TV
48#include <video/omap-panel-data.h>
49
322c183c
TK
50#if defined(CONFIG_IR_RX51) || defined(CONFIG_IR_RX51_MODULE)
51#include <media/ir-rx51.h>
52#endif
53
4896e394 54#include "mux.h"
1d5aef49 55#include "omap-pm.h"
d02a900b 56#include "hsmmc.h"
fbd8071c 57#include "common-board-devices.h"
99f0b8d6 58#include "gpmc.h"
b6ab13e7 59#include "gpmc-onenand.h"
d2065e2b
PR
60#include "soc.h"
61#include "omap-secure.h"
ffe7f95b 62
f52eeee8
AH
63#define SYSTEM_REV_B_USES_VAUX3 0x1699
64#define SYSTEM_REV_S_USES_VAUX3 0x8
65
a24e61a9
KV
66#define RX51_WL1251_POWER_GPIO 87
67#define RX51_WL1251_IRQ_GPIO 42
589541c0
JN
68#define RX51_FMTX_RESET_GPIO 163
69#define RX51_FMTX_IRQ 53
eeada9e8 70#define RX51_LP5523_CHIP_EN_GPIO 41
a24e61a9 71
10299e2e
KJ
72#define RX51_USB_TRANSCEIVER_RST_GPIO 67
73
3dad5356
AK
74#define RX51_TSC2005_RESET_GPIO 104
75#define RX51_TSC2005_IRQ_GPIO 100
76
3b511201
AP
77#define LIS302_IRQ1_GPIO 181
78#define LIS302_IRQ2_GPIO 180 /* Not yet in use */
79
e65f131a 80/* List all SPI devices here. Note that the list/probe order seems to matter! */
a24e61a9
KV
81enum {
82 RX51_SPI_WL1251,
6996e7ff 83 RX51_SPI_TSC2005, /* Touch Controller */
e65f131a 84 RX51_SPI_MIPID, /* LCD panel */
a24e61a9
KV
85};
86
87static struct wl12xx_platform_data wl1251_pdata;
3dad5356 88static struct tsc2005_platform_data tsc2005_pdata;
a24e61a9 89
3b511201
AP
90#if defined(CONFIG_SENSORS_LIS3_I2C) || defined(CONFIG_SENSORS_LIS3_I2C_MODULE)
91static int lis302_setup(void)
92{
93 int err;
94 int irq1 = LIS302_IRQ1_GPIO;
95 int irq2 = LIS302_IRQ2_GPIO;
96
97 /* gpio for interrupt pin 1 */
98 err = gpio_request(irq1, "lis3lv02dl_irq1");
99 if (err) {
100 printk(KERN_ERR "lis3lv02dl: gpio request failed\n");
101 goto out;
102 }
103
104 /* gpio for interrupt pin 2 */
105 err = gpio_request(irq2, "lis3lv02dl_irq2");
106 if (err) {
107 gpio_free(irq1);
108 printk(KERN_ERR "lis3lv02dl: gpio request failed\n");
109 goto out;
110 }
111
112 gpio_direction_input(irq1);
113 gpio_direction_input(irq2);
114
115out:
116 return err;
117}
118
119static int lis302_release(void)
120{
121 gpio_free(LIS302_IRQ1_GPIO);
122 gpio_free(LIS302_IRQ2_GPIO);
123
124 return 0;
125}
126
127static struct lis3lv02d_platform_data rx51_lis3lv02d_data = {
128 .click_flags = LIS3_CLICK_SINGLE_X | LIS3_CLICK_SINGLE_Y |
129 LIS3_CLICK_SINGLE_Z,
130 /* Limits are 0.5g * value */
131 .click_thresh_x = 8,
132 .click_thresh_y = 8,
133 .click_thresh_z = 10,
134 /* Click must be longer than time limit */
135 .click_time_limit = 9,
136 /* Kind of debounce filter */
137 .click_latency = 50,
138
139 /* Limits for all axis. millig-value / 18 to get HW values */
140 .wakeup_flags = LIS3_WAKEUP_X_HI | LIS3_WAKEUP_Y_HI,
141 .wakeup_thresh = 800 / 18,
142 .wakeup_flags2 = LIS3_WAKEUP_Z_HI ,
143 .wakeup_thresh2 = 900 / 18,
144
145 .hipass_ctrl = LIS3_HIPASS1_DISABLE | LIS3_HIPASS2_DISABLE,
146
147 /* Interrupt line 2 for click detection, line 1 for thresholds */
148 .irq_cfg = LIS3_IRQ2_CLICK | LIS3_IRQ1_FF_WU_12,
149
150 .axis_x = LIS3_DEV_X,
151 .axis_y = LIS3_INV_DEV_Y,
152 .axis_z = LIS3_INV_DEV_Z,
153 .setup_resources = lis302_setup,
154 .release_resources = lis302_release,
155 .st_min_limits = {-32, 3, 3},
156 .st_max_limits = {-3, 32, 32},
3b511201
AP
157};
158#endif
159
70b5d737
MN
160#if defined(CONFIG_SENSORS_TSL2563) || defined(CONFIG_SENSORS_TSL2563_MODULE)
161static struct tsl2563_platform_data rx51_tsl2563_platform_data = {
162 .cover_comp_gain = 16,
163};
164#endif
165
eeada9e8 166#if defined(CONFIG_LEDS_LP5523) || defined(CONFIG_LEDS_LP5523_MODULE)
df4094d2 167static struct lp55xx_led_config rx51_lp5523_led_config[] = {
eeada9e8 168 {
1e7bf5e3 169 .name = "lp5523:kb1",
eeada9e8
AP
170 .chan_nr = 0,
171 .led_current = 50,
d1f1ca36 172 .max_current = 100,
eeada9e8 173 }, {
1e7bf5e3 174 .name = "lp5523:kb2",
eeada9e8
AP
175 .chan_nr = 1,
176 .led_current = 50,
d1f1ca36 177 .max_current = 100,
eeada9e8 178 }, {
1e7bf5e3 179 .name = "lp5523:kb3",
eeada9e8
AP
180 .chan_nr = 2,
181 .led_current = 50,
d1f1ca36 182 .max_current = 100,
eeada9e8 183 }, {
1e7bf5e3 184 .name = "lp5523:kb4",
eeada9e8
AP
185 .chan_nr = 3,
186 .led_current = 50,
d1f1ca36 187 .max_current = 100,
eeada9e8 188 }, {
1e7bf5e3 189 .name = "lp5523:b",
eeada9e8
AP
190 .chan_nr = 4,
191 .led_current = 50,
d1f1ca36 192 .max_current = 100,
eeada9e8 193 }, {
1e7bf5e3 194 .name = "lp5523:g",
eeada9e8
AP
195 .chan_nr = 5,
196 .led_current = 50,
d1f1ca36 197 .max_current = 100,
eeada9e8 198 }, {
1e7bf5e3 199 .name = "lp5523:r",
eeada9e8
AP
200 .chan_nr = 6,
201 .led_current = 50,
d1f1ca36 202 .max_current = 100,
eeada9e8 203 }, {
1e7bf5e3 204 .name = "lp5523:kb5",
eeada9e8
AP
205 .chan_nr = 7,
206 .led_current = 50,
d1f1ca36 207 .max_current = 100,
eeada9e8 208 }, {
1e7bf5e3 209 .name = "lp5523:kb6",
eeada9e8
AP
210 .chan_nr = 8,
211 .led_current = 50,
d1f1ca36 212 .max_current = 100,
eeada9e8
AP
213 }
214};
215
df4094d2 216static struct lp55xx_platform_data rx51_lp5523_platform_data = {
eeada9e8
AP
217 .led_config = rx51_lp5523_led_config,
218 .num_channels = ARRAY_SIZE(rx51_lp5523_led_config),
df4094d2 219 .clock_mode = LP55XX_CLOCK_AUTO,
30dae2f9 220 .enable_gpio = RX51_LP5523_CHIP_EN_GPIO,
eeada9e8
AP
221};
222#endif
223
2320dc6f
TV
224#define RX51_LCD_RESET_GPIO 90
225
226static struct panel_acx565akm_platform_data acx_pdata = {
227 .name = "lcd",
228 .source = "sdi.0",
229 .reset_gpio = RX51_LCD_RESET_GPIO,
230 .datapairs = 2,
231};
232
a24e61a9
KV
233static struct omap2_mcspi_device_config wl1251_mcspi_config = {
234 .turbo_mode = 0,
a24e61a9
KV
235};
236
03e11104
RQ
237static struct omap2_mcspi_device_config mipid_mcspi_config = {
238 .turbo_mode = 0,
03e11104
RQ
239};
240
6996e7ff
RQ
241static struct omap2_mcspi_device_config tsc2005_mcspi_config = {
242 .turbo_mode = 0,
6996e7ff
RQ
243};
244
a24e61a9
KV
245static struct spi_board_info rx51_peripherals_spi_board_info[] __initdata = {
246 [RX51_SPI_WL1251] = {
247 .modalias = "wl1251",
248 .bus_num = 4,
249 .chip_select = 0,
250 .max_speed_hz = 48000000,
860fc976 251 .mode = SPI_MODE_3,
a24e61a9
KV
252 .controller_data = &wl1251_mcspi_config,
253 .platform_data = &wl1251_pdata,
254 },
03e11104
RQ
255 [RX51_SPI_MIPID] = {
256 .modalias = "acx565akm",
257 .bus_num = 1,
258 .chip_select = 2,
259 .max_speed_hz = 6000000,
260 .controller_data = &mipid_mcspi_config,
2320dc6f 261 .platform_data = &acx_pdata,
03e11104 262 },
6996e7ff
RQ
263 [RX51_SPI_TSC2005] = {
264 .modalias = "tsc2005",
265 .bus_num = 1,
266 .chip_select = 0,
6996e7ff
RQ
267 .max_speed_hz = 6000000,
268 .controller_data = &tsc2005_mcspi_config,
3dad5356 269 .platform_data = &tsc2005_pdata,
6996e7ff 270 },
a24e61a9
KV
271};
272
7605c0b0
PR
273static struct platform_device rx51_battery_device = {
274 .name = "rx51-battery",
275 .id = -1,
276};
277
10299e2e
KJ
278static void rx51_charger_set_power(bool on)
279{
280 gpio_set_value(RX51_USB_TRANSCEIVER_RST_GPIO, on);
281}
282
283static struct isp1704_charger_data rx51_charger_data = {
284 .set_power = rx51_charger_set_power,
285};
286
fd0964c5 287static struct platform_device rx51_charger_device = {
10299e2e
KJ
288 .name = "isp1704_charger",
289 .dev = {
290 .platform_data = &rx51_charger_data,
291 },
fd0964c5
HK
292};
293
10299e2e
KJ
294static void __init rx51_charger_init(void)
295{
296 WARN_ON(gpio_request_one(RX51_USB_TRANSCEIVER_RST_GPIO,
e5fe29c7 297 GPIOF_OUT_INIT_HIGH, "isp1704_reset"));
10299e2e 298
7605c0b0 299 platform_device_register(&rx51_battery_device);
10299e2e
KJ
300 platform_device_register(&rx51_charger_device);
301}
302
f014ee32
JN
303#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
304
305#define RX51_GPIO_CAMERA_LENS_COVER 110
306#define RX51_GPIO_CAMERA_FOCUS 68
307#define RX51_GPIO_CAMERA_CAPTURE 69
308#define RX51_GPIO_KEYPAD_SLIDE 71
309#define RX51_GPIO_LOCK_BUTTON 113
310#define RX51_GPIO_PROXIMITY 89
311
312#define RX51_GPIO_DEBOUNCE_TIMEOUT 10
313
314static struct gpio_keys_button rx51_gpio_keys[] = {
315 {
316 .desc = "Camera Lens Cover",
317 .type = EV_SW,
318 .code = SW_CAMERA_LENS_COVER,
319 .gpio = RX51_GPIO_CAMERA_LENS_COVER,
320 .active_low = 1,
321 .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT,
322 }, {
323 .desc = "Camera Focus",
324 .type = EV_KEY,
325 .code = KEY_CAMERA_FOCUS,
326 .gpio = RX51_GPIO_CAMERA_FOCUS,
327 .active_low = 1,
328 .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT,
329 }, {
330 .desc = "Camera Capture",
331 .type = EV_KEY,
332 .code = KEY_CAMERA,
333 .gpio = RX51_GPIO_CAMERA_CAPTURE,
334 .active_low = 1,
335 .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT,
336 }, {
337 .desc = "Lock Button",
338 .type = EV_KEY,
339 .code = KEY_SCREENLOCK,
340 .gpio = RX51_GPIO_LOCK_BUTTON,
341 .active_low = 1,
342 .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT,
343 }, {
344 .desc = "Keypad Slide",
345 .type = EV_SW,
346 .code = SW_KEYPAD_SLIDE,
347 .gpio = RX51_GPIO_KEYPAD_SLIDE,
348 .active_low = 1,
349 .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT,
350 }, {
351 .desc = "Proximity Sensor",
352 .type = EV_SW,
353 .code = SW_FRONT_PROXIMITY,
354 .gpio = RX51_GPIO_PROXIMITY,
355 .active_low = 0,
356 .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT,
357 }
358};
359
360static struct gpio_keys_platform_data rx51_gpio_keys_data = {
361 .buttons = rx51_gpio_keys,
362 .nbuttons = ARRAY_SIZE(rx51_gpio_keys),
363};
364
365static struct platform_device rx51_gpio_keys_device = {
366 .name = "gpio-keys",
367 .id = -1,
368 .dev = {
369 .platform_data = &rx51_gpio_keys_data,
370 },
371};
372
373static void __init rx51_add_gpio_keys(void)
374{
375 platform_device_register(&rx51_gpio_keys_device);
376}
377#else
378static void __init rx51_add_gpio_keys(void)
379{
380}
381#endif /* CONFIG_KEYBOARD_GPIO || CONFIG_KEYBOARD_GPIO_MODULE */
382
bead4375 383static uint32_t board_keymap[] = {
3fea6026
DT
384 /*
385 * Note that KEY(x, 8, KEY_XXX) entries represent "entrire row
386 * connected to the ground" matrix state.
387 */
ffe7f95b 388 KEY(0, 0, KEY_Q),
acf442dc
AK
389 KEY(0, 1, KEY_O),
390 KEY(0, 2, KEY_P),
391 KEY(0, 3, KEY_COMMA),
392 KEY(0, 4, KEY_BACKSPACE),
393 KEY(0, 6, KEY_A),
394 KEY(0, 7, KEY_S),
3fea6026 395
acf442dc 396 KEY(1, 0, KEY_W),
ffe7f95b 397 KEY(1, 1, KEY_D),
acf442dc
AK
398 KEY(1, 2, KEY_F),
399 KEY(1, 3, KEY_G),
400 KEY(1, 4, KEY_H),
401 KEY(1, 5, KEY_J),
402 KEY(1, 6, KEY_K),
403 KEY(1, 7, KEY_L),
3fea6026 404
acf442dc
AK
405 KEY(2, 0, KEY_E),
406 KEY(2, 1, KEY_DOT),
ffe7f95b 407 KEY(2, 2, KEY_UP),
acf442dc
AK
408 KEY(2, 3, KEY_ENTER),
409 KEY(2, 5, KEY_Z),
410 KEY(2, 6, KEY_X),
411 KEY(2, 7, KEY_C),
3fea6026
DT
412 KEY(2, 8, KEY_F9),
413
acf442dc
AK
414 KEY(3, 0, KEY_R),
415 KEY(3, 1, KEY_V),
416 KEY(3, 2, KEY_B),
ffe7f95b 417 KEY(3, 3, KEY_N),
acf442dc
AK
418 KEY(3, 4, KEY_M),
419 KEY(3, 5, KEY_SPACE),
420 KEY(3, 6, KEY_SPACE),
421 KEY(3, 7, KEY_LEFT),
3fea6026 422
acf442dc
AK
423 KEY(4, 0, KEY_T),
424 KEY(4, 1, KEY_DOWN),
425 KEY(4, 2, KEY_RIGHT),
ffe7f95b 426 KEY(4, 4, KEY_LEFTCTRL),
acf442dc
AK
427 KEY(4, 5, KEY_RIGHTALT),
428 KEY(4, 6, KEY_LEFTSHIFT),
2e65a207 429 KEY(4, 8, KEY_F10),
3fea6026 430
acf442dc 431 KEY(5, 0, KEY_Y),
2e65a207 432 KEY(5, 8, KEY_F11),
3fea6026 433
acf442dc 434 KEY(6, 0, KEY_U),
3fea6026 435
acf442dc
AK
436 KEY(7, 0, KEY_I),
437 KEY(7, 1, KEY_F7),
438 KEY(7, 2, KEY_F8),
ffe7f95b
LL
439};
440
4f543332
TL
441static struct matrix_keymap_data board_map_data = {
442 .keymap = board_keymap,
443 .keymap_size = ARRAY_SIZE(board_keymap),
444};
445
ffe7f95b 446static struct twl4030_keypad_data rx51_kp_data = {
4f543332 447 .keymap_data = &board_map_data,
ffe7f95b
LL
448 .rows = 8,
449 .cols = 8,
ffe7f95b
LL
450 .rep = 1,
451};
452
ce6f0016
AH
453/* Enable input logic and pull all lines up when eMMC is on. */
454static struct omap_board_mux rx51_mmc2_on_mux[] = {
455 OMAP3_MUX(SDMMC2_CMD, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
456 OMAP3_MUX(SDMMC2_DAT0, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
457 OMAP3_MUX(SDMMC2_DAT1, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
458 OMAP3_MUX(SDMMC2_DAT2, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
459 OMAP3_MUX(SDMMC2_DAT3, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
460 OMAP3_MUX(SDMMC2_DAT4, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
461 OMAP3_MUX(SDMMC2_DAT5, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
462 OMAP3_MUX(SDMMC2_DAT6, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
463 OMAP3_MUX(SDMMC2_DAT7, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
464 { .reg_offset = OMAP_MUX_TERMINATOR },
465};
466
467/* Disable input logic and pull all lines down when eMMC is off. */
468static struct omap_board_mux rx51_mmc2_off_mux[] = {
469 OMAP3_MUX(SDMMC2_CMD, OMAP_PULL_ENA | OMAP_MUX_MODE0),
470 OMAP3_MUX(SDMMC2_DAT0, OMAP_PULL_ENA | OMAP_MUX_MODE0),
471 OMAP3_MUX(SDMMC2_DAT1, OMAP_PULL_ENA | OMAP_MUX_MODE0),
472 OMAP3_MUX(SDMMC2_DAT2, OMAP_PULL_ENA | OMAP_MUX_MODE0),
473 OMAP3_MUX(SDMMC2_DAT3, OMAP_PULL_ENA | OMAP_MUX_MODE0),
474 OMAP3_MUX(SDMMC2_DAT4, OMAP_PULL_ENA | OMAP_MUX_MODE0),
475 OMAP3_MUX(SDMMC2_DAT5, OMAP_PULL_ENA | OMAP_MUX_MODE0),
476 OMAP3_MUX(SDMMC2_DAT6, OMAP_PULL_ENA | OMAP_MUX_MODE0),
477 OMAP3_MUX(SDMMC2_DAT7, OMAP_PULL_ENA | OMAP_MUX_MODE0),
478 { .reg_offset = OMAP_MUX_TERMINATOR },
479};
480
112485e9
BC
481static struct omap_mux_partition *partition;
482
ce6f0016
AH
483/*
484 * Current flows to eMMC when eMMC is off and the data lines are pulled up,
485 * so pull them down. N.B. we pull 8 lines because we are using 8 lines.
486 */
487static void rx51_mmc2_remux(struct device *dev, int slot, int power_on)
488{
489 if (power_on)
112485e9 490 omap_mux_write_array(partition, rx51_mmc2_on_mux);
ce6f0016 491 else
112485e9 492 omap_mux_write_array(partition, rx51_mmc2_off_mux);
ce6f0016
AH
493}
494
68ff0423 495static struct omap2_hsmmc_info mmc[] __initdata = {
ffe7f95b
LL
496 {
497 .name = "external",
498 .mmc = 1,
3a63833e 499 .caps = MMC_CAP_4_BIT_DATA,
ffe7f95b
LL
500 .cover_only = true,
501 .gpio_cd = 160,
502 .gpio_wp = -EINVAL,
5e763d29 503 .power_saving = true,
ffe7f95b
LL
504 },
505 {
506 .name = "internal",
507 .mmc = 2,
3a63833e
SG
508 .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
509 /* See also rx51_mmc2_remux */
ffe7f95b
LL
510 .gpio_cd = -EINVAL,
511 .gpio_wp = -EINVAL,
5e763d29
AH
512 .nonremovable = true,
513 .power_saving = true,
ce6f0016 514 .remux = rx51_mmc2_remux,
ffe7f95b
LL
515 },
516 {} /* Terminator */
517};
518
786b01a8
OD
519static struct regulator_consumer_supply rx51_vmmc1_supply[] = {
520 REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
521};
ffe7f95b 522
664a41b8
LT
523static struct regulator_consumer_supply rx51_vaux2_supply[] = {
524 REGULATOR_SUPPLY("vdds_csib", "omap3isp"),
525};
75ccf268 526
786b01a8
OD
527static struct regulator_consumer_supply rx51_vaux3_supply[] = {
528 REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"),
529};
ffe7f95b 530
786b01a8
OD
531static struct regulator_consumer_supply rx51_vsim_supply[] = {
532 REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.1"),
533};
ffe7f95b 534
4cfcaef1
JN
535static struct regulator_consumer_supply rx51_vmmc2_supplies[] = {
536 /* tlv320aic3x analog supplies */
5c7d9bbe
JN
537 REGULATOR_SUPPLY("AVDD", "2-0018"),
538 REGULATOR_SUPPLY("DRVDD", "2-0018"),
caeeb4aa
JN
539 REGULATOR_SUPPLY("AVDD", "2-0019"),
540 REGULATOR_SUPPLY("DRVDD", "2-0019"),
64d06691
JN
541 /* tpa6130a2 */
542 REGULATOR_SUPPLY("Vdd", "2-0060"),
4cfcaef1 543 /* Keep vmmc as last item. It is not iterated for newer boards */
0005ae73 544 REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"),
4cfcaef1
JN
545};
546
547static struct regulator_consumer_supply rx51_vio_supplies[] = {
548 /* tlv320aic3x digital supplies */
5c7d9bbe
JN
549 REGULATOR_SUPPLY("IOVDD", "2-0018"),
550 REGULATOR_SUPPLY("DVDD", "2-0018"),
caeeb4aa
JN
551 REGULATOR_SUPPLY("IOVDD", "2-0019"),
552 REGULATOR_SUPPLY("DVDD", "2-0019"),
589541c0
JN
553 /* Si4713 IO supply */
554 REGULATOR_SUPPLY("vio", "2-0063"),
17fd8cdb
AK
555 /* lis3lv02d */
556 REGULATOR_SUPPLY("Vdd_IO", "3-001d"),
4cfcaef1
JN
557};
558
0581b52e 559static struct regulator_consumer_supply rx51_vaux1_consumers[] = {
b5b9945b 560 REGULATOR_SUPPLY("vdds_sdi", "omapdss"),
3d85f548 561 REGULATOR_SUPPLY("vdds_sdi", "omapdss_sdi.0"),
589541c0
JN
562 /* Si4713 supply */
563 REGULATOR_SUPPLY("vdd", "2-0063"),
17fd8cdb
AK
564 /* lis3lv02d */
565 REGULATOR_SUPPLY("Vdd", "3-001d"),
0581b52e
RQ
566};
567
ffe7f95b
LL
568static struct regulator_init_data rx51_vaux1 = {
569 .constraints = {
570 .name = "V28",
571 .min_uV = 2800000,
572 .max_uV = 2800000,
000d534e 573 .always_on = true, /* due battery cover sensor */
ffe7f95b
LL
574 .valid_modes_mask = REGULATOR_MODE_NORMAL
575 | REGULATOR_MODE_STANDBY,
576 .valid_ops_mask = REGULATOR_CHANGE_MODE
577 | REGULATOR_CHANGE_STATUS,
578 },
0581b52e
RQ
579 .num_consumer_supplies = ARRAY_SIZE(rx51_vaux1_consumers),
580 .consumer_supplies = rx51_vaux1_consumers,
ffe7f95b
LL
581};
582
583static struct regulator_init_data rx51_vaux2 = {
584 .constraints = {
585 .name = "VCSI",
586 .min_uV = 1800000,
587 .max_uV = 1800000,
588 .valid_modes_mask = REGULATOR_MODE_NORMAL
589 | REGULATOR_MODE_STANDBY,
590 .valid_ops_mask = REGULATOR_CHANGE_MODE
591 | REGULATOR_CHANGE_STATUS,
592 },
664a41b8
LT
593 .num_consumer_supplies = ARRAY_SIZE(rx51_vaux2_supply),
594 .consumer_supplies = rx51_vaux2_supply,
ffe7f95b
LL
595};
596
597/* VAUX3 - adds more power to VIO_18 rail */
f52eeee8 598static struct regulator_init_data rx51_vaux3_cam = {
ffe7f95b
LL
599 .constraints = {
600 .name = "VCAM_DIG_18",
601 .min_uV = 1800000,
602 .max_uV = 1800000,
603 .apply_uV = true,
604 .valid_modes_mask = REGULATOR_MODE_NORMAL
605 | REGULATOR_MODE_STANDBY,
606 .valid_ops_mask = REGULATOR_CHANGE_MODE
607 | REGULATOR_CHANGE_STATUS,
608 },
609};
610
f52eeee8
AH
611static struct regulator_init_data rx51_vaux3_mmc = {
612 .constraints = {
613 .name = "VMMC2_30",
614 .min_uV = 2800000,
615 .max_uV = 3000000,
616 .apply_uV = true,
617 .valid_modes_mask = REGULATOR_MODE_NORMAL
618 | REGULATOR_MODE_STANDBY,
619 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
620 | REGULATOR_CHANGE_MODE
621 | REGULATOR_CHANGE_STATUS,
622 },
786b01a8
OD
623 .num_consumer_supplies = ARRAY_SIZE(rx51_vaux3_supply),
624 .consumer_supplies = rx51_vaux3_supply,
f52eeee8
AH
625};
626
ffe7f95b
LL
627static struct regulator_init_data rx51_vaux4 = {
628 .constraints = {
629 .name = "VCAM_ANA_28",
630 .min_uV = 2800000,
631 .max_uV = 2800000,
632 .apply_uV = true,
633 .valid_modes_mask = REGULATOR_MODE_NORMAL
634 | REGULATOR_MODE_STANDBY,
635 .valid_ops_mask = REGULATOR_CHANGE_MODE
636 | REGULATOR_CHANGE_STATUS,
637 },
638};
639
640static struct regulator_init_data rx51_vmmc1 = {
641 .constraints = {
642 .min_uV = 1850000,
643 .max_uV = 3150000,
644 .valid_modes_mask = REGULATOR_MODE_NORMAL
645 | REGULATOR_MODE_STANDBY,
646 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
647 | REGULATOR_CHANGE_MODE
648 | REGULATOR_CHANGE_STATUS,
649 },
786b01a8
OD
650 .num_consumer_supplies = ARRAY_SIZE(rx51_vmmc1_supply),
651 .consumer_supplies = rx51_vmmc1_supply,
ffe7f95b
LL
652};
653
654static struct regulator_init_data rx51_vmmc2 = {
655 .constraints = {
f2add1de
JN
656 .name = "V28_A",
657 .min_uV = 2800000,
658 .max_uV = 3000000,
2827411e 659 .always_on = true, /* due VIO leak to AIC34 VDDs */
ffe7f95b
LL
660 .apply_uV = true,
661 .valid_modes_mask = REGULATOR_MODE_NORMAL
662 | REGULATOR_MODE_STANDBY,
663 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
664 | REGULATOR_CHANGE_MODE
665 | REGULATOR_CHANGE_STATUS,
666 },
4cfcaef1
JN
667 .num_consumer_supplies = ARRAY_SIZE(rx51_vmmc2_supplies),
668 .consumer_supplies = rx51_vmmc2_supplies,
ffe7f95b
LL
669};
670
094fc559
KJ
671static struct regulator_init_data rx51_vpll1 = {
672 .constraints = {
673 .name = "VPLL",
674 .min_uV = 1800000,
675 .max_uV = 1800000,
676 .apply_uV = true,
677 .always_on = true,
678 .valid_modes_mask = REGULATOR_MODE_NORMAL
679 | REGULATOR_MODE_STANDBY,
680 .valid_ops_mask = REGULATOR_CHANGE_MODE,
681 },
682};
683
684static struct regulator_init_data rx51_vpll2 = {
685 .constraints = {
686 .name = "VSDI_CSI",
687 .min_uV = 1800000,
688 .max_uV = 1800000,
689 .apply_uV = true,
690 .always_on = true,
691 .valid_modes_mask = REGULATOR_MODE_NORMAL
692 | REGULATOR_MODE_STANDBY,
693 .valid_ops_mask = REGULATOR_CHANGE_MODE,
694 },
695};
696
ffe7f95b
LL
697static struct regulator_init_data rx51_vsim = {
698 .constraints = {
699 .name = "VMMC2_IO_18",
700 .min_uV = 1800000,
701 .max_uV = 1800000,
702 .apply_uV = true,
703 .valid_modes_mask = REGULATOR_MODE_NORMAL
704 | REGULATOR_MODE_STANDBY,
705 .valid_ops_mask = REGULATOR_CHANGE_MODE
706 | REGULATOR_CHANGE_STATUS,
707 },
786b01a8
OD
708 .num_consumer_supplies = ARRAY_SIZE(rx51_vsim_supply),
709 .consumer_supplies = rx51_vsim_supply,
ffe7f95b
LL
710};
711
4cfcaef1
JN
712static struct regulator_init_data rx51_vio = {
713 .constraints = {
714 .min_uV = 1800000,
715 .max_uV = 1800000,
716 .valid_modes_mask = REGULATOR_MODE_NORMAL
717 | REGULATOR_MODE_STANDBY,
718 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
719 | REGULATOR_CHANGE_MODE
720 | REGULATOR_CHANGE_STATUS,
721 },
722 .num_consumer_supplies = ARRAY_SIZE(rx51_vio_supplies),
723 .consumer_supplies = rx51_vio_supplies,
724};
725
094fc559
KJ
726static struct regulator_init_data rx51_vintana1 = {
727 .constraints = {
728 .name = "VINTANA1",
729 .min_uV = 1500000,
730 .max_uV = 1500000,
731 .always_on = true,
732 .valid_modes_mask = REGULATOR_MODE_NORMAL
733 | REGULATOR_MODE_STANDBY,
734 .valid_ops_mask = REGULATOR_CHANGE_MODE,
735 },
736};
737
738static struct regulator_init_data rx51_vintana2 = {
739 .constraints = {
740 .name = "VINTANA2",
741 .min_uV = 2750000,
742 .max_uV = 2750000,
743 .apply_uV = true,
744 .always_on = true,
745 .valid_modes_mask = REGULATOR_MODE_NORMAL
746 | REGULATOR_MODE_STANDBY,
747 .valid_ops_mask = REGULATOR_CHANGE_MODE,
748 },
749};
750
751static struct regulator_init_data rx51_vintdig = {
752 .constraints = {
753 .name = "VINTDIG",
754 .min_uV = 1500000,
755 .max_uV = 1500000,
756 .always_on = true,
757 .valid_modes_mask = REGULATOR_MODE_NORMAL
758 | REGULATOR_MODE_STANDBY,
759 .valid_ops_mask = REGULATOR_CHANGE_MODE,
760 },
761};
762
589541c0
JN
763static struct si4713_platform_data rx51_si4713_i2c_data __initdata_or_module = {
764 .gpio_reset = RX51_FMTX_RESET_GPIO,
765};
766
767static struct i2c_board_info rx51_si4713_board_info __initdata_or_module = {
768 I2C_BOARD_INFO("si4713", SI4713_I2C_ADDR_BUSEN_HIGH),
769 .platform_data = &rx51_si4713_i2c_data,
770};
771
772static struct radio_si4713_platform_data rx51_si4713_data __initdata_or_module = {
773 .i2c_bus = 2,
774 .subdev_board_info = &rx51_si4713_board_info,
775};
776
12aee6c6 777static struct platform_device rx51_si4713_dev __initdata_or_module = {
589541c0
JN
778 .name = "radio-si4713",
779 .id = -1,
780 .dev = {
781 .platform_data = &rx51_si4713_data,
782 },
783};
784
785static __init void rx51_init_si4713(void)
786{
787 int err;
788
789 err = gpio_request_one(RX51_FMTX_IRQ, GPIOF_DIR_IN, "si4713 irq");
790 if (err) {
791 printk(KERN_ERR "Cannot request si4713 irq gpio. %d\n", err);
792 return;
793 }
794 rx51_si4713_board_info.irq = gpio_to_irq(RX51_FMTX_IRQ);
795 platform_device_register(&rx51_si4713_dev);
796}
797
ffe7f95b
LL
798static int rx51_twlgpio_setup(struct device *dev, unsigned gpio, unsigned n)
799{
800 /* FIXME this gpio setup is just a placeholder for now */
bc593f5d 801 gpio_request_one(gpio + 6, GPIOF_OUT_INIT_LOW, "backlight_pwm");
c0ad4fac 802 gpio_request_one(gpio + 7, GPIOF_OUT_INIT_LOW, "speaker_en");
ffe7f95b 803
ffe7f95b
LL
804 return 0;
805}
806
807static struct twl4030_gpio_platform_data rx51_gpio_data = {
ffe7f95b
LL
808 .pulldowns = BIT(0) | BIT(1) | BIT(2) | BIT(3)
809 | BIT(4) | BIT(5)
810 | BIT(8) | BIT(9) | BIT(10) | BIT(11)
811 | BIT(12) | BIT(13) | BIT(14) | BIT(15)
812 | BIT(16) | BIT(17) ,
813 .setup = rx51_twlgpio_setup,
814};
815
9312fffb
AK
816static struct twl4030_ins sleep_on_seq[] __initdata = {
817/*
3c684e84 818 * Turn off everything
9312fffb 819 */
3c684e84 820 {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 1, 0, RES_STATE_SLEEP), 2},
9312fffb
AK
821};
822
823static struct twl4030_script sleep_on_script __initdata = {
824 .script = sleep_on_seq,
825 .size = ARRAY_SIZE(sleep_on_seq),
826 .flags = TWL4030_SLEEP_SCRIPT,
827};
828
829static struct twl4030_ins wakeup_seq[] __initdata = {
830/*
3c684e84 831 * Reenable everything
9312fffb 832 */
3c684e84 833 {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 1, 0, RES_STATE_ACTIVE), 2},
9312fffb
AK
834};
835
836static struct twl4030_script wakeup_script __initdata = {
837 .script = wakeup_seq,
838 .size = ARRAY_SIZE(wakeup_seq),
839 .flags = TWL4030_WAKEUP12_SCRIPT,
840};
841
842static struct twl4030_ins wakeup_p3_seq[] __initdata = {
843/*
3c684e84 844 * Reenable everything
9312fffb 845 */
3c684e84 846 {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 1, 0, RES_STATE_ACTIVE), 2},
9312fffb
AK
847};
848
849static struct twl4030_script wakeup_p3_script __initdata = {
850 .script = wakeup_p3_seq,
851 .size = ARRAY_SIZE(wakeup_p3_seq),
852 .flags = TWL4030_WAKEUP3_SCRIPT,
853};
854
855static struct twl4030_ins wrst_seq[] __initdata = {
856/*
857 * Reset twl4030.
858 * Reset VDD1 regulator.
859 * Reset VDD2 regulator.
860 * Reset VPLL1 regulator.
861 * Enable sysclk output.
862 * Reenable twl4030.
863 */
864 {MSG_SINGULAR(DEV_GRP_NULL, RES_RESET, RES_STATE_OFF), 2},
865 {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 0, 1, RES_STATE_ACTIVE),
866 0x13},
9312fffb
AK
867 {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_PP, 0, 3, RES_STATE_OFF), 0x13},
868 {MSG_SINGULAR(DEV_GRP_NULL, RES_VDD1, RES_STATE_WRST), 0x13},
869 {MSG_SINGULAR(DEV_GRP_NULL, RES_VDD2, RES_STATE_WRST), 0x13},
870 {MSG_SINGULAR(DEV_GRP_NULL, RES_VPLL1, RES_STATE_WRST), 0x35},
3c684e84 871 {MSG_SINGULAR(DEV_GRP_P3, RES_HFCLKOUT, RES_STATE_ACTIVE), 2},
9312fffb
AK
872 {MSG_SINGULAR(DEV_GRP_NULL, RES_RESET, RES_STATE_ACTIVE), 2},
873};
874
875static struct twl4030_script wrst_script __initdata = {
876 .script = wrst_seq,
877 .size = ARRAY_SIZE(wrst_seq),
878 .flags = TWL4030_WRST_SCRIPT,
879};
880
881static struct twl4030_script *twl4030_scripts[] __initdata = {
882 /* wakeup12 script should be loaded before sleep script, otherwise a
883 board might hit retention before loading of wakeup script is
884 completed. This can cause boot failures depending on timing issues.
885 */
886 &wakeup_script,
887 &sleep_on_script,
888 &wakeup_p3_script,
889 &wrst_script,
890};
891
892static struct twl4030_resconfig twl4030_rconfig[] __initdata = {
3c684e84
AK
893 { .resource = RES_VDD1, .devgroup = -1,
894 .type = 1, .type2 = -1, .remap_off = RES_STATE_OFF,
895 .remap_sleep = RES_STATE_OFF
896 },
897 { .resource = RES_VDD2, .devgroup = -1,
898 .type = 1, .type2 = -1, .remap_off = RES_STATE_OFF,
899 .remap_sleep = RES_STATE_OFF
900 },
901 { .resource = RES_VPLL1, .devgroup = -1,
902 .type = 1, .type2 = -1, .remap_off = RES_STATE_OFF,
903 .remap_sleep = RES_STATE_OFF
904 },
905 { .resource = RES_VPLL2, .devgroup = -1,
906 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
907 },
908 { .resource = RES_VAUX1, .devgroup = -1,
909 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
910 },
911 { .resource = RES_VAUX2, .devgroup = -1,
912 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
913 },
914 { .resource = RES_VAUX3, .devgroup = -1,
915 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
916 },
917 { .resource = RES_VAUX4, .devgroup = -1,
918 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
919 },
920 { .resource = RES_VMMC1, .devgroup = -1,
921 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
922 },
923 { .resource = RES_VMMC2, .devgroup = -1,
924 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
925 },
926 { .resource = RES_VDAC, .devgroup = -1,
927 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
928 },
929 { .resource = RES_VSIM, .devgroup = -1,
930 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
931 },
932 { .resource = RES_VINTANA1, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
933 .type = -1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
934 },
935 { .resource = RES_VINTANA2, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
936 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
937 },
938 { .resource = RES_VINTDIG, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
939 .type = -1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
940 },
941 { .resource = RES_VIO, .devgroup = DEV_GRP_P3,
942 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
943 },
944 { .resource = RES_CLKEN, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
945 .type = 1, .type2 = -1 , .remap_off = -1, .remap_sleep = -1
946 },
947 { .resource = RES_REGEN, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
948 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
949 },
950 { .resource = RES_NRES_PWRON, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
951 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
952 },
953 { .resource = RES_SYSEN, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
954 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
955 },
956 { .resource = RES_HFCLKOUT, .devgroup = DEV_GRP_P3,
957 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
958 },
959 { .resource = RES_32KCLKOUT, .devgroup = -1,
960 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
961 },
962 { .resource = RES_RESET, .devgroup = -1,
963 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
964 },
d7ac829f 965 { .resource = RES_MAIN_REF, .devgroup = -1,
3c684e84
AK
966 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
967 },
9312fffb
AK
968 { 0, 0},
969};
970
971static struct twl4030_power_data rx51_t2scripts_data __initdata = {
972 .scripts = twl4030_scripts,
973 .num = ARRAY_SIZE(twl4030_scripts),
974 .resource_config = twl4030_rconfig,
975};
976
8c3d4534 977static struct twl4030_vibra_data rx51_vibra_data __initdata = {
b7a834cc
IK
978 .coexist = 0,
979};
980
8c3d4534 981static struct twl4030_audio_data rx51_audio_data __initdata = {
b7a834cc
IK
982 .audio_mclk = 26000000,
983 .vibra = &rx51_vibra_data,
984};
9312fffb 985
9312fffb 986static struct twl4030_platform_data rx51_twldata __initdata = {
ffe7f95b
LL
987 /* platform_data for children goes here */
988 .gpio = &rx51_gpio_data,
989 .keypad = &rx51_kp_data,
9312fffb 990 .power = &rx51_t2scripts_data,
4ae6df5e 991 .audio = &rx51_audio_data,
ffe7f95b
LL
992
993 .vaux1 = &rx51_vaux1,
994 .vaux2 = &rx51_vaux2,
ffe7f95b
LL
995 .vaux4 = &rx51_vaux4,
996 .vmmc1 = &rx51_vmmc1,
094fc559
KJ
997 .vpll1 = &rx51_vpll1,
998 .vpll2 = &rx51_vpll2,
ffe7f95b 999 .vsim = &rx51_vsim,
094fc559
KJ
1000 .vintana1 = &rx51_vintana1,
1001 .vintana2 = &rx51_vintana2,
1002 .vintdig = &rx51_vintdig,
4cfcaef1 1003 .vio = &rx51_vio,
ffe7f95b
LL
1004};
1005
f0c61d3d 1006static struct tpa6130a2_platform_data rx51_tpa6130a2_data __initdata_or_module = {
64d06691
JN
1007 .power_gpio = 98,
1008};
1009
f0fba2ad
LG
1010/* Audio setup data */
1011static struct aic3x_setup_data rx51_aic34_setup = {
1012 .gpio_func[0] = AIC3X_GPIO1_FUNC_DISABLED,
1013 .gpio_func[1] = AIC3X_GPIO2_FUNC_DIGITAL_MIC_INPUT,
1014};
1015
e4862f2f 1016static struct aic3x_pdata rx51_aic3x_data = {
f0fba2ad
LG
1017 .setup = &rx51_aic34_setup,
1018 .gpio_reset = 60,
1019};
1020
caeeb4aa
JN
1021static struct aic3x_pdata rx51_aic3x_data2 = {
1022 .gpio_reset = 60,
1023};
1024
dabe929b
JN
1025static struct i2c_board_info __initdata rx51_peripherals_i2c_board_info_2[] = {
1026 {
1027 I2C_BOARD_INFO("tlv320aic3x", 0x18),
87581fd4 1028 .platform_data = &rx51_aic3x_data,
dabe929b 1029 },
caeeb4aa
JN
1030 {
1031 I2C_BOARD_INFO("tlv320aic3x", 0x19),
1032 .platform_data = &rx51_aic3x_data2,
1033 },
70b5d737
MN
1034#if defined(CONFIG_SENSORS_TSL2563) || defined(CONFIG_SENSORS_TSL2563_MODULE)
1035 {
1036 I2C_BOARD_INFO("tsl2563", 0x29),
1037 .platform_data = &rx51_tsl2563_platform_data,
1038 },
eeada9e8
AP
1039#endif
1040#if defined(CONFIG_LEDS_LP5523) || defined(CONFIG_LEDS_LP5523_MODULE)
1041 {
1042 I2C_BOARD_INFO("lp5523", 0x32),
1043 .platform_data = &rx51_lp5523_platform_data,
1044 },
70b5d737 1045#endif
d77711aa
PR
1046 {
1047 I2C_BOARD_INFO("bq27200", 0x55),
1048 },
64d06691
JN
1049 {
1050 I2C_BOARD_INFO("tpa6130a2", 0x60),
1051 .platform_data = &rx51_tpa6130a2_data,
1052 }
dabe929b
JN
1053};
1054
3b511201
AP
1055static struct i2c_board_info __initdata rx51_peripherals_i2c_board_info_3[] = {
1056#if defined(CONFIG_SENSORS_LIS3_I2C) || defined(CONFIG_SENSORS_LIS3_I2C_MODULE)
1057 {
1058 I2C_BOARD_INFO("lis3lv02d", 0x1d),
1059 .platform_data = &rx51_lis3lv02d_data,
3b511201
AP
1060 },
1061#endif
1062};
1063
ffe7f95b
LL
1064static int __init rx51_i2c_init(void)
1065{
f52eeee8 1066 if ((system_rev >= SYSTEM_REV_S_USES_VAUX3 && system_rev < 0x100) ||
4cfcaef1 1067 system_rev >= SYSTEM_REV_B_USES_VAUX3) {
f52eeee8 1068 rx51_twldata.vaux3 = &rx51_vaux3_mmc;
4cfcaef1
JN
1069 /* Only older boards use VMMC2 for internal MMC */
1070 rx51_vmmc2.num_consumer_supplies--;
1071 } else {
f52eeee8 1072 rx51_twldata.vaux3 = &rx51_vaux3_cam;
f52eeee8 1073 }
4cfcaef1 1074 rx51_twldata.vmmc2 = &rx51_vmmc2;
827ed9ae 1075 omap3_pmic_get_config(&rx51_twldata,
b252b0ef
PU
1076 TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_MADC,
1077 TWL_COMMON_REGULATOR_VDAC);
1078
1079 rx51_twldata.vdac->constraints.apply_uV = true;
1080 rx51_twldata.vdac->constraints.name = "VDAC";
1081
7d7e1eba 1082 omap_pmic_init(1, 2200, "twl5030", 7 + OMAP_INTC_START, &rx51_twldata);
dabe929b
JN
1083 omap_register_i2c_bus(2, 100, rx51_peripherals_i2c_board_info_2,
1084 ARRAY_SIZE(rx51_peripherals_i2c_board_info_2));
4d04317f
TL
1085#if defined(CONFIG_SENSORS_LIS3_I2C) || defined(CONFIG_SENSORS_LIS3_I2C_MODULE)
1086 rx51_lis3lv02d_data.irq2 = gpio_to_irq(LIS302_IRQ2_GPIO);
1087 rx51_peripherals_i2c_board_info_3[0].irq = gpio_to_irq(LIS302_IRQ1_GPIO);
1088#endif
3b511201
AP
1089 omap_register_i2c_bus(3, 400, rx51_peripherals_i2c_board_info_3,
1090 ARRAY_SIZE(rx51_peripherals_i2c_board_info_3));
ffe7f95b
LL
1091 return 0;
1092}
1093
aa62e90f
JY
1094#if defined(CONFIG_MTD_ONENAND_OMAP2) || \
1095 defined(CONFIG_MTD_ONENAND_OMAP2_MODULE)
1096
1097static struct mtd_partition onenand_partitions[] = {
1098 {
1099 .name = "bootloader",
1100 .offset = 0,
1101 .size = 0x20000,
1102 .mask_flags = MTD_WRITEABLE, /* Force read-only */
1103 },
1104 {
1105 .name = "config",
1106 .offset = MTDPART_OFS_APPEND,
1107 .size = 0x60000,
1108 },
1109 {
1110 .name = "log",
1111 .offset = MTDPART_OFS_APPEND,
1112 .size = 0x40000,
1113 },
1114 {
1115 .name = "kernel",
1116 .offset = MTDPART_OFS_APPEND,
1117 .size = 0x200000,
1118 },
1119 {
1120 .name = "initfs",
1121 .offset = MTDPART_OFS_APPEND,
1122 .size = 0x200000,
1123 },
1124 {
1125 .name = "rootfs",
1126 .offset = MTDPART_OFS_APPEND,
1127 .size = MTDPART_SIZ_FULL,
1128 },
1129};
1130
5403187f
AK
1131static struct omap_onenand_platform_data board_onenand_data[] = {
1132 {
1133 .cs = 0,
1134 .gpio_irq = 65,
1135 .parts = onenand_partitions,
1136 .nr_parts = ARRAY_SIZE(onenand_partitions),
1137 .flags = ONENAND_SYNC_READWRITE,
1138 }
aa62e90f 1139};
aa62e90f 1140#endif
ffe7f95b 1141
1a48e157
TL
1142#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
1143
1144static struct omap_smc91x_platform_data board_smc91x_data = {
1145 .cs = 1,
1146 .gpio_irq = 54,
1147 .gpio_pwrdwn = 86,
1148 .gpio_reset = 164,
1149 .flags = GPMC_TIMINGS_SMC91C96 | IORESOURCE_IRQ_HIGHLEVEL,
1150};
1151
1152static void __init board_smc91x_init(void)
1153{
4896e394
TL
1154 omap_mux_init_gpio(54, OMAP_PIN_INPUT_PULLDOWN);
1155 omap_mux_init_gpio(86, OMAP_PIN_OUTPUT);
1156 omap_mux_init_gpio(164, OMAP_PIN_OUTPUT);
1a48e157
TL
1157
1158 gpmc_smc91x_init(&board_smc91x_data);
1159}
1160
1161#else
1162
1163static inline void board_smc91x_init(void)
1164{
1165}
1166
1167#endif
1168
a24e61a9
KV
1169static void rx51_wl1251_set_power(bool enable)
1170{
1171 gpio_set_value(RX51_WL1251_POWER_GPIO, enable);
1172}
1173
bc593f5d
IG
1174static struct gpio rx51_wl1251_gpios[] __initdata = {
1175 { RX51_WL1251_POWER_GPIO, GPIOF_OUT_INIT_LOW, "wl1251 power" },
1176 { RX51_WL1251_IRQ_GPIO, GPIOF_IN, "wl1251 irq" },
1177};
1178
a24e61a9
KV
1179static void __init rx51_init_wl1251(void)
1180{
1181 int irq, ret;
1182
bc593f5d
IG
1183 ret = gpio_request_array(rx51_wl1251_gpios,
1184 ARRAY_SIZE(rx51_wl1251_gpios));
a24e61a9
KV
1185 if (ret < 0)
1186 goto error;
1187
a24e61a9
KV
1188 irq = gpio_to_irq(RX51_WL1251_IRQ_GPIO);
1189 if (irq < 0)
1190 goto err_irq;
1191
1192 wl1251_pdata.set_power = rx51_wl1251_set_power;
1193 rx51_peripherals_spi_board_info[RX51_SPI_WL1251].irq = irq;
1194
1195 return;
1196
1197err_irq:
1198 gpio_free(RX51_WL1251_IRQ_GPIO);
a24e61a9 1199 gpio_free(RX51_WL1251_POWER_GPIO);
a24e61a9
KV
1200error:
1201 printk(KERN_ERR "wl1251 board initialisation failed\n");
1202 wl1251_pdata.set_power = NULL;
1203
1204 /*
1205 * Now rx51_peripherals_spi_board_info[1].irq is zero and
1206 * set_power is null, and wl1251_probe() will fail.
1207 */
1208}
1209
3dad5356
AK
1210static struct tsc2005_platform_data tsc2005_pdata = {
1211 .ts_pressure_max = 2048,
1212 .ts_pressure_fudge = 2,
1213 .ts_x_max = 4096,
1214 .ts_x_fudge = 4,
1215 .ts_y_max = 4096,
1216 .ts_y_fudge = 7,
1217 .ts_x_plate_ohm = 280,
1218 .esd_timeout_ms = 8000,
1219};
1220
d4860ebe
VZ
1221static struct gpio rx51_tsc2005_gpios[] __initdata = {
1222 { RX51_TSC2005_IRQ_GPIO, GPIOF_IN, "tsc2005 IRQ" },
1223 { RX51_TSC2005_RESET_GPIO, GPIOF_OUT_INIT_HIGH, "tsc2005 reset" },
1224};
1225
3dad5356
AK
1226static void rx51_tsc2005_set_reset(bool enable)
1227{
1228 gpio_set_value(RX51_TSC2005_RESET_GPIO, enable);
1229}
1230
1231static void __init rx51_init_tsc2005(void)
1232{
1233 int r;
1234
d4860ebe
VZ
1235 omap_mux_init_gpio(RX51_TSC2005_RESET_GPIO, OMAP_PIN_OUTPUT);
1236 omap_mux_init_gpio(RX51_TSC2005_IRQ_GPIO, OMAP_PIN_INPUT_PULLUP);
3dad5356 1237
d4860ebe
VZ
1238 r = gpio_request_array(rx51_tsc2005_gpios,
1239 ARRAY_SIZE(rx51_tsc2005_gpios));
1240 if (r < 0) {
1241 printk(KERN_ERR "tsc2005 board initialization failed\n");
3dad5356 1242 tsc2005_pdata.esd_timeout_ms = 0;
d4860ebe 1243 return;
3dad5356 1244 }
d4860ebe
VZ
1245
1246 tsc2005_pdata.set_reset = rx51_tsc2005_set_reset;
2533c2cf
TL
1247 rx51_peripherals_spi_board_info[RX51_SPI_TSC2005].irq =
1248 gpio_to_irq(RX51_TSC2005_IRQ_GPIO);
3dad5356
AK
1249}
1250
322c183c
TK
1251#if defined(CONFIG_IR_RX51) || defined(CONFIG_IR_RX51_MODULE)
1252static struct lirc_rx51_platform_data rx51_lirc_data = {
1253 .set_max_mpu_wakeup_lat = omap_pm_set_max_mpu_wakeup_lat,
1254 .pwm_timer = 9, /* Use GPT 9 for CIR */
1255};
1256
1257static struct platform_device rx51_lirc_device = {
1258 .name = "lirc_rx51",
1259 .id = -1,
1260 .dev = {
1261 .platform_data = &rx51_lirc_data,
1262 },
1263};
1264
1265static void __init rx51_init_lirc(void)
1266{
1267 platform_device_register(&rx51_lirc_device);
1268}
1269#else
1270static void __init rx51_init_lirc(void)
1271{
1272}
1273#endif
1274
749a34b3
PR
1275static struct platform_device madc_hwmon = {
1276 .name = "twl4030_madc_hwmon",
1277 .id = -1,
1278};
1279
1280static void __init rx51_init_twl4030_hwmon(void)
1281{
1282 platform_device_register(&madc_hwmon);
1283}
1284
d2065e2b
PR
1285static struct platform_device omap3_rom_rng_device = {
1286 .name = "omap3-rom-rng",
1287 .id = -1,
1288 .dev = {
1289 .platform_data = rx51_secure_rng_call,
1290 },
1291};
1292
1293static void __init rx51_init_omap3_rom_rng(void)
1294{
1295 if (omap_type() == OMAP2_DEVICE_TYPE_SEC) {
1296 pr_info("RX-51: Registring OMAP3 HWRNG device\n");
1297 platform_device_register(&omap3_rom_rng_device);
1298 }
1299}
1300
ffe7f95b
LL
1301void __init rx51_peripherals_init(void)
1302{
ffe7f95b 1303 rx51_i2c_init();
094fc559 1304 regulator_has_full_constraints();
5403187f 1305 gpmc_onenand_init(board_onenand_data);
1a48e157 1306 board_smc91x_init();
f014ee32 1307 rx51_add_gpio_keys();
a24e61a9 1308 rx51_init_wl1251();
3dad5356 1309 rx51_init_tsc2005();
589541c0 1310 rx51_init_si4713();
322c183c 1311 rx51_init_lirc();
a24e61a9
KV
1312 spi_register_board_info(rx51_peripherals_spi_board_info,
1313 ARRAY_SIZE(rx51_peripherals_spi_board_info));
112485e9
BC
1314
1315 partition = omap_mux_get("core");
1316 if (partition)
3b972bf0 1317 omap_hsmmc_init(mmc);
112485e9 1318
10299e2e 1319 rx51_charger_init();
749a34b3 1320 rx51_init_twl4030_hwmon();
d2065e2b 1321 rx51_init_omap3_rom_rng();
ffe7f95b
LL
1322}
1323
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