omap: rx51: Add supplies for the tlv320aic3x codec driver
[deliverable/linux.git] / arch / arm / mach-omap2 / board-rx51-peripherals.c
CommitLineData
ffe7f95b 1/*
9312fffb 2 * linux/arch/arm/mach-omap2/board-rx51-peripherals.c
ffe7f95b
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3 *
4 * Copyright (C) 2008-2009 Nokia
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/platform_device.h>
14#include <linux/input.h>
6135434a 15#include <linux/input/matrix_keypad.h>
ffe7f95b 16#include <linux/spi/spi.h>
a24e61a9 17#include <linux/spi/wl12xx.h>
ffe7f95b 18#include <linux/i2c.h>
ebeb53e1 19#include <linux/i2c/twl.h>
ffe7f95b
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20#include <linux/clk.h>
21#include <linux/delay.h>
22#include <linux/regulator/machine.h>
23#include <linux/gpio.h>
f014ee32 24#include <linux/gpio_keys.h>
5e763d29 25#include <linux/mmc/host.h>
ffe7f95b 26
ce491cf8
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27#include <plat/mcspi.h>
28#include <plat/mux.h>
29#include <plat/board.h>
30#include <plat/common.h>
31#include <plat/dma.h>
32#include <plat/gpmc.h>
ce491cf8
TL
33#include <plat/onenand.h>
34#include <plat/gpmc-smc91x.h>
ffe7f95b 35
4896e394 36#include "mux.h"
d02a900b 37#include "hsmmc.h"
ffe7f95b 38
f52eeee8
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39#define SYSTEM_REV_B_USES_VAUX3 0x1699
40#define SYSTEM_REV_S_USES_VAUX3 0x8
41
a24e61a9
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42#define RX51_WL1251_POWER_GPIO 87
43#define RX51_WL1251_IRQ_GPIO 42
44
45/* list all spi devices here */
46enum {
47 RX51_SPI_WL1251,
48};
49
50static struct wl12xx_platform_data wl1251_pdata;
51
52static struct omap2_mcspi_device_config wl1251_mcspi_config = {
53 .turbo_mode = 0,
54 .single_channel = 1,
55};
56
57static struct spi_board_info rx51_peripherals_spi_board_info[] __initdata = {
58 [RX51_SPI_WL1251] = {
59 .modalias = "wl1251",
60 .bus_num = 4,
61 .chip_select = 0,
62 .max_speed_hz = 48000000,
860fc976 63 .mode = SPI_MODE_3,
a24e61a9
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64 .controller_data = &wl1251_mcspi_config,
65 .platform_data = &wl1251_pdata,
66 },
67};
68
f014ee32
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69#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
70
71#define RX51_GPIO_CAMERA_LENS_COVER 110
72#define RX51_GPIO_CAMERA_FOCUS 68
73#define RX51_GPIO_CAMERA_CAPTURE 69
74#define RX51_GPIO_KEYPAD_SLIDE 71
75#define RX51_GPIO_LOCK_BUTTON 113
76#define RX51_GPIO_PROXIMITY 89
77
78#define RX51_GPIO_DEBOUNCE_TIMEOUT 10
79
80static struct gpio_keys_button rx51_gpio_keys[] = {
81 {
82 .desc = "Camera Lens Cover",
83 .type = EV_SW,
84 .code = SW_CAMERA_LENS_COVER,
85 .gpio = RX51_GPIO_CAMERA_LENS_COVER,
86 .active_low = 1,
87 .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT,
88 }, {
89 .desc = "Camera Focus",
90 .type = EV_KEY,
91 .code = KEY_CAMERA_FOCUS,
92 .gpio = RX51_GPIO_CAMERA_FOCUS,
93 .active_low = 1,
94 .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT,
95 }, {
96 .desc = "Camera Capture",
97 .type = EV_KEY,
98 .code = KEY_CAMERA,
99 .gpio = RX51_GPIO_CAMERA_CAPTURE,
100 .active_low = 1,
101 .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT,
102 }, {
103 .desc = "Lock Button",
104 .type = EV_KEY,
105 .code = KEY_SCREENLOCK,
106 .gpio = RX51_GPIO_LOCK_BUTTON,
107 .active_low = 1,
108 .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT,
109 }, {
110 .desc = "Keypad Slide",
111 .type = EV_SW,
112 .code = SW_KEYPAD_SLIDE,
113 .gpio = RX51_GPIO_KEYPAD_SLIDE,
114 .active_low = 1,
115 .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT,
116 }, {
117 .desc = "Proximity Sensor",
118 .type = EV_SW,
119 .code = SW_FRONT_PROXIMITY,
120 .gpio = RX51_GPIO_PROXIMITY,
121 .active_low = 0,
122 .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT,
123 }
124};
125
126static struct gpio_keys_platform_data rx51_gpio_keys_data = {
127 .buttons = rx51_gpio_keys,
128 .nbuttons = ARRAY_SIZE(rx51_gpio_keys),
129};
130
131static struct platform_device rx51_gpio_keys_device = {
132 .name = "gpio-keys",
133 .id = -1,
134 .dev = {
135 .platform_data = &rx51_gpio_keys_data,
136 },
137};
138
139static void __init rx51_add_gpio_keys(void)
140{
141 platform_device_register(&rx51_gpio_keys_device);
142}
143#else
144static void __init rx51_add_gpio_keys(void)
145{
146}
147#endif /* CONFIG_KEYBOARD_GPIO || CONFIG_KEYBOARD_GPIO_MODULE */
148
4f543332 149static int board_keymap[] = {
ffe7f95b 150 KEY(0, 0, KEY_Q),
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151 KEY(0, 1, KEY_O),
152 KEY(0, 2, KEY_P),
153 KEY(0, 3, KEY_COMMA),
154 KEY(0, 4, KEY_BACKSPACE),
155 KEY(0, 6, KEY_A),
156 KEY(0, 7, KEY_S),
157 KEY(1, 0, KEY_W),
ffe7f95b 158 KEY(1, 1, KEY_D),
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159 KEY(1, 2, KEY_F),
160 KEY(1, 3, KEY_G),
161 KEY(1, 4, KEY_H),
162 KEY(1, 5, KEY_J),
163 KEY(1, 6, KEY_K),
164 KEY(1, 7, KEY_L),
165 KEY(2, 0, KEY_E),
166 KEY(2, 1, KEY_DOT),
ffe7f95b 167 KEY(2, 2, KEY_UP),
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168 KEY(2, 3, KEY_ENTER),
169 KEY(2, 5, KEY_Z),
170 KEY(2, 6, KEY_X),
171 KEY(2, 7, KEY_C),
172 KEY(3, 0, KEY_R),
173 KEY(3, 1, KEY_V),
174 KEY(3, 2, KEY_B),
ffe7f95b 175 KEY(3, 3, KEY_N),
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176 KEY(3, 4, KEY_M),
177 KEY(3, 5, KEY_SPACE),
178 KEY(3, 6, KEY_SPACE),
179 KEY(3, 7, KEY_LEFT),
180 KEY(4, 0, KEY_T),
181 KEY(4, 1, KEY_DOWN),
182 KEY(4, 2, KEY_RIGHT),
ffe7f95b 183 KEY(4, 4, KEY_LEFTCTRL),
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184 KEY(4, 5, KEY_RIGHTALT),
185 KEY(4, 6, KEY_LEFTSHIFT),
186 KEY(5, 0, KEY_Y),
187 KEY(6, 0, KEY_U),
188 KEY(7, 0, KEY_I),
189 KEY(7, 1, KEY_F7),
190 KEY(7, 2, KEY_F8),
191 KEY(0xff, 2, KEY_F9),
192 KEY(0xff, 4, KEY_F10),
193 KEY(0xff, 5, KEY_F11),
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194};
195
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196static struct matrix_keymap_data board_map_data = {
197 .keymap = board_keymap,
198 .keymap_size = ARRAY_SIZE(board_keymap),
199};
200
ffe7f95b 201static struct twl4030_keypad_data rx51_kp_data = {
4f543332 202 .keymap_data = &board_map_data,
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203 .rows = 8,
204 .cols = 8,
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205 .rep = 1,
206};
207
ffe7f95b
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208static struct twl4030_madc_platform_data rx51_madc_data = {
209 .irq_line = 1,
210};
211
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212/* Enable input logic and pull all lines up when eMMC is on. */
213static struct omap_board_mux rx51_mmc2_on_mux[] = {
214 OMAP3_MUX(SDMMC2_CMD, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
215 OMAP3_MUX(SDMMC2_DAT0, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
216 OMAP3_MUX(SDMMC2_DAT1, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
217 OMAP3_MUX(SDMMC2_DAT2, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
218 OMAP3_MUX(SDMMC2_DAT3, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
219 OMAP3_MUX(SDMMC2_DAT4, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
220 OMAP3_MUX(SDMMC2_DAT5, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
221 OMAP3_MUX(SDMMC2_DAT6, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
222 OMAP3_MUX(SDMMC2_DAT7, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
223 { .reg_offset = OMAP_MUX_TERMINATOR },
224};
225
226/* Disable input logic and pull all lines down when eMMC is off. */
227static struct omap_board_mux rx51_mmc2_off_mux[] = {
228 OMAP3_MUX(SDMMC2_CMD, OMAP_PULL_ENA | OMAP_MUX_MODE0),
229 OMAP3_MUX(SDMMC2_DAT0, OMAP_PULL_ENA | OMAP_MUX_MODE0),
230 OMAP3_MUX(SDMMC2_DAT1, OMAP_PULL_ENA | OMAP_MUX_MODE0),
231 OMAP3_MUX(SDMMC2_DAT2, OMAP_PULL_ENA | OMAP_MUX_MODE0),
232 OMAP3_MUX(SDMMC2_DAT3, OMAP_PULL_ENA | OMAP_MUX_MODE0),
233 OMAP3_MUX(SDMMC2_DAT4, OMAP_PULL_ENA | OMAP_MUX_MODE0),
234 OMAP3_MUX(SDMMC2_DAT5, OMAP_PULL_ENA | OMAP_MUX_MODE0),
235 OMAP3_MUX(SDMMC2_DAT6, OMAP_PULL_ENA | OMAP_MUX_MODE0),
236 OMAP3_MUX(SDMMC2_DAT7, OMAP_PULL_ENA | OMAP_MUX_MODE0),
237 { .reg_offset = OMAP_MUX_TERMINATOR },
238};
239
240/*
241 * Current flows to eMMC when eMMC is off and the data lines are pulled up,
242 * so pull them down. N.B. we pull 8 lines because we are using 8 lines.
243 */
244static void rx51_mmc2_remux(struct device *dev, int slot, int power_on)
245{
246 if (power_on)
247 omap_mux_write_array(rx51_mmc2_on_mux);
248 else
249 omap_mux_write_array(rx51_mmc2_off_mux);
250}
251
68ff0423 252static struct omap2_hsmmc_info mmc[] __initdata = {
ffe7f95b
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253 {
254 .name = "external",
255 .mmc = 1,
256 .wires = 4,
257 .cover_only = true,
258 .gpio_cd = 160,
259 .gpio_wp = -EINVAL,
5e763d29 260 .power_saving = true,
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261 },
262 {
263 .name = "internal",
264 .mmc = 2,
ce6f0016 265 .wires = 8, /* See also rx51_mmc2_remux */
ffe7f95b
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266 .gpio_cd = -EINVAL,
267 .gpio_wp = -EINVAL,
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268 .nonremovable = true,
269 .power_saving = true,
ce6f0016 270 .remux = rx51_mmc2_remux,
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271 },
272 {} /* Terminator */
273};
274
275static struct regulator_consumer_supply rx51_vmmc1_supply = {
68ff0423
AH
276 .supply = "vmmc",
277 .dev_name = "mmci-omap-hs.0",
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278};
279
4cfcaef1 280static struct regulator_consumer_supply rx51_vaux3_supply = {
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281 .supply = "vmmc",
282 .dev_name = "mmci-omap-hs.1",
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283};
284
285static struct regulator_consumer_supply rx51_vsim_supply = {
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286 .supply = "vmmc_aux",
287 .dev_name = "mmci-omap-hs.1",
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288};
289
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290static struct regulator_consumer_supply rx51_vmmc2_supplies[] = {
291 /* tlv320aic3x analog supplies */
292 {
293 .supply = "AVDD",
294 .dev_name = "2-0018",
295 },
296 {
297 .supply = "DRVDD",
298 .dev_name = "2-0018",
299 },
300 /* Keep vmmc as last item. It is not iterated for newer boards */
301 {
302 .supply = "vmmc",
303 .dev_name = "mmci-omap-hs.1",
304 },
305};
306
307static struct regulator_consumer_supply rx51_vio_supplies[] = {
308 /* tlv320aic3x digital supplies */
309 {
310 .supply = "IOVDD",
311 .dev_name = "2-0018"
312 },
313 {
314 .supply = "DVDD",
315 .dev_name = "2-0018"
316 },
317};
318
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319static struct regulator_init_data rx51_vaux1 = {
320 .constraints = {
321 .name = "V28",
322 .min_uV = 2800000,
323 .max_uV = 2800000,
324 .valid_modes_mask = REGULATOR_MODE_NORMAL
325 | REGULATOR_MODE_STANDBY,
326 .valid_ops_mask = REGULATOR_CHANGE_MODE
327 | REGULATOR_CHANGE_STATUS,
328 },
329};
330
331static struct regulator_init_data rx51_vaux2 = {
332 .constraints = {
333 .name = "VCSI",
334 .min_uV = 1800000,
335 .max_uV = 1800000,
336 .valid_modes_mask = REGULATOR_MODE_NORMAL
337 | REGULATOR_MODE_STANDBY,
338 .valid_ops_mask = REGULATOR_CHANGE_MODE
339 | REGULATOR_CHANGE_STATUS,
340 },
341};
342
343/* VAUX3 - adds more power to VIO_18 rail */
f52eeee8 344static struct regulator_init_data rx51_vaux3_cam = {
ffe7f95b
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345 .constraints = {
346 .name = "VCAM_DIG_18",
347 .min_uV = 1800000,
348 .max_uV = 1800000,
349 .apply_uV = true,
350 .valid_modes_mask = REGULATOR_MODE_NORMAL
351 | REGULATOR_MODE_STANDBY,
352 .valid_ops_mask = REGULATOR_CHANGE_MODE
353 | REGULATOR_CHANGE_STATUS,
354 },
355};
356
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AH
357static struct regulator_init_data rx51_vaux3_mmc = {
358 .constraints = {
359 .name = "VMMC2_30",
360 .min_uV = 2800000,
361 .max_uV = 3000000,
362 .apply_uV = true,
363 .valid_modes_mask = REGULATOR_MODE_NORMAL
364 | REGULATOR_MODE_STANDBY,
365 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
366 | REGULATOR_CHANGE_MODE
367 | REGULATOR_CHANGE_STATUS,
368 },
369 .num_consumer_supplies = 1,
4cfcaef1 370 .consumer_supplies = &rx51_vaux3_supply,
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371};
372
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373static struct regulator_init_data rx51_vaux4 = {
374 .constraints = {
375 .name = "VCAM_ANA_28",
376 .min_uV = 2800000,
377 .max_uV = 2800000,
378 .apply_uV = true,
379 .valid_modes_mask = REGULATOR_MODE_NORMAL
380 | REGULATOR_MODE_STANDBY,
381 .valid_ops_mask = REGULATOR_CHANGE_MODE
382 | REGULATOR_CHANGE_STATUS,
383 },
384};
385
386static struct regulator_init_data rx51_vmmc1 = {
387 .constraints = {
388 .min_uV = 1850000,
389 .max_uV = 3150000,
390 .valid_modes_mask = REGULATOR_MODE_NORMAL
391 | REGULATOR_MODE_STANDBY,
392 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
393 | REGULATOR_CHANGE_MODE
394 | REGULATOR_CHANGE_STATUS,
395 },
396 .num_consumer_supplies = 1,
397 .consumer_supplies = &rx51_vmmc1_supply,
398};
399
400static struct regulator_init_data rx51_vmmc2 = {
401 .constraints = {
f2add1de
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402 .name = "V28_A",
403 .min_uV = 2800000,
404 .max_uV = 3000000,
ffe7f95b
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405 .apply_uV = true,
406 .valid_modes_mask = REGULATOR_MODE_NORMAL
407 | REGULATOR_MODE_STANDBY,
408 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
409 | REGULATOR_CHANGE_MODE
410 | REGULATOR_CHANGE_STATUS,
411 },
4cfcaef1
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412 .num_consumer_supplies = ARRAY_SIZE(rx51_vmmc2_supplies),
413 .consumer_supplies = rx51_vmmc2_supplies,
ffe7f95b
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414};
415
416static struct regulator_init_data rx51_vsim = {
417 .constraints = {
418 .name = "VMMC2_IO_18",
419 .min_uV = 1800000,
420 .max_uV = 1800000,
421 .apply_uV = true,
422 .valid_modes_mask = REGULATOR_MODE_NORMAL
423 | REGULATOR_MODE_STANDBY,
424 .valid_ops_mask = REGULATOR_CHANGE_MODE
425 | REGULATOR_CHANGE_STATUS,
426 },
427 .num_consumer_supplies = 1,
428 .consumer_supplies = &rx51_vsim_supply,
429};
430
431static struct regulator_init_data rx51_vdac = {
432 .constraints = {
433 .min_uV = 1800000,
434 .max_uV = 1800000,
435 .valid_modes_mask = REGULATOR_MODE_NORMAL
436 | REGULATOR_MODE_STANDBY,
437 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
438 | REGULATOR_CHANGE_MODE
439 | REGULATOR_CHANGE_STATUS,
440 },
441};
442
4cfcaef1
JN
443static struct regulator_init_data rx51_vio = {
444 .constraints = {
445 .min_uV = 1800000,
446 .max_uV = 1800000,
447 .valid_modes_mask = REGULATOR_MODE_NORMAL
448 | REGULATOR_MODE_STANDBY,
449 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
450 | REGULATOR_CHANGE_MODE
451 | REGULATOR_CHANGE_STATUS,
452 },
453 .num_consumer_supplies = ARRAY_SIZE(rx51_vio_supplies),
454 .consumer_supplies = rx51_vio_supplies,
455};
456
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457static int rx51_twlgpio_setup(struct device *dev, unsigned gpio, unsigned n)
458{
459 /* FIXME this gpio setup is just a placeholder for now */
460 gpio_request(gpio + 6, "backlight_pwm");
461 gpio_direction_output(gpio + 6, 0);
462 gpio_request(gpio + 7, "speaker_en");
463 gpio_direction_output(gpio + 7, 1);
464
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465 return 0;
466}
467
468static struct twl4030_gpio_platform_data rx51_gpio_data = {
469 .gpio_base = OMAP_MAX_GPIO_LINES,
470 .irq_base = TWL4030_GPIO_IRQ_BASE,
471 .irq_end = TWL4030_GPIO_IRQ_END,
472 .pulldowns = BIT(0) | BIT(1) | BIT(2) | BIT(3)
473 | BIT(4) | BIT(5)
474 | BIT(8) | BIT(9) | BIT(10) | BIT(11)
475 | BIT(12) | BIT(13) | BIT(14) | BIT(15)
476 | BIT(16) | BIT(17) ,
477 .setup = rx51_twlgpio_setup,
478};
479
dfc27b34
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480static struct twl4030_usb_data rx51_usb_data = {
481 .usb_mode = T2_USB_MODE_ULPI,
482};
483
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484static struct twl4030_ins sleep_on_seq[] __initdata = {
485/*
3c684e84 486 * Turn off everything
9312fffb 487 */
3c684e84 488 {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 1, 0, RES_STATE_SLEEP), 2},
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489};
490
491static struct twl4030_script sleep_on_script __initdata = {
492 .script = sleep_on_seq,
493 .size = ARRAY_SIZE(sleep_on_seq),
494 .flags = TWL4030_SLEEP_SCRIPT,
495};
496
497static struct twl4030_ins wakeup_seq[] __initdata = {
498/*
3c684e84 499 * Reenable everything
9312fffb 500 */
3c684e84 501 {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 1, 0, RES_STATE_ACTIVE), 2},
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502};
503
504static struct twl4030_script wakeup_script __initdata = {
505 .script = wakeup_seq,
506 .size = ARRAY_SIZE(wakeup_seq),
507 .flags = TWL4030_WAKEUP12_SCRIPT,
508};
509
510static struct twl4030_ins wakeup_p3_seq[] __initdata = {
511/*
3c684e84 512 * Reenable everything
9312fffb 513 */
3c684e84 514 {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 1, 0, RES_STATE_ACTIVE), 2},
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515};
516
517static struct twl4030_script wakeup_p3_script __initdata = {
518 .script = wakeup_p3_seq,
519 .size = ARRAY_SIZE(wakeup_p3_seq),
520 .flags = TWL4030_WAKEUP3_SCRIPT,
521};
522
523static struct twl4030_ins wrst_seq[] __initdata = {
524/*
525 * Reset twl4030.
526 * Reset VDD1 regulator.
527 * Reset VDD2 regulator.
528 * Reset VPLL1 regulator.
529 * Enable sysclk output.
530 * Reenable twl4030.
531 */
532 {MSG_SINGULAR(DEV_GRP_NULL, RES_RESET, RES_STATE_OFF), 2},
533 {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 0, 1, RES_STATE_ACTIVE),
534 0x13},
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AK
535 {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_PP, 0, 3, RES_STATE_OFF), 0x13},
536 {MSG_SINGULAR(DEV_GRP_NULL, RES_VDD1, RES_STATE_WRST), 0x13},
537 {MSG_SINGULAR(DEV_GRP_NULL, RES_VDD2, RES_STATE_WRST), 0x13},
538 {MSG_SINGULAR(DEV_GRP_NULL, RES_VPLL1, RES_STATE_WRST), 0x35},
3c684e84 539 {MSG_SINGULAR(DEV_GRP_P3, RES_HFCLKOUT, RES_STATE_ACTIVE), 2},
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540 {MSG_SINGULAR(DEV_GRP_NULL, RES_RESET, RES_STATE_ACTIVE), 2},
541};
542
543static struct twl4030_script wrst_script __initdata = {
544 .script = wrst_seq,
545 .size = ARRAY_SIZE(wrst_seq),
546 .flags = TWL4030_WRST_SCRIPT,
547};
548
549static struct twl4030_script *twl4030_scripts[] __initdata = {
550 /* wakeup12 script should be loaded before sleep script, otherwise a
551 board might hit retention before loading of wakeup script is
552 completed. This can cause boot failures depending on timing issues.
553 */
554 &wakeup_script,
555 &sleep_on_script,
556 &wakeup_p3_script,
557 &wrst_script,
558};
559
560static struct twl4030_resconfig twl4030_rconfig[] __initdata = {
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AK
561 { .resource = RES_VDD1, .devgroup = -1,
562 .type = 1, .type2 = -1, .remap_off = RES_STATE_OFF,
563 .remap_sleep = RES_STATE_OFF
564 },
565 { .resource = RES_VDD2, .devgroup = -1,
566 .type = 1, .type2 = -1, .remap_off = RES_STATE_OFF,
567 .remap_sleep = RES_STATE_OFF
568 },
569 { .resource = RES_VPLL1, .devgroup = -1,
570 .type = 1, .type2 = -1, .remap_off = RES_STATE_OFF,
571 .remap_sleep = RES_STATE_OFF
572 },
573 { .resource = RES_VPLL2, .devgroup = -1,
574 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
575 },
576 { .resource = RES_VAUX1, .devgroup = -1,
577 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
578 },
579 { .resource = RES_VAUX2, .devgroup = -1,
580 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
581 },
582 { .resource = RES_VAUX3, .devgroup = -1,
583 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
584 },
585 { .resource = RES_VAUX4, .devgroup = -1,
586 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
587 },
588 { .resource = RES_VMMC1, .devgroup = -1,
589 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
590 },
591 { .resource = RES_VMMC2, .devgroup = -1,
592 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
593 },
594 { .resource = RES_VDAC, .devgroup = -1,
595 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
596 },
597 { .resource = RES_VSIM, .devgroup = -1,
598 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
599 },
600 { .resource = RES_VINTANA1, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
601 .type = -1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
602 },
603 { .resource = RES_VINTANA2, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
604 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
605 },
606 { .resource = RES_VINTDIG, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
607 .type = -1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
608 },
609 { .resource = RES_VIO, .devgroup = DEV_GRP_P3,
610 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
611 },
612 { .resource = RES_CLKEN, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
613 .type = 1, .type2 = -1 , .remap_off = -1, .remap_sleep = -1
614 },
615 { .resource = RES_REGEN, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
616 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
617 },
618 { .resource = RES_NRES_PWRON, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
619 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
620 },
621 { .resource = RES_SYSEN, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
622 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
623 },
624 { .resource = RES_HFCLKOUT, .devgroup = DEV_GRP_P3,
625 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
626 },
627 { .resource = RES_32KCLKOUT, .devgroup = -1,
628 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
629 },
630 { .resource = RES_RESET, .devgroup = -1,
631 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
632 },
633 { .resource = RES_Main_Ref, .devgroup = -1,
634 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
635 },
9312fffb
AK
636 { 0, 0},
637};
638
639static struct twl4030_power_data rx51_t2scripts_data __initdata = {
640 .scripts = twl4030_scripts,
641 .num = ARRAY_SIZE(twl4030_scripts),
642 .resource_config = twl4030_rconfig,
643};
644
645
646
647static struct twl4030_platform_data rx51_twldata __initdata = {
ffe7f95b
LL
648 .irq_base = TWL4030_IRQ_BASE,
649 .irq_end = TWL4030_IRQ_END,
650
651 /* platform_data for children goes here */
652 .gpio = &rx51_gpio_data,
653 .keypad = &rx51_kp_data,
654 .madc = &rx51_madc_data,
dfc27b34 655 .usb = &rx51_usb_data,
9312fffb 656 .power = &rx51_t2scripts_data,
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LL
657
658 .vaux1 = &rx51_vaux1,
659 .vaux2 = &rx51_vaux2,
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LL
660 .vaux4 = &rx51_vaux4,
661 .vmmc1 = &rx51_vmmc1,
ffe7f95b
LL
662 .vsim = &rx51_vsim,
663 .vdac = &rx51_vdac,
4cfcaef1 664 .vio = &rx51_vio,
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LL
665};
666
667static struct i2c_board_info __initdata rx51_peripherals_i2c_board_info_1[] = {
668 {
669 I2C_BOARD_INFO("twl5030", 0x48),
670 .flags = I2C_CLIENT_WAKE,
671 .irq = INT_34XX_SYS_NIRQ,
672 .platform_data = &rx51_twldata,
673 },
674};
675
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676static struct i2c_board_info __initdata rx51_peripherals_i2c_board_info_2[] = {
677 {
678 I2C_BOARD_INFO("tlv320aic3x", 0x18),
679 },
680};
681
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LL
682static int __init rx51_i2c_init(void)
683{
f52eeee8 684 if ((system_rev >= SYSTEM_REV_S_USES_VAUX3 && system_rev < 0x100) ||
4cfcaef1 685 system_rev >= SYSTEM_REV_B_USES_VAUX3) {
f52eeee8 686 rx51_twldata.vaux3 = &rx51_vaux3_mmc;
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JN
687 /* Only older boards use VMMC2 for internal MMC */
688 rx51_vmmc2.num_consumer_supplies--;
689 } else {
f52eeee8 690 rx51_twldata.vaux3 = &rx51_vaux3_cam;
f52eeee8 691 }
4cfcaef1 692 rx51_twldata.vmmc2 = &rx51_vmmc2;
cb3cc45a 693 omap_register_i2c_bus(1, 2200, rx51_peripherals_i2c_board_info_1,
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JN
694 ARRAY_SIZE(rx51_peripherals_i2c_board_info_1));
695 omap_register_i2c_bus(2, 100, rx51_peripherals_i2c_board_info_2,
696 ARRAY_SIZE(rx51_peripherals_i2c_board_info_2));
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697 omap_register_i2c_bus(3, 400, NULL, 0);
698 return 0;
699}
700
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JY
701#if defined(CONFIG_MTD_ONENAND_OMAP2) || \
702 defined(CONFIG_MTD_ONENAND_OMAP2_MODULE)
703
704static struct mtd_partition onenand_partitions[] = {
705 {
706 .name = "bootloader",
707 .offset = 0,
708 .size = 0x20000,
709 .mask_flags = MTD_WRITEABLE, /* Force read-only */
710 },
711 {
712 .name = "config",
713 .offset = MTDPART_OFS_APPEND,
714 .size = 0x60000,
715 },
716 {
717 .name = "log",
718 .offset = MTDPART_OFS_APPEND,
719 .size = 0x40000,
720 },
721 {
722 .name = "kernel",
723 .offset = MTDPART_OFS_APPEND,
724 .size = 0x200000,
725 },
726 {
727 .name = "initfs",
728 .offset = MTDPART_OFS_APPEND,
729 .size = 0x200000,
730 },
731 {
732 .name = "rootfs",
733 .offset = MTDPART_OFS_APPEND,
734 .size = MTDPART_SIZ_FULL,
735 },
736};
737
738static struct omap_onenand_platform_data board_onenand_data = {
739 .cs = 0,
740 .gpio_irq = 65,
741 .parts = onenand_partitions,
742 .nr_parts = ARRAY_SIZE(onenand_partitions),
c8e6488f 743 .flags = ONENAND_SYNC_READWRITE,
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JY
744};
745
746static void __init board_onenand_init(void)
747{
748 gpmc_onenand_init(&board_onenand_data);
749}
750
751#else
752
753static inline void board_onenand_init(void)
754{
755}
756
757#endif
ffe7f95b 758
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TL
759#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
760
761static struct omap_smc91x_platform_data board_smc91x_data = {
762 .cs = 1,
763 .gpio_irq = 54,
764 .gpio_pwrdwn = 86,
765 .gpio_reset = 164,
766 .flags = GPMC_TIMINGS_SMC91C96 | IORESOURCE_IRQ_HIGHLEVEL,
767};
768
769static void __init board_smc91x_init(void)
770{
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TL
771 omap_mux_init_gpio(54, OMAP_PIN_INPUT_PULLDOWN);
772 omap_mux_init_gpio(86, OMAP_PIN_OUTPUT);
773 omap_mux_init_gpio(164, OMAP_PIN_OUTPUT);
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TL
774
775 gpmc_smc91x_init(&board_smc91x_data);
776}
777
778#else
779
780static inline void board_smc91x_init(void)
781{
782}
783
784#endif
785
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KV
786static void rx51_wl1251_set_power(bool enable)
787{
788 gpio_set_value(RX51_WL1251_POWER_GPIO, enable);
789}
790
791static void __init rx51_init_wl1251(void)
792{
793 int irq, ret;
794
795 ret = gpio_request(RX51_WL1251_POWER_GPIO, "wl1251 power");
796 if (ret < 0)
797 goto error;
798
799 ret = gpio_direction_output(RX51_WL1251_POWER_GPIO, 0);
800 if (ret < 0)
801 goto err_power;
802
803 ret = gpio_request(RX51_WL1251_IRQ_GPIO, "wl1251 irq");
804 if (ret < 0)
805 goto err_power;
806
807 ret = gpio_direction_input(RX51_WL1251_IRQ_GPIO);
808 if (ret < 0)
809 goto err_irq;
810
811 irq = gpio_to_irq(RX51_WL1251_IRQ_GPIO);
812 if (irq < 0)
813 goto err_irq;
814
815 wl1251_pdata.set_power = rx51_wl1251_set_power;
816 rx51_peripherals_spi_board_info[RX51_SPI_WL1251].irq = irq;
817
818 return;
819
820err_irq:
821 gpio_free(RX51_WL1251_IRQ_GPIO);
822
823err_power:
824 gpio_free(RX51_WL1251_POWER_GPIO);
825
826error:
827 printk(KERN_ERR "wl1251 board initialisation failed\n");
828 wl1251_pdata.set_power = NULL;
829
830 /*
831 * Now rx51_peripherals_spi_board_info[1].irq is zero and
832 * set_power is null, and wl1251_probe() will fail.
833 */
834}
835
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LL
836void __init rx51_peripherals_init(void)
837{
ffe7f95b 838 rx51_i2c_init();
aa62e90f 839 board_onenand_init();
1a48e157 840 board_smc91x_init();
f014ee32 841 rx51_add_gpio_keys();
a24e61a9
KV
842 rx51_init_wl1251();
843 spi_register_board_info(rx51_peripherals_spi_board_info,
844 ARRAY_SIZE(rx51_peripherals_spi_board_info));
68ff0423 845 omap2_hsmmc_init(mmc);
ffe7f95b
LL
846}
847
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