Commit | Line | Data |
---|---|---|
ffe7f95b | 1 | /* |
9312fffb | 2 | * linux/arch/arm/mach-omap2/board-rx51-peripherals.c |
ffe7f95b LL |
3 | * |
4 | * Copyright (C) 2008-2009 Nokia | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 as | |
8 | * published by the Free Software Foundation. | |
9 | */ | |
10 | ||
11 | #include <linux/kernel.h> | |
12 | #include <linux/init.h> | |
13 | #include <linux/platform_device.h> | |
14 | #include <linux/input.h> | |
6135434a | 15 | #include <linux/input/matrix_keypad.h> |
ffe7f95b | 16 | #include <linux/spi/spi.h> |
c1f9a095 | 17 | #include <linux/wl12xx.h> |
3dad5356 | 18 | #include <linux/spi/tsc2005.h> |
ffe7f95b | 19 | #include <linux/i2c.h> |
ebeb53e1 | 20 | #include <linux/i2c/twl.h> |
ffe7f95b LL |
21 | #include <linux/clk.h> |
22 | #include <linux/delay.h> | |
23 | #include <linux/regulator/machine.h> | |
24 | #include <linux/gpio.h> | |
f014ee32 | 25 | #include <linux/gpio_keys.h> |
5e763d29 | 26 | #include <linux/mmc/host.h> |
10299e2e | 27 | #include <linux/power/isp1704_charger.h> |
2203747c AB |
28 | #include <linux/platform_data/spi-omap2-mcspi.h> |
29 | #include <linux/platform_data/mtd-onenand-omap2.h> | |
30 | ||
9f97da78 | 31 | #include <asm/system_info.h> |
ffe7f95b | 32 | |
4e65331c | 33 | #include "common.h" |
45c3eb7d | 34 | #include <linux/omap-dma.h> |
60628152 | 35 | #include "gpmc-smc91x.h" |
ffe7f95b | 36 | |
0a6f98c9 | 37 | #include "board-rx51.h" |
04aeae77 | 38 | |
87581fd4 | 39 | #include <sound/tlv320aic3x.h> |
64d06691 | 40 | #include <sound/tpa6130a2-plat.h> |
589541c0 JN |
41 | #include <media/radio-si4713.h> |
42 | #include <media/si4713.h> | |
eeada9e8 | 43 | #include <linux/leds-lp5523.h> |
87581fd4 | 44 | |
70b5d737 | 45 | #include <../drivers/staging/iio/light/tsl2563.h> |
3b511201 | 46 | #include <linux/lis3lv02d.h> |
70b5d737 | 47 | |
322c183c TK |
48 | #if defined(CONFIG_IR_RX51) || defined(CONFIG_IR_RX51_MODULE) |
49 | #include <media/ir-rx51.h> | |
50 | #endif | |
51 | ||
4896e394 | 52 | #include "mux.h" |
1d5aef49 | 53 | #include "omap-pm.h" |
d02a900b | 54 | #include "hsmmc.h" |
fbd8071c | 55 | #include "common-board-devices.h" |
99f0b8d6 | 56 | #include "gpmc.h" |
b6ab13e7 | 57 | #include "gpmc-onenand.h" |
ffe7f95b | 58 | |
f52eeee8 AH |
59 | #define SYSTEM_REV_B_USES_VAUX3 0x1699 |
60 | #define SYSTEM_REV_S_USES_VAUX3 0x8 | |
61 | ||
a24e61a9 KV |
62 | #define RX51_WL1251_POWER_GPIO 87 |
63 | #define RX51_WL1251_IRQ_GPIO 42 | |
589541c0 JN |
64 | #define RX51_FMTX_RESET_GPIO 163 |
65 | #define RX51_FMTX_IRQ 53 | |
eeada9e8 | 66 | #define RX51_LP5523_CHIP_EN_GPIO 41 |
a24e61a9 | 67 | |
10299e2e KJ |
68 | #define RX51_USB_TRANSCEIVER_RST_GPIO 67 |
69 | ||
3dad5356 AK |
70 | #define RX51_TSC2005_RESET_GPIO 104 |
71 | #define RX51_TSC2005_IRQ_GPIO 100 | |
72 | ||
3b511201 AP |
73 | #define LIS302_IRQ1_GPIO 181 |
74 | #define LIS302_IRQ2_GPIO 180 /* Not yet in use */ | |
75 | ||
a24e61a9 KV |
76 | /* list all spi devices here */ |
77 | enum { | |
78 | RX51_SPI_WL1251, | |
03e11104 | 79 | RX51_SPI_MIPID, /* LCD panel */ |
6996e7ff | 80 | RX51_SPI_TSC2005, /* Touch Controller */ |
a24e61a9 KV |
81 | }; |
82 | ||
83 | static struct wl12xx_platform_data wl1251_pdata; | |
3dad5356 | 84 | static struct tsc2005_platform_data tsc2005_pdata; |
a24e61a9 | 85 | |
3b511201 AP |
86 | #if defined(CONFIG_SENSORS_LIS3_I2C) || defined(CONFIG_SENSORS_LIS3_I2C_MODULE) |
87 | static int lis302_setup(void) | |
88 | { | |
89 | int err; | |
90 | int irq1 = LIS302_IRQ1_GPIO; | |
91 | int irq2 = LIS302_IRQ2_GPIO; | |
92 | ||
93 | /* gpio for interrupt pin 1 */ | |
94 | err = gpio_request(irq1, "lis3lv02dl_irq1"); | |
95 | if (err) { | |
96 | printk(KERN_ERR "lis3lv02dl: gpio request failed\n"); | |
97 | goto out; | |
98 | } | |
99 | ||
100 | /* gpio for interrupt pin 2 */ | |
101 | err = gpio_request(irq2, "lis3lv02dl_irq2"); | |
102 | if (err) { | |
103 | gpio_free(irq1); | |
104 | printk(KERN_ERR "lis3lv02dl: gpio request failed\n"); | |
105 | goto out; | |
106 | } | |
107 | ||
108 | gpio_direction_input(irq1); | |
109 | gpio_direction_input(irq2); | |
110 | ||
111 | out: | |
112 | return err; | |
113 | } | |
114 | ||
115 | static int lis302_release(void) | |
116 | { | |
117 | gpio_free(LIS302_IRQ1_GPIO); | |
118 | gpio_free(LIS302_IRQ2_GPIO); | |
119 | ||
120 | return 0; | |
121 | } | |
122 | ||
123 | static struct lis3lv02d_platform_data rx51_lis3lv02d_data = { | |
124 | .click_flags = LIS3_CLICK_SINGLE_X | LIS3_CLICK_SINGLE_Y | | |
125 | LIS3_CLICK_SINGLE_Z, | |
126 | /* Limits are 0.5g * value */ | |
127 | .click_thresh_x = 8, | |
128 | .click_thresh_y = 8, | |
129 | .click_thresh_z = 10, | |
130 | /* Click must be longer than time limit */ | |
131 | .click_time_limit = 9, | |
132 | /* Kind of debounce filter */ | |
133 | .click_latency = 50, | |
134 | ||
135 | /* Limits for all axis. millig-value / 18 to get HW values */ | |
136 | .wakeup_flags = LIS3_WAKEUP_X_HI | LIS3_WAKEUP_Y_HI, | |
137 | .wakeup_thresh = 800 / 18, | |
138 | .wakeup_flags2 = LIS3_WAKEUP_Z_HI , | |
139 | .wakeup_thresh2 = 900 / 18, | |
140 | ||
141 | .hipass_ctrl = LIS3_HIPASS1_DISABLE | LIS3_HIPASS2_DISABLE, | |
142 | ||
143 | /* Interrupt line 2 for click detection, line 1 for thresholds */ | |
144 | .irq_cfg = LIS3_IRQ2_CLICK | LIS3_IRQ1_FF_WU_12, | |
145 | ||
146 | .axis_x = LIS3_DEV_X, | |
147 | .axis_y = LIS3_INV_DEV_Y, | |
148 | .axis_z = LIS3_INV_DEV_Z, | |
149 | .setup_resources = lis302_setup, | |
150 | .release_resources = lis302_release, | |
151 | .st_min_limits = {-32, 3, 3}, | |
152 | .st_max_limits = {-3, 32, 32}, | |
3b511201 AP |
153 | }; |
154 | #endif | |
155 | ||
70b5d737 MN |
156 | #if defined(CONFIG_SENSORS_TSL2563) || defined(CONFIG_SENSORS_TSL2563_MODULE) |
157 | static struct tsl2563_platform_data rx51_tsl2563_platform_data = { | |
158 | .cover_comp_gain = 16, | |
159 | }; | |
160 | #endif | |
161 | ||
eeada9e8 AP |
162 | #if defined(CONFIG_LEDS_LP5523) || defined(CONFIG_LEDS_LP5523_MODULE) |
163 | static struct lp5523_led_config rx51_lp5523_led_config[] = { | |
164 | { | |
165 | .chan_nr = 0, | |
166 | .led_current = 50, | |
167 | }, { | |
168 | .chan_nr = 1, | |
169 | .led_current = 50, | |
170 | }, { | |
171 | .chan_nr = 2, | |
172 | .led_current = 50, | |
173 | }, { | |
174 | .chan_nr = 3, | |
175 | .led_current = 50, | |
176 | }, { | |
177 | .chan_nr = 4, | |
178 | .led_current = 50, | |
179 | }, { | |
180 | .chan_nr = 5, | |
181 | .led_current = 50, | |
182 | }, { | |
183 | .chan_nr = 6, | |
184 | .led_current = 50, | |
185 | }, { | |
186 | .chan_nr = 7, | |
187 | .led_current = 50, | |
188 | }, { | |
189 | .chan_nr = 8, | |
190 | .led_current = 50, | |
191 | } | |
192 | }; | |
193 | ||
194 | static int rx51_lp5523_setup(void) | |
195 | { | |
196 | return gpio_request_one(RX51_LP5523_CHIP_EN_GPIO, GPIOF_DIR_OUT, | |
197 | "lp5523_enable"); | |
198 | } | |
199 | ||
200 | static void rx51_lp5523_release(void) | |
201 | { | |
202 | gpio_free(RX51_LP5523_CHIP_EN_GPIO); | |
203 | } | |
204 | ||
205 | static void rx51_lp5523_enable(bool state) | |
206 | { | |
207 | gpio_set_value(RX51_LP5523_CHIP_EN_GPIO, !!state); | |
208 | } | |
209 | ||
210 | static struct lp5523_platform_data rx51_lp5523_platform_data = { | |
211 | .led_config = rx51_lp5523_led_config, | |
212 | .num_channels = ARRAY_SIZE(rx51_lp5523_led_config), | |
213 | .clock_mode = LP5523_CLOCK_AUTO, | |
214 | .setup_resources = rx51_lp5523_setup, | |
215 | .release_resources = rx51_lp5523_release, | |
216 | .enable = rx51_lp5523_enable, | |
217 | }; | |
218 | #endif | |
219 | ||
a24e61a9 KV |
220 | static struct omap2_mcspi_device_config wl1251_mcspi_config = { |
221 | .turbo_mode = 0, | |
a24e61a9 KV |
222 | }; |
223 | ||
03e11104 RQ |
224 | static struct omap2_mcspi_device_config mipid_mcspi_config = { |
225 | .turbo_mode = 0, | |
03e11104 RQ |
226 | }; |
227 | ||
6996e7ff RQ |
228 | static struct omap2_mcspi_device_config tsc2005_mcspi_config = { |
229 | .turbo_mode = 0, | |
6996e7ff RQ |
230 | }; |
231 | ||
a24e61a9 KV |
232 | static struct spi_board_info rx51_peripherals_spi_board_info[] __initdata = { |
233 | [RX51_SPI_WL1251] = { | |
234 | .modalias = "wl1251", | |
235 | .bus_num = 4, | |
236 | .chip_select = 0, | |
237 | .max_speed_hz = 48000000, | |
860fc976 | 238 | .mode = SPI_MODE_3, |
a24e61a9 KV |
239 | .controller_data = &wl1251_mcspi_config, |
240 | .platform_data = &wl1251_pdata, | |
241 | }, | |
03e11104 RQ |
242 | [RX51_SPI_MIPID] = { |
243 | .modalias = "acx565akm", | |
244 | .bus_num = 1, | |
245 | .chip_select = 2, | |
246 | .max_speed_hz = 6000000, | |
247 | .controller_data = &mipid_mcspi_config, | |
248 | }, | |
6996e7ff RQ |
249 | [RX51_SPI_TSC2005] = { |
250 | .modalias = "tsc2005", | |
251 | .bus_num = 1, | |
252 | .chip_select = 0, | |
6996e7ff RQ |
253 | .max_speed_hz = 6000000, |
254 | .controller_data = &tsc2005_mcspi_config, | |
3dad5356 | 255 | .platform_data = &tsc2005_pdata, |
6996e7ff | 256 | }, |
a24e61a9 KV |
257 | }; |
258 | ||
7605c0b0 PR |
259 | static struct platform_device rx51_battery_device = { |
260 | .name = "rx51-battery", | |
261 | .id = -1, | |
262 | }; | |
263 | ||
10299e2e KJ |
264 | static void rx51_charger_set_power(bool on) |
265 | { | |
266 | gpio_set_value(RX51_USB_TRANSCEIVER_RST_GPIO, on); | |
267 | } | |
268 | ||
269 | static struct isp1704_charger_data rx51_charger_data = { | |
270 | .set_power = rx51_charger_set_power, | |
271 | }; | |
272 | ||
fd0964c5 | 273 | static struct platform_device rx51_charger_device = { |
10299e2e KJ |
274 | .name = "isp1704_charger", |
275 | .dev = { | |
276 | .platform_data = &rx51_charger_data, | |
277 | }, | |
fd0964c5 HK |
278 | }; |
279 | ||
10299e2e KJ |
280 | static void __init rx51_charger_init(void) |
281 | { | |
282 | WARN_ON(gpio_request_one(RX51_USB_TRANSCEIVER_RST_GPIO, | |
e5fe29c7 | 283 | GPIOF_OUT_INIT_HIGH, "isp1704_reset")); |
10299e2e | 284 | |
7605c0b0 | 285 | platform_device_register(&rx51_battery_device); |
10299e2e KJ |
286 | platform_device_register(&rx51_charger_device); |
287 | } | |
288 | ||
f014ee32 JN |
289 | #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) |
290 | ||
291 | #define RX51_GPIO_CAMERA_LENS_COVER 110 | |
292 | #define RX51_GPIO_CAMERA_FOCUS 68 | |
293 | #define RX51_GPIO_CAMERA_CAPTURE 69 | |
294 | #define RX51_GPIO_KEYPAD_SLIDE 71 | |
295 | #define RX51_GPIO_LOCK_BUTTON 113 | |
296 | #define RX51_GPIO_PROXIMITY 89 | |
297 | ||
298 | #define RX51_GPIO_DEBOUNCE_TIMEOUT 10 | |
299 | ||
300 | static struct gpio_keys_button rx51_gpio_keys[] = { | |
301 | { | |
302 | .desc = "Camera Lens Cover", | |
303 | .type = EV_SW, | |
304 | .code = SW_CAMERA_LENS_COVER, | |
305 | .gpio = RX51_GPIO_CAMERA_LENS_COVER, | |
306 | .active_low = 1, | |
307 | .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT, | |
308 | }, { | |
309 | .desc = "Camera Focus", | |
310 | .type = EV_KEY, | |
311 | .code = KEY_CAMERA_FOCUS, | |
312 | .gpio = RX51_GPIO_CAMERA_FOCUS, | |
313 | .active_low = 1, | |
314 | .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT, | |
315 | }, { | |
316 | .desc = "Camera Capture", | |
317 | .type = EV_KEY, | |
318 | .code = KEY_CAMERA, | |
319 | .gpio = RX51_GPIO_CAMERA_CAPTURE, | |
320 | .active_low = 1, | |
321 | .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT, | |
322 | }, { | |
323 | .desc = "Lock Button", | |
324 | .type = EV_KEY, | |
325 | .code = KEY_SCREENLOCK, | |
326 | .gpio = RX51_GPIO_LOCK_BUTTON, | |
327 | .active_low = 1, | |
328 | .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT, | |
329 | }, { | |
330 | .desc = "Keypad Slide", | |
331 | .type = EV_SW, | |
332 | .code = SW_KEYPAD_SLIDE, | |
333 | .gpio = RX51_GPIO_KEYPAD_SLIDE, | |
334 | .active_low = 1, | |
335 | .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT, | |
336 | }, { | |
337 | .desc = "Proximity Sensor", | |
338 | .type = EV_SW, | |
339 | .code = SW_FRONT_PROXIMITY, | |
340 | .gpio = RX51_GPIO_PROXIMITY, | |
341 | .active_low = 0, | |
342 | .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT, | |
343 | } | |
344 | }; | |
345 | ||
346 | static struct gpio_keys_platform_data rx51_gpio_keys_data = { | |
347 | .buttons = rx51_gpio_keys, | |
348 | .nbuttons = ARRAY_SIZE(rx51_gpio_keys), | |
349 | }; | |
350 | ||
351 | static struct platform_device rx51_gpio_keys_device = { | |
352 | .name = "gpio-keys", | |
353 | .id = -1, | |
354 | .dev = { | |
355 | .platform_data = &rx51_gpio_keys_data, | |
356 | }, | |
357 | }; | |
358 | ||
359 | static void __init rx51_add_gpio_keys(void) | |
360 | { | |
361 | platform_device_register(&rx51_gpio_keys_device); | |
362 | } | |
363 | #else | |
364 | static void __init rx51_add_gpio_keys(void) | |
365 | { | |
366 | } | |
367 | #endif /* CONFIG_KEYBOARD_GPIO || CONFIG_KEYBOARD_GPIO_MODULE */ | |
368 | ||
bead4375 | 369 | static uint32_t board_keymap[] = { |
3fea6026 DT |
370 | /* |
371 | * Note that KEY(x, 8, KEY_XXX) entries represent "entrire row | |
372 | * connected to the ground" matrix state. | |
373 | */ | |
ffe7f95b | 374 | KEY(0, 0, KEY_Q), |
acf442dc AK |
375 | KEY(0, 1, KEY_O), |
376 | KEY(0, 2, KEY_P), | |
377 | KEY(0, 3, KEY_COMMA), | |
378 | KEY(0, 4, KEY_BACKSPACE), | |
379 | KEY(0, 6, KEY_A), | |
380 | KEY(0, 7, KEY_S), | |
3fea6026 | 381 | |
acf442dc | 382 | KEY(1, 0, KEY_W), |
ffe7f95b | 383 | KEY(1, 1, KEY_D), |
acf442dc AK |
384 | KEY(1, 2, KEY_F), |
385 | KEY(1, 3, KEY_G), | |
386 | KEY(1, 4, KEY_H), | |
387 | KEY(1, 5, KEY_J), | |
388 | KEY(1, 6, KEY_K), | |
389 | KEY(1, 7, KEY_L), | |
3fea6026 | 390 | |
acf442dc AK |
391 | KEY(2, 0, KEY_E), |
392 | KEY(2, 1, KEY_DOT), | |
ffe7f95b | 393 | KEY(2, 2, KEY_UP), |
acf442dc AK |
394 | KEY(2, 3, KEY_ENTER), |
395 | KEY(2, 5, KEY_Z), | |
396 | KEY(2, 6, KEY_X), | |
397 | KEY(2, 7, KEY_C), | |
3fea6026 DT |
398 | KEY(2, 8, KEY_F9), |
399 | ||
acf442dc AK |
400 | KEY(3, 0, KEY_R), |
401 | KEY(3, 1, KEY_V), | |
402 | KEY(3, 2, KEY_B), | |
ffe7f95b | 403 | KEY(3, 3, KEY_N), |
acf442dc AK |
404 | KEY(3, 4, KEY_M), |
405 | KEY(3, 5, KEY_SPACE), | |
406 | KEY(3, 6, KEY_SPACE), | |
407 | KEY(3, 7, KEY_LEFT), | |
3fea6026 | 408 | |
acf442dc AK |
409 | KEY(4, 0, KEY_T), |
410 | KEY(4, 1, KEY_DOWN), | |
411 | KEY(4, 2, KEY_RIGHT), | |
ffe7f95b | 412 | KEY(4, 4, KEY_LEFTCTRL), |
acf442dc AK |
413 | KEY(4, 5, KEY_RIGHTALT), |
414 | KEY(4, 6, KEY_LEFTSHIFT), | |
2e65a207 | 415 | KEY(4, 8, KEY_F10), |
3fea6026 | 416 | |
acf442dc | 417 | KEY(5, 0, KEY_Y), |
2e65a207 | 418 | KEY(5, 8, KEY_F11), |
3fea6026 | 419 | |
acf442dc | 420 | KEY(6, 0, KEY_U), |
3fea6026 | 421 | |
acf442dc AK |
422 | KEY(7, 0, KEY_I), |
423 | KEY(7, 1, KEY_F7), | |
424 | KEY(7, 2, KEY_F8), | |
ffe7f95b LL |
425 | }; |
426 | ||
4f543332 TL |
427 | static struct matrix_keymap_data board_map_data = { |
428 | .keymap = board_keymap, | |
429 | .keymap_size = ARRAY_SIZE(board_keymap), | |
430 | }; | |
431 | ||
ffe7f95b | 432 | static struct twl4030_keypad_data rx51_kp_data = { |
4f543332 | 433 | .keymap_data = &board_map_data, |
ffe7f95b LL |
434 | .rows = 8, |
435 | .cols = 8, | |
ffe7f95b LL |
436 | .rep = 1, |
437 | }; | |
438 | ||
ce6f0016 AH |
439 | /* Enable input logic and pull all lines up when eMMC is on. */ |
440 | static struct omap_board_mux rx51_mmc2_on_mux[] = { | |
441 | OMAP3_MUX(SDMMC2_CMD, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0), | |
442 | OMAP3_MUX(SDMMC2_DAT0, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0), | |
443 | OMAP3_MUX(SDMMC2_DAT1, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0), | |
444 | OMAP3_MUX(SDMMC2_DAT2, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0), | |
445 | OMAP3_MUX(SDMMC2_DAT3, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0), | |
446 | OMAP3_MUX(SDMMC2_DAT4, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0), | |
447 | OMAP3_MUX(SDMMC2_DAT5, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0), | |
448 | OMAP3_MUX(SDMMC2_DAT6, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0), | |
449 | OMAP3_MUX(SDMMC2_DAT7, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0), | |
450 | { .reg_offset = OMAP_MUX_TERMINATOR }, | |
451 | }; | |
452 | ||
453 | /* Disable input logic and pull all lines down when eMMC is off. */ | |
454 | static struct omap_board_mux rx51_mmc2_off_mux[] = { | |
455 | OMAP3_MUX(SDMMC2_CMD, OMAP_PULL_ENA | OMAP_MUX_MODE0), | |
456 | OMAP3_MUX(SDMMC2_DAT0, OMAP_PULL_ENA | OMAP_MUX_MODE0), | |
457 | OMAP3_MUX(SDMMC2_DAT1, OMAP_PULL_ENA | OMAP_MUX_MODE0), | |
458 | OMAP3_MUX(SDMMC2_DAT2, OMAP_PULL_ENA | OMAP_MUX_MODE0), | |
459 | OMAP3_MUX(SDMMC2_DAT3, OMAP_PULL_ENA | OMAP_MUX_MODE0), | |
460 | OMAP3_MUX(SDMMC2_DAT4, OMAP_PULL_ENA | OMAP_MUX_MODE0), | |
461 | OMAP3_MUX(SDMMC2_DAT5, OMAP_PULL_ENA | OMAP_MUX_MODE0), | |
462 | OMAP3_MUX(SDMMC2_DAT6, OMAP_PULL_ENA | OMAP_MUX_MODE0), | |
463 | OMAP3_MUX(SDMMC2_DAT7, OMAP_PULL_ENA | OMAP_MUX_MODE0), | |
464 | { .reg_offset = OMAP_MUX_TERMINATOR }, | |
465 | }; | |
466 | ||
112485e9 BC |
467 | static struct omap_mux_partition *partition; |
468 | ||
ce6f0016 AH |
469 | /* |
470 | * Current flows to eMMC when eMMC is off and the data lines are pulled up, | |
471 | * so pull them down. N.B. we pull 8 lines because we are using 8 lines. | |
472 | */ | |
473 | static void rx51_mmc2_remux(struct device *dev, int slot, int power_on) | |
474 | { | |
475 | if (power_on) | |
112485e9 | 476 | omap_mux_write_array(partition, rx51_mmc2_on_mux); |
ce6f0016 | 477 | else |
112485e9 | 478 | omap_mux_write_array(partition, rx51_mmc2_off_mux); |
ce6f0016 AH |
479 | } |
480 | ||
68ff0423 | 481 | static struct omap2_hsmmc_info mmc[] __initdata = { |
ffe7f95b LL |
482 | { |
483 | .name = "external", | |
484 | .mmc = 1, | |
3a63833e | 485 | .caps = MMC_CAP_4_BIT_DATA, |
ffe7f95b LL |
486 | .cover_only = true, |
487 | .gpio_cd = 160, | |
488 | .gpio_wp = -EINVAL, | |
5e763d29 | 489 | .power_saving = true, |
ffe7f95b LL |
490 | }, |
491 | { | |
492 | .name = "internal", | |
493 | .mmc = 2, | |
3a63833e SG |
494 | .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA, |
495 | /* See also rx51_mmc2_remux */ | |
ffe7f95b LL |
496 | .gpio_cd = -EINVAL, |
497 | .gpio_wp = -EINVAL, | |
5e763d29 AH |
498 | .nonremovable = true, |
499 | .power_saving = true, | |
ce6f0016 | 500 | .remux = rx51_mmc2_remux, |
ffe7f95b LL |
501 | }, |
502 | {} /* Terminator */ | |
503 | }; | |
504 | ||
786b01a8 OD |
505 | static struct regulator_consumer_supply rx51_vmmc1_supply[] = { |
506 | REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), | |
507 | }; | |
ffe7f95b | 508 | |
664a41b8 LT |
509 | static struct regulator_consumer_supply rx51_vaux2_supply[] = { |
510 | REGULATOR_SUPPLY("vdds_csib", "omap3isp"), | |
511 | }; | |
75ccf268 | 512 | |
786b01a8 OD |
513 | static struct regulator_consumer_supply rx51_vaux3_supply[] = { |
514 | REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"), | |
515 | }; | |
ffe7f95b | 516 | |
786b01a8 OD |
517 | static struct regulator_consumer_supply rx51_vsim_supply[] = { |
518 | REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.1"), | |
519 | }; | |
ffe7f95b | 520 | |
4cfcaef1 JN |
521 | static struct regulator_consumer_supply rx51_vmmc2_supplies[] = { |
522 | /* tlv320aic3x analog supplies */ | |
5c7d9bbe JN |
523 | REGULATOR_SUPPLY("AVDD", "2-0018"), |
524 | REGULATOR_SUPPLY("DRVDD", "2-0018"), | |
caeeb4aa JN |
525 | REGULATOR_SUPPLY("AVDD", "2-0019"), |
526 | REGULATOR_SUPPLY("DRVDD", "2-0019"), | |
64d06691 JN |
527 | /* tpa6130a2 */ |
528 | REGULATOR_SUPPLY("Vdd", "2-0060"), | |
4cfcaef1 | 529 | /* Keep vmmc as last item. It is not iterated for newer boards */ |
0005ae73 | 530 | REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"), |
4cfcaef1 JN |
531 | }; |
532 | ||
533 | static struct regulator_consumer_supply rx51_vio_supplies[] = { | |
534 | /* tlv320aic3x digital supplies */ | |
5c7d9bbe JN |
535 | REGULATOR_SUPPLY("IOVDD", "2-0018"), |
536 | REGULATOR_SUPPLY("DVDD", "2-0018"), | |
caeeb4aa JN |
537 | REGULATOR_SUPPLY("IOVDD", "2-0019"), |
538 | REGULATOR_SUPPLY("DVDD", "2-0019"), | |
589541c0 JN |
539 | /* Si4713 IO supply */ |
540 | REGULATOR_SUPPLY("vio", "2-0063"), | |
4cfcaef1 JN |
541 | }; |
542 | ||
0581b52e | 543 | static struct regulator_consumer_supply rx51_vaux1_consumers[] = { |
b5b9945b | 544 | REGULATOR_SUPPLY("vdds_sdi", "omapdss"), |
589541c0 JN |
545 | /* Si4713 supply */ |
546 | REGULATOR_SUPPLY("vdd", "2-0063"), | |
0581b52e RQ |
547 | }; |
548 | ||
ffe7f95b LL |
549 | static struct regulator_init_data rx51_vaux1 = { |
550 | .constraints = { | |
551 | .name = "V28", | |
552 | .min_uV = 2800000, | |
553 | .max_uV = 2800000, | |
000d534e | 554 | .always_on = true, /* due battery cover sensor */ |
ffe7f95b LL |
555 | .valid_modes_mask = REGULATOR_MODE_NORMAL |
556 | | REGULATOR_MODE_STANDBY, | |
557 | .valid_ops_mask = REGULATOR_CHANGE_MODE | |
558 | | REGULATOR_CHANGE_STATUS, | |
559 | }, | |
0581b52e RQ |
560 | .num_consumer_supplies = ARRAY_SIZE(rx51_vaux1_consumers), |
561 | .consumer_supplies = rx51_vaux1_consumers, | |
ffe7f95b LL |
562 | }; |
563 | ||
564 | static struct regulator_init_data rx51_vaux2 = { | |
565 | .constraints = { | |
566 | .name = "VCSI", | |
567 | .min_uV = 1800000, | |
568 | .max_uV = 1800000, | |
569 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
570 | | REGULATOR_MODE_STANDBY, | |
571 | .valid_ops_mask = REGULATOR_CHANGE_MODE | |
572 | | REGULATOR_CHANGE_STATUS, | |
573 | }, | |
664a41b8 LT |
574 | .num_consumer_supplies = ARRAY_SIZE(rx51_vaux2_supply), |
575 | .consumer_supplies = rx51_vaux2_supply, | |
ffe7f95b LL |
576 | }; |
577 | ||
578 | /* VAUX3 - adds more power to VIO_18 rail */ | |
f52eeee8 | 579 | static struct regulator_init_data rx51_vaux3_cam = { |
ffe7f95b LL |
580 | .constraints = { |
581 | .name = "VCAM_DIG_18", | |
582 | .min_uV = 1800000, | |
583 | .max_uV = 1800000, | |
584 | .apply_uV = true, | |
585 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
586 | | REGULATOR_MODE_STANDBY, | |
587 | .valid_ops_mask = REGULATOR_CHANGE_MODE | |
588 | | REGULATOR_CHANGE_STATUS, | |
589 | }, | |
590 | }; | |
591 | ||
f52eeee8 AH |
592 | static struct regulator_init_data rx51_vaux3_mmc = { |
593 | .constraints = { | |
594 | .name = "VMMC2_30", | |
595 | .min_uV = 2800000, | |
596 | .max_uV = 3000000, | |
597 | .apply_uV = true, | |
598 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
599 | | REGULATOR_MODE_STANDBY, | |
600 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | |
601 | | REGULATOR_CHANGE_MODE | |
602 | | REGULATOR_CHANGE_STATUS, | |
603 | }, | |
786b01a8 OD |
604 | .num_consumer_supplies = ARRAY_SIZE(rx51_vaux3_supply), |
605 | .consumer_supplies = rx51_vaux3_supply, | |
f52eeee8 AH |
606 | }; |
607 | ||
ffe7f95b LL |
608 | static struct regulator_init_data rx51_vaux4 = { |
609 | .constraints = { | |
610 | .name = "VCAM_ANA_28", | |
611 | .min_uV = 2800000, | |
612 | .max_uV = 2800000, | |
613 | .apply_uV = true, | |
614 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
615 | | REGULATOR_MODE_STANDBY, | |
616 | .valid_ops_mask = REGULATOR_CHANGE_MODE | |
617 | | REGULATOR_CHANGE_STATUS, | |
618 | }, | |
619 | }; | |
620 | ||
621 | static struct regulator_init_data rx51_vmmc1 = { | |
622 | .constraints = { | |
623 | .min_uV = 1850000, | |
624 | .max_uV = 3150000, | |
625 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
626 | | REGULATOR_MODE_STANDBY, | |
627 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | |
628 | | REGULATOR_CHANGE_MODE | |
629 | | REGULATOR_CHANGE_STATUS, | |
630 | }, | |
786b01a8 OD |
631 | .num_consumer_supplies = ARRAY_SIZE(rx51_vmmc1_supply), |
632 | .consumer_supplies = rx51_vmmc1_supply, | |
ffe7f95b LL |
633 | }; |
634 | ||
635 | static struct regulator_init_data rx51_vmmc2 = { | |
636 | .constraints = { | |
f2add1de JN |
637 | .name = "V28_A", |
638 | .min_uV = 2800000, | |
639 | .max_uV = 3000000, | |
2827411e | 640 | .always_on = true, /* due VIO leak to AIC34 VDDs */ |
ffe7f95b LL |
641 | .apply_uV = true, |
642 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
643 | | REGULATOR_MODE_STANDBY, | |
644 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | |
645 | | REGULATOR_CHANGE_MODE | |
646 | | REGULATOR_CHANGE_STATUS, | |
647 | }, | |
4cfcaef1 JN |
648 | .num_consumer_supplies = ARRAY_SIZE(rx51_vmmc2_supplies), |
649 | .consumer_supplies = rx51_vmmc2_supplies, | |
ffe7f95b LL |
650 | }; |
651 | ||
094fc559 KJ |
652 | static struct regulator_init_data rx51_vpll1 = { |
653 | .constraints = { | |
654 | .name = "VPLL", | |
655 | .min_uV = 1800000, | |
656 | .max_uV = 1800000, | |
657 | .apply_uV = true, | |
658 | .always_on = true, | |
659 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
660 | | REGULATOR_MODE_STANDBY, | |
661 | .valid_ops_mask = REGULATOR_CHANGE_MODE, | |
662 | }, | |
663 | }; | |
664 | ||
665 | static struct regulator_init_data rx51_vpll2 = { | |
666 | .constraints = { | |
667 | .name = "VSDI_CSI", | |
668 | .min_uV = 1800000, | |
669 | .max_uV = 1800000, | |
670 | .apply_uV = true, | |
671 | .always_on = true, | |
672 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
673 | | REGULATOR_MODE_STANDBY, | |
674 | .valid_ops_mask = REGULATOR_CHANGE_MODE, | |
675 | }, | |
676 | }; | |
677 | ||
ffe7f95b LL |
678 | static struct regulator_init_data rx51_vsim = { |
679 | .constraints = { | |
680 | .name = "VMMC2_IO_18", | |
681 | .min_uV = 1800000, | |
682 | .max_uV = 1800000, | |
683 | .apply_uV = true, | |
684 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
685 | | REGULATOR_MODE_STANDBY, | |
686 | .valid_ops_mask = REGULATOR_CHANGE_MODE | |
687 | | REGULATOR_CHANGE_STATUS, | |
688 | }, | |
786b01a8 OD |
689 | .num_consumer_supplies = ARRAY_SIZE(rx51_vsim_supply), |
690 | .consumer_supplies = rx51_vsim_supply, | |
ffe7f95b LL |
691 | }; |
692 | ||
4cfcaef1 JN |
693 | static struct regulator_init_data rx51_vio = { |
694 | .constraints = { | |
695 | .min_uV = 1800000, | |
696 | .max_uV = 1800000, | |
697 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
698 | | REGULATOR_MODE_STANDBY, | |
699 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | |
700 | | REGULATOR_CHANGE_MODE | |
701 | | REGULATOR_CHANGE_STATUS, | |
702 | }, | |
703 | .num_consumer_supplies = ARRAY_SIZE(rx51_vio_supplies), | |
704 | .consumer_supplies = rx51_vio_supplies, | |
705 | }; | |
706 | ||
094fc559 KJ |
707 | static struct regulator_init_data rx51_vintana1 = { |
708 | .constraints = { | |
709 | .name = "VINTANA1", | |
710 | .min_uV = 1500000, | |
711 | .max_uV = 1500000, | |
712 | .always_on = true, | |
713 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
714 | | REGULATOR_MODE_STANDBY, | |
715 | .valid_ops_mask = REGULATOR_CHANGE_MODE, | |
716 | }, | |
717 | }; | |
718 | ||
719 | static struct regulator_init_data rx51_vintana2 = { | |
720 | .constraints = { | |
721 | .name = "VINTANA2", | |
722 | .min_uV = 2750000, | |
723 | .max_uV = 2750000, | |
724 | .apply_uV = true, | |
725 | .always_on = true, | |
726 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
727 | | REGULATOR_MODE_STANDBY, | |
728 | .valid_ops_mask = REGULATOR_CHANGE_MODE, | |
729 | }, | |
730 | }; | |
731 | ||
732 | static struct regulator_init_data rx51_vintdig = { | |
733 | .constraints = { | |
734 | .name = "VINTDIG", | |
735 | .min_uV = 1500000, | |
736 | .max_uV = 1500000, | |
737 | .always_on = true, | |
738 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
739 | | REGULATOR_MODE_STANDBY, | |
740 | .valid_ops_mask = REGULATOR_CHANGE_MODE, | |
741 | }, | |
742 | }; | |
743 | ||
589541c0 JN |
744 | static struct si4713_platform_data rx51_si4713_i2c_data __initdata_or_module = { |
745 | .gpio_reset = RX51_FMTX_RESET_GPIO, | |
746 | }; | |
747 | ||
748 | static struct i2c_board_info rx51_si4713_board_info __initdata_or_module = { | |
749 | I2C_BOARD_INFO("si4713", SI4713_I2C_ADDR_BUSEN_HIGH), | |
750 | .platform_data = &rx51_si4713_i2c_data, | |
751 | }; | |
752 | ||
753 | static struct radio_si4713_platform_data rx51_si4713_data __initdata_or_module = { | |
754 | .i2c_bus = 2, | |
755 | .subdev_board_info = &rx51_si4713_board_info, | |
756 | }; | |
757 | ||
12aee6c6 | 758 | static struct platform_device rx51_si4713_dev __initdata_or_module = { |
589541c0 JN |
759 | .name = "radio-si4713", |
760 | .id = -1, | |
761 | .dev = { | |
762 | .platform_data = &rx51_si4713_data, | |
763 | }, | |
764 | }; | |
765 | ||
766 | static __init void rx51_init_si4713(void) | |
767 | { | |
768 | int err; | |
769 | ||
770 | err = gpio_request_one(RX51_FMTX_IRQ, GPIOF_DIR_IN, "si4713 irq"); | |
771 | if (err) { | |
772 | printk(KERN_ERR "Cannot request si4713 irq gpio. %d\n", err); | |
773 | return; | |
774 | } | |
775 | rx51_si4713_board_info.irq = gpio_to_irq(RX51_FMTX_IRQ); | |
776 | platform_device_register(&rx51_si4713_dev); | |
777 | } | |
778 | ||
ffe7f95b LL |
779 | static int rx51_twlgpio_setup(struct device *dev, unsigned gpio, unsigned n) |
780 | { | |
781 | /* FIXME this gpio setup is just a placeholder for now */ | |
bc593f5d | 782 | gpio_request_one(gpio + 6, GPIOF_OUT_INIT_LOW, "backlight_pwm"); |
c0ad4fac | 783 | gpio_request_one(gpio + 7, GPIOF_OUT_INIT_LOW, "speaker_en"); |
ffe7f95b | 784 | |
ffe7f95b LL |
785 | return 0; |
786 | } | |
787 | ||
788 | static struct twl4030_gpio_platform_data rx51_gpio_data = { | |
ffe7f95b LL |
789 | .pulldowns = BIT(0) | BIT(1) | BIT(2) | BIT(3) |
790 | | BIT(4) | BIT(5) | |
791 | | BIT(8) | BIT(9) | BIT(10) | BIT(11) | |
792 | | BIT(12) | BIT(13) | BIT(14) | BIT(15) | |
793 | | BIT(16) | BIT(17) , | |
794 | .setup = rx51_twlgpio_setup, | |
795 | }; | |
796 | ||
9312fffb AK |
797 | static struct twl4030_ins sleep_on_seq[] __initdata = { |
798 | /* | |
3c684e84 | 799 | * Turn off everything |
9312fffb | 800 | */ |
3c684e84 | 801 | {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 1, 0, RES_STATE_SLEEP), 2}, |
9312fffb AK |
802 | }; |
803 | ||
804 | static struct twl4030_script sleep_on_script __initdata = { | |
805 | .script = sleep_on_seq, | |
806 | .size = ARRAY_SIZE(sleep_on_seq), | |
807 | .flags = TWL4030_SLEEP_SCRIPT, | |
808 | }; | |
809 | ||
810 | static struct twl4030_ins wakeup_seq[] __initdata = { | |
811 | /* | |
3c684e84 | 812 | * Reenable everything |
9312fffb | 813 | */ |
3c684e84 | 814 | {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 1, 0, RES_STATE_ACTIVE), 2}, |
9312fffb AK |
815 | }; |
816 | ||
817 | static struct twl4030_script wakeup_script __initdata = { | |
818 | .script = wakeup_seq, | |
819 | .size = ARRAY_SIZE(wakeup_seq), | |
820 | .flags = TWL4030_WAKEUP12_SCRIPT, | |
821 | }; | |
822 | ||
823 | static struct twl4030_ins wakeup_p3_seq[] __initdata = { | |
824 | /* | |
3c684e84 | 825 | * Reenable everything |
9312fffb | 826 | */ |
3c684e84 | 827 | {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 1, 0, RES_STATE_ACTIVE), 2}, |
9312fffb AK |
828 | }; |
829 | ||
830 | static struct twl4030_script wakeup_p3_script __initdata = { | |
831 | .script = wakeup_p3_seq, | |
832 | .size = ARRAY_SIZE(wakeup_p3_seq), | |
833 | .flags = TWL4030_WAKEUP3_SCRIPT, | |
834 | }; | |
835 | ||
836 | static struct twl4030_ins wrst_seq[] __initdata = { | |
837 | /* | |
838 | * Reset twl4030. | |
839 | * Reset VDD1 regulator. | |
840 | * Reset VDD2 regulator. | |
841 | * Reset VPLL1 regulator. | |
842 | * Enable sysclk output. | |
843 | * Reenable twl4030. | |
844 | */ | |
845 | {MSG_SINGULAR(DEV_GRP_NULL, RES_RESET, RES_STATE_OFF), 2}, | |
846 | {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 0, 1, RES_STATE_ACTIVE), | |
847 | 0x13}, | |
9312fffb AK |
848 | {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_PP, 0, 3, RES_STATE_OFF), 0x13}, |
849 | {MSG_SINGULAR(DEV_GRP_NULL, RES_VDD1, RES_STATE_WRST), 0x13}, | |
850 | {MSG_SINGULAR(DEV_GRP_NULL, RES_VDD2, RES_STATE_WRST), 0x13}, | |
851 | {MSG_SINGULAR(DEV_GRP_NULL, RES_VPLL1, RES_STATE_WRST), 0x35}, | |
3c684e84 | 852 | {MSG_SINGULAR(DEV_GRP_P3, RES_HFCLKOUT, RES_STATE_ACTIVE), 2}, |
9312fffb AK |
853 | {MSG_SINGULAR(DEV_GRP_NULL, RES_RESET, RES_STATE_ACTIVE), 2}, |
854 | }; | |
855 | ||
856 | static struct twl4030_script wrst_script __initdata = { | |
857 | .script = wrst_seq, | |
858 | .size = ARRAY_SIZE(wrst_seq), | |
859 | .flags = TWL4030_WRST_SCRIPT, | |
860 | }; | |
861 | ||
862 | static struct twl4030_script *twl4030_scripts[] __initdata = { | |
863 | /* wakeup12 script should be loaded before sleep script, otherwise a | |
864 | board might hit retention before loading of wakeup script is | |
865 | completed. This can cause boot failures depending on timing issues. | |
866 | */ | |
867 | &wakeup_script, | |
868 | &sleep_on_script, | |
869 | &wakeup_p3_script, | |
870 | &wrst_script, | |
871 | }; | |
872 | ||
873 | static struct twl4030_resconfig twl4030_rconfig[] __initdata = { | |
3c684e84 AK |
874 | { .resource = RES_VDD1, .devgroup = -1, |
875 | .type = 1, .type2 = -1, .remap_off = RES_STATE_OFF, | |
876 | .remap_sleep = RES_STATE_OFF | |
877 | }, | |
878 | { .resource = RES_VDD2, .devgroup = -1, | |
879 | .type = 1, .type2 = -1, .remap_off = RES_STATE_OFF, | |
880 | .remap_sleep = RES_STATE_OFF | |
881 | }, | |
882 | { .resource = RES_VPLL1, .devgroup = -1, | |
883 | .type = 1, .type2 = -1, .remap_off = RES_STATE_OFF, | |
884 | .remap_sleep = RES_STATE_OFF | |
885 | }, | |
886 | { .resource = RES_VPLL2, .devgroup = -1, | |
887 | .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1 | |
888 | }, | |
889 | { .resource = RES_VAUX1, .devgroup = -1, | |
890 | .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1 | |
891 | }, | |
892 | { .resource = RES_VAUX2, .devgroup = -1, | |
893 | .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1 | |
894 | }, | |
895 | { .resource = RES_VAUX3, .devgroup = -1, | |
896 | .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1 | |
897 | }, | |
898 | { .resource = RES_VAUX4, .devgroup = -1, | |
899 | .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1 | |
900 | }, | |
901 | { .resource = RES_VMMC1, .devgroup = -1, | |
902 | .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1 | |
903 | }, | |
904 | { .resource = RES_VMMC2, .devgroup = -1, | |
905 | .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1 | |
906 | }, | |
907 | { .resource = RES_VDAC, .devgroup = -1, | |
908 | .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1 | |
909 | }, | |
910 | { .resource = RES_VSIM, .devgroup = -1, | |
911 | .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1 | |
912 | }, | |
913 | { .resource = RES_VINTANA1, .devgroup = DEV_GRP_P1 | DEV_GRP_P3, | |
914 | .type = -1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
915 | }, | |
916 | { .resource = RES_VINTANA2, .devgroup = DEV_GRP_P1 | DEV_GRP_P3, | |
917 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
918 | }, | |
919 | { .resource = RES_VINTDIG, .devgroup = DEV_GRP_P1 | DEV_GRP_P3, | |
920 | .type = -1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
921 | }, | |
922 | { .resource = RES_VIO, .devgroup = DEV_GRP_P3, | |
923 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
924 | }, | |
925 | { .resource = RES_CLKEN, .devgroup = DEV_GRP_P1 | DEV_GRP_P3, | |
926 | .type = 1, .type2 = -1 , .remap_off = -1, .remap_sleep = -1 | |
927 | }, | |
928 | { .resource = RES_REGEN, .devgroup = DEV_GRP_P1 | DEV_GRP_P3, | |
929 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
930 | }, | |
931 | { .resource = RES_NRES_PWRON, .devgroup = DEV_GRP_P1 | DEV_GRP_P3, | |
932 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
933 | }, | |
934 | { .resource = RES_SYSEN, .devgroup = DEV_GRP_P1 | DEV_GRP_P3, | |
935 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
936 | }, | |
937 | { .resource = RES_HFCLKOUT, .devgroup = DEV_GRP_P3, | |
938 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
939 | }, | |
940 | { .resource = RES_32KCLKOUT, .devgroup = -1, | |
941 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
942 | }, | |
943 | { .resource = RES_RESET, .devgroup = -1, | |
944 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
945 | }, | |
d7ac829f | 946 | { .resource = RES_MAIN_REF, .devgroup = -1, |
3c684e84 AK |
947 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 |
948 | }, | |
9312fffb AK |
949 | { 0, 0}, |
950 | }; | |
951 | ||
952 | static struct twl4030_power_data rx51_t2scripts_data __initdata = { | |
953 | .scripts = twl4030_scripts, | |
954 | .num = ARRAY_SIZE(twl4030_scripts), | |
955 | .resource_config = twl4030_rconfig, | |
956 | }; | |
957 | ||
8c3d4534 | 958 | static struct twl4030_vibra_data rx51_vibra_data __initdata = { |
b7a834cc IK |
959 | .coexist = 0, |
960 | }; | |
961 | ||
8c3d4534 | 962 | static struct twl4030_audio_data rx51_audio_data __initdata = { |
b7a834cc IK |
963 | .audio_mclk = 26000000, |
964 | .vibra = &rx51_vibra_data, | |
965 | }; | |
9312fffb | 966 | |
9312fffb | 967 | static struct twl4030_platform_data rx51_twldata __initdata = { |
ffe7f95b LL |
968 | /* platform_data for children goes here */ |
969 | .gpio = &rx51_gpio_data, | |
970 | .keypad = &rx51_kp_data, | |
9312fffb | 971 | .power = &rx51_t2scripts_data, |
4ae6df5e | 972 | .audio = &rx51_audio_data, |
ffe7f95b LL |
973 | |
974 | .vaux1 = &rx51_vaux1, | |
975 | .vaux2 = &rx51_vaux2, | |
ffe7f95b LL |
976 | .vaux4 = &rx51_vaux4, |
977 | .vmmc1 = &rx51_vmmc1, | |
094fc559 KJ |
978 | .vpll1 = &rx51_vpll1, |
979 | .vpll2 = &rx51_vpll2, | |
ffe7f95b | 980 | .vsim = &rx51_vsim, |
094fc559 KJ |
981 | .vintana1 = &rx51_vintana1, |
982 | .vintana2 = &rx51_vintana2, | |
983 | .vintdig = &rx51_vintdig, | |
4cfcaef1 | 984 | .vio = &rx51_vio, |
ffe7f95b LL |
985 | }; |
986 | ||
f0c61d3d | 987 | static struct tpa6130a2_platform_data rx51_tpa6130a2_data __initdata_or_module = { |
64d06691 JN |
988 | .power_gpio = 98, |
989 | }; | |
990 | ||
f0fba2ad LG |
991 | /* Audio setup data */ |
992 | static struct aic3x_setup_data rx51_aic34_setup = { | |
993 | .gpio_func[0] = AIC3X_GPIO1_FUNC_DISABLED, | |
994 | .gpio_func[1] = AIC3X_GPIO2_FUNC_DIGITAL_MIC_INPUT, | |
995 | }; | |
996 | ||
e4862f2f | 997 | static struct aic3x_pdata rx51_aic3x_data = { |
f0fba2ad LG |
998 | .setup = &rx51_aic34_setup, |
999 | .gpio_reset = 60, | |
1000 | }; | |
1001 | ||
caeeb4aa JN |
1002 | static struct aic3x_pdata rx51_aic3x_data2 = { |
1003 | .gpio_reset = 60, | |
1004 | }; | |
1005 | ||
dabe929b JN |
1006 | static struct i2c_board_info __initdata rx51_peripherals_i2c_board_info_2[] = { |
1007 | { | |
1008 | I2C_BOARD_INFO("tlv320aic3x", 0x18), | |
87581fd4 | 1009 | .platform_data = &rx51_aic3x_data, |
dabe929b | 1010 | }, |
caeeb4aa JN |
1011 | { |
1012 | I2C_BOARD_INFO("tlv320aic3x", 0x19), | |
1013 | .platform_data = &rx51_aic3x_data2, | |
1014 | }, | |
70b5d737 MN |
1015 | #if defined(CONFIG_SENSORS_TSL2563) || defined(CONFIG_SENSORS_TSL2563_MODULE) |
1016 | { | |
1017 | I2C_BOARD_INFO("tsl2563", 0x29), | |
1018 | .platform_data = &rx51_tsl2563_platform_data, | |
1019 | }, | |
eeada9e8 AP |
1020 | #endif |
1021 | #if defined(CONFIG_LEDS_LP5523) || defined(CONFIG_LEDS_LP5523_MODULE) | |
1022 | { | |
1023 | I2C_BOARD_INFO("lp5523", 0x32), | |
1024 | .platform_data = &rx51_lp5523_platform_data, | |
1025 | }, | |
70b5d737 | 1026 | #endif |
d77711aa PR |
1027 | { |
1028 | I2C_BOARD_INFO("bq27200", 0x55), | |
1029 | }, | |
64d06691 JN |
1030 | { |
1031 | I2C_BOARD_INFO("tpa6130a2", 0x60), | |
1032 | .platform_data = &rx51_tpa6130a2_data, | |
1033 | } | |
dabe929b JN |
1034 | }; |
1035 | ||
3b511201 AP |
1036 | static struct i2c_board_info __initdata rx51_peripherals_i2c_board_info_3[] = { |
1037 | #if defined(CONFIG_SENSORS_LIS3_I2C) || defined(CONFIG_SENSORS_LIS3_I2C_MODULE) | |
1038 | { | |
1039 | I2C_BOARD_INFO("lis3lv02d", 0x1d), | |
1040 | .platform_data = &rx51_lis3lv02d_data, | |
3b511201 AP |
1041 | }, |
1042 | #endif | |
1043 | }; | |
1044 | ||
ffe7f95b LL |
1045 | static int __init rx51_i2c_init(void) |
1046 | { | |
f52eeee8 | 1047 | if ((system_rev >= SYSTEM_REV_S_USES_VAUX3 && system_rev < 0x100) || |
4cfcaef1 | 1048 | system_rev >= SYSTEM_REV_B_USES_VAUX3) { |
f52eeee8 | 1049 | rx51_twldata.vaux3 = &rx51_vaux3_mmc; |
4cfcaef1 JN |
1050 | /* Only older boards use VMMC2 for internal MMC */ |
1051 | rx51_vmmc2.num_consumer_supplies--; | |
1052 | } else { | |
f52eeee8 | 1053 | rx51_twldata.vaux3 = &rx51_vaux3_cam; |
f52eeee8 | 1054 | } |
4cfcaef1 | 1055 | rx51_twldata.vmmc2 = &rx51_vmmc2; |
827ed9ae | 1056 | omap3_pmic_get_config(&rx51_twldata, |
b252b0ef PU |
1057 | TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_MADC, |
1058 | TWL_COMMON_REGULATOR_VDAC); | |
1059 | ||
1060 | rx51_twldata.vdac->constraints.apply_uV = true; | |
1061 | rx51_twldata.vdac->constraints.name = "VDAC"; | |
1062 | ||
7d7e1eba | 1063 | omap_pmic_init(1, 2200, "twl5030", 7 + OMAP_INTC_START, &rx51_twldata); |
dabe929b JN |
1064 | omap_register_i2c_bus(2, 100, rx51_peripherals_i2c_board_info_2, |
1065 | ARRAY_SIZE(rx51_peripherals_i2c_board_info_2)); | |
4d04317f TL |
1066 | #if defined(CONFIG_SENSORS_LIS3_I2C) || defined(CONFIG_SENSORS_LIS3_I2C_MODULE) |
1067 | rx51_lis3lv02d_data.irq2 = gpio_to_irq(LIS302_IRQ2_GPIO); | |
1068 | rx51_peripherals_i2c_board_info_3[0].irq = gpio_to_irq(LIS302_IRQ1_GPIO); | |
1069 | #endif | |
3b511201 AP |
1070 | omap_register_i2c_bus(3, 400, rx51_peripherals_i2c_board_info_3, |
1071 | ARRAY_SIZE(rx51_peripherals_i2c_board_info_3)); | |
ffe7f95b LL |
1072 | return 0; |
1073 | } | |
1074 | ||
aa62e90f JY |
1075 | #if defined(CONFIG_MTD_ONENAND_OMAP2) || \ |
1076 | defined(CONFIG_MTD_ONENAND_OMAP2_MODULE) | |
1077 | ||
1078 | static struct mtd_partition onenand_partitions[] = { | |
1079 | { | |
1080 | .name = "bootloader", | |
1081 | .offset = 0, | |
1082 | .size = 0x20000, | |
1083 | .mask_flags = MTD_WRITEABLE, /* Force read-only */ | |
1084 | }, | |
1085 | { | |
1086 | .name = "config", | |
1087 | .offset = MTDPART_OFS_APPEND, | |
1088 | .size = 0x60000, | |
1089 | }, | |
1090 | { | |
1091 | .name = "log", | |
1092 | .offset = MTDPART_OFS_APPEND, | |
1093 | .size = 0x40000, | |
1094 | }, | |
1095 | { | |
1096 | .name = "kernel", | |
1097 | .offset = MTDPART_OFS_APPEND, | |
1098 | .size = 0x200000, | |
1099 | }, | |
1100 | { | |
1101 | .name = "initfs", | |
1102 | .offset = MTDPART_OFS_APPEND, | |
1103 | .size = 0x200000, | |
1104 | }, | |
1105 | { | |
1106 | .name = "rootfs", | |
1107 | .offset = MTDPART_OFS_APPEND, | |
1108 | .size = MTDPART_SIZ_FULL, | |
1109 | }, | |
1110 | }; | |
1111 | ||
5403187f AK |
1112 | static struct omap_onenand_platform_data board_onenand_data[] = { |
1113 | { | |
1114 | .cs = 0, | |
1115 | .gpio_irq = 65, | |
1116 | .parts = onenand_partitions, | |
1117 | .nr_parts = ARRAY_SIZE(onenand_partitions), | |
1118 | .flags = ONENAND_SYNC_READWRITE, | |
1119 | } | |
aa62e90f | 1120 | }; |
aa62e90f | 1121 | #endif |
ffe7f95b | 1122 | |
1a48e157 TL |
1123 | #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) |
1124 | ||
1125 | static struct omap_smc91x_platform_data board_smc91x_data = { | |
1126 | .cs = 1, | |
1127 | .gpio_irq = 54, | |
1128 | .gpio_pwrdwn = 86, | |
1129 | .gpio_reset = 164, | |
1130 | .flags = GPMC_TIMINGS_SMC91C96 | IORESOURCE_IRQ_HIGHLEVEL, | |
1131 | }; | |
1132 | ||
1133 | static void __init board_smc91x_init(void) | |
1134 | { | |
4896e394 TL |
1135 | omap_mux_init_gpio(54, OMAP_PIN_INPUT_PULLDOWN); |
1136 | omap_mux_init_gpio(86, OMAP_PIN_OUTPUT); | |
1137 | omap_mux_init_gpio(164, OMAP_PIN_OUTPUT); | |
1a48e157 TL |
1138 | |
1139 | gpmc_smc91x_init(&board_smc91x_data); | |
1140 | } | |
1141 | ||
1142 | #else | |
1143 | ||
1144 | static inline void board_smc91x_init(void) | |
1145 | { | |
1146 | } | |
1147 | ||
1148 | #endif | |
1149 | ||
a24e61a9 KV |
1150 | static void rx51_wl1251_set_power(bool enable) |
1151 | { | |
1152 | gpio_set_value(RX51_WL1251_POWER_GPIO, enable); | |
1153 | } | |
1154 | ||
bc593f5d IG |
1155 | static struct gpio rx51_wl1251_gpios[] __initdata = { |
1156 | { RX51_WL1251_POWER_GPIO, GPIOF_OUT_INIT_LOW, "wl1251 power" }, | |
1157 | { RX51_WL1251_IRQ_GPIO, GPIOF_IN, "wl1251 irq" }, | |
1158 | }; | |
1159 | ||
a24e61a9 KV |
1160 | static void __init rx51_init_wl1251(void) |
1161 | { | |
1162 | int irq, ret; | |
1163 | ||
bc593f5d IG |
1164 | ret = gpio_request_array(rx51_wl1251_gpios, |
1165 | ARRAY_SIZE(rx51_wl1251_gpios)); | |
a24e61a9 KV |
1166 | if (ret < 0) |
1167 | goto error; | |
1168 | ||
a24e61a9 KV |
1169 | irq = gpio_to_irq(RX51_WL1251_IRQ_GPIO); |
1170 | if (irq < 0) | |
1171 | goto err_irq; | |
1172 | ||
1173 | wl1251_pdata.set_power = rx51_wl1251_set_power; | |
1174 | rx51_peripherals_spi_board_info[RX51_SPI_WL1251].irq = irq; | |
1175 | ||
1176 | return; | |
1177 | ||
1178 | err_irq: | |
1179 | gpio_free(RX51_WL1251_IRQ_GPIO); | |
a24e61a9 | 1180 | gpio_free(RX51_WL1251_POWER_GPIO); |
a24e61a9 KV |
1181 | error: |
1182 | printk(KERN_ERR "wl1251 board initialisation failed\n"); | |
1183 | wl1251_pdata.set_power = NULL; | |
1184 | ||
1185 | /* | |
1186 | * Now rx51_peripherals_spi_board_info[1].irq is zero and | |
1187 | * set_power is null, and wl1251_probe() will fail. | |
1188 | */ | |
1189 | } | |
1190 | ||
3dad5356 AK |
1191 | static struct tsc2005_platform_data tsc2005_pdata = { |
1192 | .ts_pressure_max = 2048, | |
1193 | .ts_pressure_fudge = 2, | |
1194 | .ts_x_max = 4096, | |
1195 | .ts_x_fudge = 4, | |
1196 | .ts_y_max = 4096, | |
1197 | .ts_y_fudge = 7, | |
1198 | .ts_x_plate_ohm = 280, | |
1199 | .esd_timeout_ms = 8000, | |
1200 | }; | |
1201 | ||
d4860ebe VZ |
1202 | static struct gpio rx51_tsc2005_gpios[] __initdata = { |
1203 | { RX51_TSC2005_IRQ_GPIO, GPIOF_IN, "tsc2005 IRQ" }, | |
1204 | { RX51_TSC2005_RESET_GPIO, GPIOF_OUT_INIT_HIGH, "tsc2005 reset" }, | |
1205 | }; | |
1206 | ||
3dad5356 AK |
1207 | static void rx51_tsc2005_set_reset(bool enable) |
1208 | { | |
1209 | gpio_set_value(RX51_TSC2005_RESET_GPIO, enable); | |
1210 | } | |
1211 | ||
1212 | static void __init rx51_init_tsc2005(void) | |
1213 | { | |
1214 | int r; | |
1215 | ||
d4860ebe VZ |
1216 | omap_mux_init_gpio(RX51_TSC2005_RESET_GPIO, OMAP_PIN_OUTPUT); |
1217 | omap_mux_init_gpio(RX51_TSC2005_IRQ_GPIO, OMAP_PIN_INPUT_PULLUP); | |
3dad5356 | 1218 | |
d4860ebe VZ |
1219 | r = gpio_request_array(rx51_tsc2005_gpios, |
1220 | ARRAY_SIZE(rx51_tsc2005_gpios)); | |
1221 | if (r < 0) { | |
1222 | printk(KERN_ERR "tsc2005 board initialization failed\n"); | |
3dad5356 | 1223 | tsc2005_pdata.esd_timeout_ms = 0; |
d4860ebe | 1224 | return; |
3dad5356 | 1225 | } |
d4860ebe VZ |
1226 | |
1227 | tsc2005_pdata.set_reset = rx51_tsc2005_set_reset; | |
2533c2cf TL |
1228 | rx51_peripherals_spi_board_info[RX51_SPI_TSC2005].irq = |
1229 | gpio_to_irq(RX51_TSC2005_IRQ_GPIO); | |
3dad5356 AK |
1230 | } |
1231 | ||
322c183c TK |
1232 | #if defined(CONFIG_IR_RX51) || defined(CONFIG_IR_RX51_MODULE) |
1233 | static struct lirc_rx51_platform_data rx51_lirc_data = { | |
1234 | .set_max_mpu_wakeup_lat = omap_pm_set_max_mpu_wakeup_lat, | |
1235 | .pwm_timer = 9, /* Use GPT 9 for CIR */ | |
1236 | }; | |
1237 | ||
1238 | static struct platform_device rx51_lirc_device = { | |
1239 | .name = "lirc_rx51", | |
1240 | .id = -1, | |
1241 | .dev = { | |
1242 | .platform_data = &rx51_lirc_data, | |
1243 | }, | |
1244 | }; | |
1245 | ||
1246 | static void __init rx51_init_lirc(void) | |
1247 | { | |
1248 | platform_device_register(&rx51_lirc_device); | |
1249 | } | |
1250 | #else | |
1251 | static void __init rx51_init_lirc(void) | |
1252 | { | |
1253 | } | |
1254 | #endif | |
1255 | ||
ffe7f95b LL |
1256 | void __init rx51_peripherals_init(void) |
1257 | { | |
ffe7f95b | 1258 | rx51_i2c_init(); |
094fc559 | 1259 | regulator_has_full_constraints(); |
5403187f | 1260 | gpmc_onenand_init(board_onenand_data); |
1a48e157 | 1261 | board_smc91x_init(); |
f014ee32 | 1262 | rx51_add_gpio_keys(); |
a24e61a9 | 1263 | rx51_init_wl1251(); |
3dad5356 | 1264 | rx51_init_tsc2005(); |
589541c0 | 1265 | rx51_init_si4713(); |
322c183c | 1266 | rx51_init_lirc(); |
a24e61a9 KV |
1267 | spi_register_board_info(rx51_peripherals_spi_board_info, |
1268 | ARRAY_SIZE(rx51_peripherals_spi_board_info)); | |
112485e9 BC |
1269 | |
1270 | partition = omap_mux_get("core"); | |
1271 | if (partition) | |
3b972bf0 | 1272 | omap_hsmmc_init(mmc); |
112485e9 | 1273 | |
10299e2e | 1274 | rx51_charger_init(); |
ffe7f95b LL |
1275 | } |
1276 |