Commit | Line | Data |
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ffe7f95b | 1 | /* |
9312fffb | 2 | * linux/arch/arm/mach-omap2/board-rx51-peripherals.c |
ffe7f95b LL |
3 | * |
4 | * Copyright (C) 2008-2009 Nokia | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 as | |
8 | * published by the Free Software Foundation. | |
9 | */ | |
10 | ||
11 | #include <linux/kernel.h> | |
12 | #include <linux/init.h> | |
13 | #include <linux/platform_device.h> | |
14 | #include <linux/input.h> | |
6135434a | 15 | #include <linux/input/matrix_keypad.h> |
ffe7f95b | 16 | #include <linux/spi/spi.h> |
a24e61a9 | 17 | #include <linux/spi/wl12xx.h> |
ffe7f95b LL |
18 | #include <linux/i2c.h> |
19 | #include <linux/i2c/twl4030.h> | |
20 | #include <linux/clk.h> | |
21 | #include <linux/delay.h> | |
22 | #include <linux/regulator/machine.h> | |
23 | #include <linux/gpio.h> | |
f014ee32 | 24 | #include <linux/gpio_keys.h> |
5e763d29 | 25 | #include <linux/mmc/host.h> |
ffe7f95b | 26 | |
ce491cf8 TL |
27 | #include <plat/mcspi.h> |
28 | #include <plat/mux.h> | |
29 | #include <plat/board.h> | |
30 | #include <plat/common.h> | |
31 | #include <plat/dma.h> | |
32 | #include <plat/gpmc.h> | |
ce491cf8 TL |
33 | #include <plat/onenand.h> |
34 | #include <plat/gpmc-smc91x.h> | |
ffe7f95b | 35 | |
4896e394 | 36 | #include "mux.h" |
ffe7f95b LL |
37 | #include "mmc-twl4030.h" |
38 | ||
f52eeee8 AH |
39 | #define SYSTEM_REV_B_USES_VAUX3 0x1699 |
40 | #define SYSTEM_REV_S_USES_VAUX3 0x8 | |
41 | ||
a24e61a9 KV |
42 | #define RX51_WL1251_POWER_GPIO 87 |
43 | #define RX51_WL1251_IRQ_GPIO 42 | |
44 | ||
45 | /* list all spi devices here */ | |
46 | enum { | |
47 | RX51_SPI_WL1251, | |
48 | }; | |
49 | ||
50 | static struct wl12xx_platform_data wl1251_pdata; | |
51 | ||
52 | static struct omap2_mcspi_device_config wl1251_mcspi_config = { | |
53 | .turbo_mode = 0, | |
54 | .single_channel = 1, | |
55 | }; | |
56 | ||
57 | static struct spi_board_info rx51_peripherals_spi_board_info[] __initdata = { | |
58 | [RX51_SPI_WL1251] = { | |
59 | .modalias = "wl1251", | |
60 | .bus_num = 4, | |
61 | .chip_select = 0, | |
62 | .max_speed_hz = 48000000, | |
860fc976 | 63 | .mode = SPI_MODE_3, |
a24e61a9 KV |
64 | .controller_data = &wl1251_mcspi_config, |
65 | .platform_data = &wl1251_pdata, | |
66 | }, | |
67 | }; | |
68 | ||
f014ee32 JN |
69 | #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) |
70 | ||
71 | #define RX51_GPIO_CAMERA_LENS_COVER 110 | |
72 | #define RX51_GPIO_CAMERA_FOCUS 68 | |
73 | #define RX51_GPIO_CAMERA_CAPTURE 69 | |
74 | #define RX51_GPIO_KEYPAD_SLIDE 71 | |
75 | #define RX51_GPIO_LOCK_BUTTON 113 | |
76 | #define RX51_GPIO_PROXIMITY 89 | |
77 | ||
78 | #define RX51_GPIO_DEBOUNCE_TIMEOUT 10 | |
79 | ||
80 | static struct gpio_keys_button rx51_gpio_keys[] = { | |
81 | { | |
82 | .desc = "Camera Lens Cover", | |
83 | .type = EV_SW, | |
84 | .code = SW_CAMERA_LENS_COVER, | |
85 | .gpio = RX51_GPIO_CAMERA_LENS_COVER, | |
86 | .active_low = 1, | |
87 | .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT, | |
88 | }, { | |
89 | .desc = "Camera Focus", | |
90 | .type = EV_KEY, | |
91 | .code = KEY_CAMERA_FOCUS, | |
92 | .gpio = RX51_GPIO_CAMERA_FOCUS, | |
93 | .active_low = 1, | |
94 | .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT, | |
95 | }, { | |
96 | .desc = "Camera Capture", | |
97 | .type = EV_KEY, | |
98 | .code = KEY_CAMERA, | |
99 | .gpio = RX51_GPIO_CAMERA_CAPTURE, | |
100 | .active_low = 1, | |
101 | .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT, | |
102 | }, { | |
103 | .desc = "Lock Button", | |
104 | .type = EV_KEY, | |
105 | .code = KEY_SCREENLOCK, | |
106 | .gpio = RX51_GPIO_LOCK_BUTTON, | |
107 | .active_low = 1, | |
108 | .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT, | |
109 | }, { | |
110 | .desc = "Keypad Slide", | |
111 | .type = EV_SW, | |
112 | .code = SW_KEYPAD_SLIDE, | |
113 | .gpio = RX51_GPIO_KEYPAD_SLIDE, | |
114 | .active_low = 1, | |
115 | .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT, | |
116 | }, { | |
117 | .desc = "Proximity Sensor", | |
118 | .type = EV_SW, | |
119 | .code = SW_FRONT_PROXIMITY, | |
120 | .gpio = RX51_GPIO_PROXIMITY, | |
121 | .active_low = 0, | |
122 | .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT, | |
123 | } | |
124 | }; | |
125 | ||
126 | static struct gpio_keys_platform_data rx51_gpio_keys_data = { | |
127 | .buttons = rx51_gpio_keys, | |
128 | .nbuttons = ARRAY_SIZE(rx51_gpio_keys), | |
129 | }; | |
130 | ||
131 | static struct platform_device rx51_gpio_keys_device = { | |
132 | .name = "gpio-keys", | |
133 | .id = -1, | |
134 | .dev = { | |
135 | .platform_data = &rx51_gpio_keys_data, | |
136 | }, | |
137 | }; | |
138 | ||
139 | static void __init rx51_add_gpio_keys(void) | |
140 | { | |
141 | platform_device_register(&rx51_gpio_keys_device); | |
142 | } | |
143 | #else | |
144 | static void __init rx51_add_gpio_keys(void) | |
145 | { | |
146 | } | |
147 | #endif /* CONFIG_KEYBOARD_GPIO || CONFIG_KEYBOARD_GPIO_MODULE */ | |
148 | ||
4f543332 | 149 | static int board_keymap[] = { |
ffe7f95b | 150 | KEY(0, 0, KEY_Q), |
acf442dc AK |
151 | KEY(0, 1, KEY_O), |
152 | KEY(0, 2, KEY_P), | |
153 | KEY(0, 3, KEY_COMMA), | |
154 | KEY(0, 4, KEY_BACKSPACE), | |
155 | KEY(0, 6, KEY_A), | |
156 | KEY(0, 7, KEY_S), | |
157 | KEY(1, 0, KEY_W), | |
ffe7f95b | 158 | KEY(1, 1, KEY_D), |
acf442dc AK |
159 | KEY(1, 2, KEY_F), |
160 | KEY(1, 3, KEY_G), | |
161 | KEY(1, 4, KEY_H), | |
162 | KEY(1, 5, KEY_J), | |
163 | KEY(1, 6, KEY_K), | |
164 | KEY(1, 7, KEY_L), | |
165 | KEY(2, 0, KEY_E), | |
166 | KEY(2, 1, KEY_DOT), | |
ffe7f95b | 167 | KEY(2, 2, KEY_UP), |
acf442dc AK |
168 | KEY(2, 3, KEY_ENTER), |
169 | KEY(2, 5, KEY_Z), | |
170 | KEY(2, 6, KEY_X), | |
171 | KEY(2, 7, KEY_C), | |
172 | KEY(3, 0, KEY_R), | |
173 | KEY(3, 1, KEY_V), | |
174 | KEY(3, 2, KEY_B), | |
ffe7f95b | 175 | KEY(3, 3, KEY_N), |
acf442dc AK |
176 | KEY(3, 4, KEY_M), |
177 | KEY(3, 5, KEY_SPACE), | |
178 | KEY(3, 6, KEY_SPACE), | |
179 | KEY(3, 7, KEY_LEFT), | |
180 | KEY(4, 0, KEY_T), | |
181 | KEY(4, 1, KEY_DOWN), | |
182 | KEY(4, 2, KEY_RIGHT), | |
ffe7f95b | 183 | KEY(4, 4, KEY_LEFTCTRL), |
acf442dc AK |
184 | KEY(4, 5, KEY_RIGHTALT), |
185 | KEY(4, 6, KEY_LEFTSHIFT), | |
186 | KEY(5, 0, KEY_Y), | |
187 | KEY(6, 0, KEY_U), | |
188 | KEY(7, 0, KEY_I), | |
189 | KEY(7, 1, KEY_F7), | |
190 | KEY(7, 2, KEY_F8), | |
191 | KEY(0xff, 2, KEY_F9), | |
192 | KEY(0xff, 4, KEY_F10), | |
193 | KEY(0xff, 5, KEY_F11), | |
ffe7f95b LL |
194 | }; |
195 | ||
4f543332 TL |
196 | static struct matrix_keymap_data board_map_data = { |
197 | .keymap = board_keymap, | |
198 | .keymap_size = ARRAY_SIZE(board_keymap), | |
199 | }; | |
200 | ||
ffe7f95b | 201 | static struct twl4030_keypad_data rx51_kp_data = { |
4f543332 | 202 | .keymap_data = &board_map_data, |
ffe7f95b LL |
203 | .rows = 8, |
204 | .cols = 8, | |
ffe7f95b LL |
205 | .rep = 1, |
206 | }; | |
207 | ||
ffe7f95b LL |
208 | static struct twl4030_madc_platform_data rx51_madc_data = { |
209 | .irq_line = 1, | |
210 | }; | |
211 | ||
212 | static struct twl4030_hsmmc_info mmc[] = { | |
213 | { | |
214 | .name = "external", | |
215 | .mmc = 1, | |
216 | .wires = 4, | |
217 | .cover_only = true, | |
218 | .gpio_cd = 160, | |
219 | .gpio_wp = -EINVAL, | |
5e763d29 | 220 | .power_saving = true, |
ffe7f95b LL |
221 | }, |
222 | { | |
223 | .name = "internal", | |
224 | .mmc = 2, | |
225 | .wires = 8, | |
226 | .gpio_cd = -EINVAL, | |
227 | .gpio_wp = -EINVAL, | |
5e763d29 AH |
228 | .nonremovable = true, |
229 | .power_saving = true, | |
ffe7f95b LL |
230 | }, |
231 | {} /* Terminator */ | |
232 | }; | |
233 | ||
234 | static struct regulator_consumer_supply rx51_vmmc1_supply = { | |
235 | .supply = "vmmc", | |
236 | }; | |
237 | ||
238 | static struct regulator_consumer_supply rx51_vmmc2_supply = { | |
239 | .supply = "vmmc", | |
240 | }; | |
241 | ||
242 | static struct regulator_consumer_supply rx51_vsim_supply = { | |
243 | .supply = "vmmc_aux", | |
244 | }; | |
245 | ||
246 | static struct regulator_init_data rx51_vaux1 = { | |
247 | .constraints = { | |
248 | .name = "V28", | |
249 | .min_uV = 2800000, | |
250 | .max_uV = 2800000, | |
251 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
252 | | REGULATOR_MODE_STANDBY, | |
253 | .valid_ops_mask = REGULATOR_CHANGE_MODE | |
254 | | REGULATOR_CHANGE_STATUS, | |
255 | }, | |
256 | }; | |
257 | ||
258 | static struct regulator_init_data rx51_vaux2 = { | |
259 | .constraints = { | |
260 | .name = "VCSI", | |
261 | .min_uV = 1800000, | |
262 | .max_uV = 1800000, | |
263 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
264 | | REGULATOR_MODE_STANDBY, | |
265 | .valid_ops_mask = REGULATOR_CHANGE_MODE | |
266 | | REGULATOR_CHANGE_STATUS, | |
267 | }, | |
268 | }; | |
269 | ||
270 | /* VAUX3 - adds more power to VIO_18 rail */ | |
f52eeee8 | 271 | static struct regulator_init_data rx51_vaux3_cam = { |
ffe7f95b LL |
272 | .constraints = { |
273 | .name = "VCAM_DIG_18", | |
274 | .min_uV = 1800000, | |
275 | .max_uV = 1800000, | |
276 | .apply_uV = true, | |
277 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
278 | | REGULATOR_MODE_STANDBY, | |
279 | .valid_ops_mask = REGULATOR_CHANGE_MODE | |
280 | | REGULATOR_CHANGE_STATUS, | |
281 | }, | |
282 | }; | |
283 | ||
f52eeee8 AH |
284 | static struct regulator_init_data rx51_vaux3_mmc = { |
285 | .constraints = { | |
286 | .name = "VMMC2_30", | |
287 | .min_uV = 2800000, | |
288 | .max_uV = 3000000, | |
289 | .apply_uV = true, | |
290 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
291 | | REGULATOR_MODE_STANDBY, | |
292 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | |
293 | | REGULATOR_CHANGE_MODE | |
294 | | REGULATOR_CHANGE_STATUS, | |
295 | }, | |
296 | .num_consumer_supplies = 1, | |
297 | .consumer_supplies = &rx51_vmmc2_supply, | |
298 | }; | |
299 | ||
ffe7f95b LL |
300 | static struct regulator_init_data rx51_vaux4 = { |
301 | .constraints = { | |
302 | .name = "VCAM_ANA_28", | |
303 | .min_uV = 2800000, | |
304 | .max_uV = 2800000, | |
305 | .apply_uV = true, | |
306 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
307 | | REGULATOR_MODE_STANDBY, | |
308 | .valid_ops_mask = REGULATOR_CHANGE_MODE | |
309 | | REGULATOR_CHANGE_STATUS, | |
310 | }, | |
311 | }; | |
312 | ||
313 | static struct regulator_init_data rx51_vmmc1 = { | |
314 | .constraints = { | |
315 | .min_uV = 1850000, | |
316 | .max_uV = 3150000, | |
317 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
318 | | REGULATOR_MODE_STANDBY, | |
319 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | |
320 | | REGULATOR_CHANGE_MODE | |
321 | | REGULATOR_CHANGE_STATUS, | |
322 | }, | |
323 | .num_consumer_supplies = 1, | |
324 | .consumer_supplies = &rx51_vmmc1_supply, | |
325 | }; | |
326 | ||
327 | static struct regulator_init_data rx51_vmmc2 = { | |
328 | .constraints = { | |
329 | .name = "VMMC2_30", | |
330 | .min_uV = 1850000, | |
331 | .max_uV = 3150000, | |
332 | .apply_uV = true, | |
333 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
334 | | REGULATOR_MODE_STANDBY, | |
335 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | |
336 | | REGULATOR_CHANGE_MODE | |
337 | | REGULATOR_CHANGE_STATUS, | |
338 | }, | |
339 | .num_consumer_supplies = 1, | |
340 | .consumer_supplies = &rx51_vmmc2_supply, | |
341 | }; | |
342 | ||
343 | static struct regulator_init_data rx51_vsim = { | |
344 | .constraints = { | |
345 | .name = "VMMC2_IO_18", | |
346 | .min_uV = 1800000, | |
347 | .max_uV = 1800000, | |
348 | .apply_uV = true, | |
349 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
350 | | REGULATOR_MODE_STANDBY, | |
351 | .valid_ops_mask = REGULATOR_CHANGE_MODE | |
352 | | REGULATOR_CHANGE_STATUS, | |
353 | }, | |
354 | .num_consumer_supplies = 1, | |
355 | .consumer_supplies = &rx51_vsim_supply, | |
356 | }; | |
357 | ||
358 | static struct regulator_init_data rx51_vdac = { | |
359 | .constraints = { | |
360 | .min_uV = 1800000, | |
361 | .max_uV = 1800000, | |
362 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
363 | | REGULATOR_MODE_STANDBY, | |
364 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | |
365 | | REGULATOR_CHANGE_MODE | |
366 | | REGULATOR_CHANGE_STATUS, | |
367 | }, | |
368 | }; | |
369 | ||
370 | static int rx51_twlgpio_setup(struct device *dev, unsigned gpio, unsigned n) | |
371 | { | |
372 | /* FIXME this gpio setup is just a placeholder for now */ | |
373 | gpio_request(gpio + 6, "backlight_pwm"); | |
374 | gpio_direction_output(gpio + 6, 0); | |
375 | gpio_request(gpio + 7, "speaker_en"); | |
376 | gpio_direction_output(gpio + 7, 1); | |
377 | ||
378 | /* set up MMC adapters, linking their regulators to them */ | |
379 | twl4030_mmc_init(mmc); | |
380 | rx51_vmmc1_supply.dev = mmc[0].dev; | |
381 | rx51_vmmc2_supply.dev = mmc[1].dev; | |
382 | rx51_vsim_supply.dev = mmc[1].dev; | |
383 | ||
384 | return 0; | |
385 | } | |
386 | ||
387 | static struct twl4030_gpio_platform_data rx51_gpio_data = { | |
388 | .gpio_base = OMAP_MAX_GPIO_LINES, | |
389 | .irq_base = TWL4030_GPIO_IRQ_BASE, | |
390 | .irq_end = TWL4030_GPIO_IRQ_END, | |
391 | .pulldowns = BIT(0) | BIT(1) | BIT(2) | BIT(3) | |
392 | | BIT(4) | BIT(5) | |
393 | | BIT(8) | BIT(9) | BIT(10) | BIT(11) | |
394 | | BIT(12) | BIT(13) | BIT(14) | BIT(15) | |
395 | | BIT(16) | BIT(17) , | |
396 | .setup = rx51_twlgpio_setup, | |
397 | }; | |
398 | ||
dfc27b34 RQ |
399 | static struct twl4030_usb_data rx51_usb_data = { |
400 | .usb_mode = T2_USB_MODE_ULPI, | |
401 | }; | |
402 | ||
9312fffb AK |
403 | static struct twl4030_ins sleep_on_seq[] __initdata = { |
404 | /* | |
3c684e84 | 405 | * Turn off everything |
9312fffb | 406 | */ |
3c684e84 | 407 | {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 1, 0, RES_STATE_SLEEP), 2}, |
9312fffb AK |
408 | }; |
409 | ||
410 | static struct twl4030_script sleep_on_script __initdata = { | |
411 | .script = sleep_on_seq, | |
412 | .size = ARRAY_SIZE(sleep_on_seq), | |
413 | .flags = TWL4030_SLEEP_SCRIPT, | |
414 | }; | |
415 | ||
416 | static struct twl4030_ins wakeup_seq[] __initdata = { | |
417 | /* | |
3c684e84 | 418 | * Reenable everything |
9312fffb | 419 | */ |
3c684e84 | 420 | {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 1, 0, RES_STATE_ACTIVE), 2}, |
9312fffb AK |
421 | }; |
422 | ||
423 | static struct twl4030_script wakeup_script __initdata = { | |
424 | .script = wakeup_seq, | |
425 | .size = ARRAY_SIZE(wakeup_seq), | |
426 | .flags = TWL4030_WAKEUP12_SCRIPT, | |
427 | }; | |
428 | ||
429 | static struct twl4030_ins wakeup_p3_seq[] __initdata = { | |
430 | /* | |
3c684e84 | 431 | * Reenable everything |
9312fffb | 432 | */ |
3c684e84 | 433 | {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 1, 0, RES_STATE_ACTIVE), 2}, |
9312fffb AK |
434 | }; |
435 | ||
436 | static struct twl4030_script wakeup_p3_script __initdata = { | |
437 | .script = wakeup_p3_seq, | |
438 | .size = ARRAY_SIZE(wakeup_p3_seq), | |
439 | .flags = TWL4030_WAKEUP3_SCRIPT, | |
440 | }; | |
441 | ||
442 | static struct twl4030_ins wrst_seq[] __initdata = { | |
443 | /* | |
444 | * Reset twl4030. | |
445 | * Reset VDD1 regulator. | |
446 | * Reset VDD2 regulator. | |
447 | * Reset VPLL1 regulator. | |
448 | * Enable sysclk output. | |
449 | * Reenable twl4030. | |
450 | */ | |
451 | {MSG_SINGULAR(DEV_GRP_NULL, RES_RESET, RES_STATE_OFF), 2}, | |
452 | {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 0, 1, RES_STATE_ACTIVE), | |
453 | 0x13}, | |
9312fffb AK |
454 | {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_PP, 0, 3, RES_STATE_OFF), 0x13}, |
455 | {MSG_SINGULAR(DEV_GRP_NULL, RES_VDD1, RES_STATE_WRST), 0x13}, | |
456 | {MSG_SINGULAR(DEV_GRP_NULL, RES_VDD2, RES_STATE_WRST), 0x13}, | |
457 | {MSG_SINGULAR(DEV_GRP_NULL, RES_VPLL1, RES_STATE_WRST), 0x35}, | |
3c684e84 | 458 | {MSG_SINGULAR(DEV_GRP_P3, RES_HFCLKOUT, RES_STATE_ACTIVE), 2}, |
9312fffb AK |
459 | {MSG_SINGULAR(DEV_GRP_NULL, RES_RESET, RES_STATE_ACTIVE), 2}, |
460 | }; | |
461 | ||
462 | static struct twl4030_script wrst_script __initdata = { | |
463 | .script = wrst_seq, | |
464 | .size = ARRAY_SIZE(wrst_seq), | |
465 | .flags = TWL4030_WRST_SCRIPT, | |
466 | }; | |
467 | ||
468 | static struct twl4030_script *twl4030_scripts[] __initdata = { | |
469 | /* wakeup12 script should be loaded before sleep script, otherwise a | |
470 | board might hit retention before loading of wakeup script is | |
471 | completed. This can cause boot failures depending on timing issues. | |
472 | */ | |
473 | &wakeup_script, | |
474 | &sleep_on_script, | |
475 | &wakeup_p3_script, | |
476 | &wrst_script, | |
477 | }; | |
478 | ||
479 | static struct twl4030_resconfig twl4030_rconfig[] __initdata = { | |
3c684e84 AK |
480 | { .resource = RES_VDD1, .devgroup = -1, |
481 | .type = 1, .type2 = -1, .remap_off = RES_STATE_OFF, | |
482 | .remap_sleep = RES_STATE_OFF | |
483 | }, | |
484 | { .resource = RES_VDD2, .devgroup = -1, | |
485 | .type = 1, .type2 = -1, .remap_off = RES_STATE_OFF, | |
486 | .remap_sleep = RES_STATE_OFF | |
487 | }, | |
488 | { .resource = RES_VPLL1, .devgroup = -1, | |
489 | .type = 1, .type2 = -1, .remap_off = RES_STATE_OFF, | |
490 | .remap_sleep = RES_STATE_OFF | |
491 | }, | |
492 | { .resource = RES_VPLL2, .devgroup = -1, | |
493 | .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1 | |
494 | }, | |
495 | { .resource = RES_VAUX1, .devgroup = -1, | |
496 | .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1 | |
497 | }, | |
498 | { .resource = RES_VAUX2, .devgroup = -1, | |
499 | .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1 | |
500 | }, | |
501 | { .resource = RES_VAUX3, .devgroup = -1, | |
502 | .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1 | |
503 | }, | |
504 | { .resource = RES_VAUX4, .devgroup = -1, | |
505 | .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1 | |
506 | }, | |
507 | { .resource = RES_VMMC1, .devgroup = -1, | |
508 | .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1 | |
509 | }, | |
510 | { .resource = RES_VMMC2, .devgroup = -1, | |
511 | .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1 | |
512 | }, | |
513 | { .resource = RES_VDAC, .devgroup = -1, | |
514 | .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1 | |
515 | }, | |
516 | { .resource = RES_VSIM, .devgroup = -1, | |
517 | .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1 | |
518 | }, | |
519 | { .resource = RES_VINTANA1, .devgroup = DEV_GRP_P1 | DEV_GRP_P3, | |
520 | .type = -1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
521 | }, | |
522 | { .resource = RES_VINTANA2, .devgroup = DEV_GRP_P1 | DEV_GRP_P3, | |
523 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
524 | }, | |
525 | { .resource = RES_VINTDIG, .devgroup = DEV_GRP_P1 | DEV_GRP_P3, | |
526 | .type = -1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
527 | }, | |
528 | { .resource = RES_VIO, .devgroup = DEV_GRP_P3, | |
529 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
530 | }, | |
531 | { .resource = RES_CLKEN, .devgroup = DEV_GRP_P1 | DEV_GRP_P3, | |
532 | .type = 1, .type2 = -1 , .remap_off = -1, .remap_sleep = -1 | |
533 | }, | |
534 | { .resource = RES_REGEN, .devgroup = DEV_GRP_P1 | DEV_GRP_P3, | |
535 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
536 | }, | |
537 | { .resource = RES_NRES_PWRON, .devgroup = DEV_GRP_P1 | DEV_GRP_P3, | |
538 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
539 | }, | |
540 | { .resource = RES_SYSEN, .devgroup = DEV_GRP_P1 | DEV_GRP_P3, | |
541 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
542 | }, | |
543 | { .resource = RES_HFCLKOUT, .devgroup = DEV_GRP_P3, | |
544 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
545 | }, | |
546 | { .resource = RES_32KCLKOUT, .devgroup = -1, | |
547 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
548 | }, | |
549 | { .resource = RES_RESET, .devgroup = -1, | |
550 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
551 | }, | |
552 | { .resource = RES_Main_Ref, .devgroup = -1, | |
553 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
554 | }, | |
9312fffb AK |
555 | { 0, 0}, |
556 | }; | |
557 | ||
558 | static struct twl4030_power_data rx51_t2scripts_data __initdata = { | |
559 | .scripts = twl4030_scripts, | |
560 | .num = ARRAY_SIZE(twl4030_scripts), | |
561 | .resource_config = twl4030_rconfig, | |
562 | }; | |
563 | ||
564 | ||
565 | ||
566 | static struct twl4030_platform_data rx51_twldata __initdata = { | |
ffe7f95b LL |
567 | .irq_base = TWL4030_IRQ_BASE, |
568 | .irq_end = TWL4030_IRQ_END, | |
569 | ||
570 | /* platform_data for children goes here */ | |
571 | .gpio = &rx51_gpio_data, | |
572 | .keypad = &rx51_kp_data, | |
573 | .madc = &rx51_madc_data, | |
dfc27b34 | 574 | .usb = &rx51_usb_data, |
9312fffb | 575 | .power = &rx51_t2scripts_data, |
ffe7f95b LL |
576 | |
577 | .vaux1 = &rx51_vaux1, | |
578 | .vaux2 = &rx51_vaux2, | |
ffe7f95b LL |
579 | .vaux4 = &rx51_vaux4, |
580 | .vmmc1 = &rx51_vmmc1, | |
ffe7f95b LL |
581 | .vsim = &rx51_vsim, |
582 | .vdac = &rx51_vdac, | |
583 | }; | |
584 | ||
585 | static struct i2c_board_info __initdata rx51_peripherals_i2c_board_info_1[] = { | |
586 | { | |
587 | I2C_BOARD_INFO("twl5030", 0x48), | |
588 | .flags = I2C_CLIENT_WAKE, | |
589 | .irq = INT_34XX_SYS_NIRQ, | |
590 | .platform_data = &rx51_twldata, | |
591 | }, | |
592 | }; | |
593 | ||
594 | static int __init rx51_i2c_init(void) | |
595 | { | |
f52eeee8 AH |
596 | if ((system_rev >= SYSTEM_REV_S_USES_VAUX3 && system_rev < 0x100) || |
597 | system_rev >= SYSTEM_REV_B_USES_VAUX3) | |
598 | rx51_twldata.vaux3 = &rx51_vaux3_mmc; | |
599 | else { | |
600 | rx51_twldata.vaux3 = &rx51_vaux3_cam; | |
601 | rx51_twldata.vmmc2 = &rx51_vmmc2; | |
602 | } | |
cb3cc45a | 603 | omap_register_i2c_bus(1, 2200, rx51_peripherals_i2c_board_info_1, |
ffe7f95b LL |
604 | ARRAY_SIZE(rx51_peripherals_i2c_board_info_1)); |
605 | omap_register_i2c_bus(2, 100, NULL, 0); | |
606 | omap_register_i2c_bus(3, 400, NULL, 0); | |
607 | return 0; | |
608 | } | |
609 | ||
aa62e90f JY |
610 | #if defined(CONFIG_MTD_ONENAND_OMAP2) || \ |
611 | defined(CONFIG_MTD_ONENAND_OMAP2_MODULE) | |
612 | ||
613 | static struct mtd_partition onenand_partitions[] = { | |
614 | { | |
615 | .name = "bootloader", | |
616 | .offset = 0, | |
617 | .size = 0x20000, | |
618 | .mask_flags = MTD_WRITEABLE, /* Force read-only */ | |
619 | }, | |
620 | { | |
621 | .name = "config", | |
622 | .offset = MTDPART_OFS_APPEND, | |
623 | .size = 0x60000, | |
624 | }, | |
625 | { | |
626 | .name = "log", | |
627 | .offset = MTDPART_OFS_APPEND, | |
628 | .size = 0x40000, | |
629 | }, | |
630 | { | |
631 | .name = "kernel", | |
632 | .offset = MTDPART_OFS_APPEND, | |
633 | .size = 0x200000, | |
634 | }, | |
635 | { | |
636 | .name = "initfs", | |
637 | .offset = MTDPART_OFS_APPEND, | |
638 | .size = 0x200000, | |
639 | }, | |
640 | { | |
641 | .name = "rootfs", | |
642 | .offset = MTDPART_OFS_APPEND, | |
643 | .size = MTDPART_SIZ_FULL, | |
644 | }, | |
645 | }; | |
646 | ||
647 | static struct omap_onenand_platform_data board_onenand_data = { | |
648 | .cs = 0, | |
649 | .gpio_irq = 65, | |
650 | .parts = onenand_partitions, | |
651 | .nr_parts = ARRAY_SIZE(onenand_partitions), | |
c8e6488f | 652 | .flags = ONENAND_SYNC_READWRITE, |
aa62e90f JY |
653 | }; |
654 | ||
655 | static void __init board_onenand_init(void) | |
656 | { | |
657 | gpmc_onenand_init(&board_onenand_data); | |
658 | } | |
659 | ||
660 | #else | |
661 | ||
662 | static inline void board_onenand_init(void) | |
663 | { | |
664 | } | |
665 | ||
666 | #endif | |
ffe7f95b | 667 | |
1a48e157 TL |
668 | #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) |
669 | ||
670 | static struct omap_smc91x_platform_data board_smc91x_data = { | |
671 | .cs = 1, | |
672 | .gpio_irq = 54, | |
673 | .gpio_pwrdwn = 86, | |
674 | .gpio_reset = 164, | |
675 | .flags = GPMC_TIMINGS_SMC91C96 | IORESOURCE_IRQ_HIGHLEVEL, | |
676 | }; | |
677 | ||
678 | static void __init board_smc91x_init(void) | |
679 | { | |
4896e394 TL |
680 | omap_mux_init_gpio(54, OMAP_PIN_INPUT_PULLDOWN); |
681 | omap_mux_init_gpio(86, OMAP_PIN_OUTPUT); | |
682 | omap_mux_init_gpio(164, OMAP_PIN_OUTPUT); | |
1a48e157 TL |
683 | |
684 | gpmc_smc91x_init(&board_smc91x_data); | |
685 | } | |
686 | ||
687 | #else | |
688 | ||
689 | static inline void board_smc91x_init(void) | |
690 | { | |
691 | } | |
692 | ||
693 | #endif | |
694 | ||
a24e61a9 KV |
695 | static void rx51_wl1251_set_power(bool enable) |
696 | { | |
697 | gpio_set_value(RX51_WL1251_POWER_GPIO, enable); | |
698 | } | |
699 | ||
700 | static void __init rx51_init_wl1251(void) | |
701 | { | |
702 | int irq, ret; | |
703 | ||
704 | ret = gpio_request(RX51_WL1251_POWER_GPIO, "wl1251 power"); | |
705 | if (ret < 0) | |
706 | goto error; | |
707 | ||
708 | ret = gpio_direction_output(RX51_WL1251_POWER_GPIO, 0); | |
709 | if (ret < 0) | |
710 | goto err_power; | |
711 | ||
712 | ret = gpio_request(RX51_WL1251_IRQ_GPIO, "wl1251 irq"); | |
713 | if (ret < 0) | |
714 | goto err_power; | |
715 | ||
716 | ret = gpio_direction_input(RX51_WL1251_IRQ_GPIO); | |
717 | if (ret < 0) | |
718 | goto err_irq; | |
719 | ||
720 | irq = gpio_to_irq(RX51_WL1251_IRQ_GPIO); | |
721 | if (irq < 0) | |
722 | goto err_irq; | |
723 | ||
724 | wl1251_pdata.set_power = rx51_wl1251_set_power; | |
725 | rx51_peripherals_spi_board_info[RX51_SPI_WL1251].irq = irq; | |
726 | ||
727 | return; | |
728 | ||
729 | err_irq: | |
730 | gpio_free(RX51_WL1251_IRQ_GPIO); | |
731 | ||
732 | err_power: | |
733 | gpio_free(RX51_WL1251_POWER_GPIO); | |
734 | ||
735 | error: | |
736 | printk(KERN_ERR "wl1251 board initialisation failed\n"); | |
737 | wl1251_pdata.set_power = NULL; | |
738 | ||
739 | /* | |
740 | * Now rx51_peripherals_spi_board_info[1].irq is zero and | |
741 | * set_power is null, and wl1251_probe() will fail. | |
742 | */ | |
743 | } | |
744 | ||
ffe7f95b LL |
745 | void __init rx51_peripherals_init(void) |
746 | { | |
ffe7f95b | 747 | rx51_i2c_init(); |
aa62e90f | 748 | board_onenand_init(); |
1a48e157 | 749 | board_smc91x_init(); |
f014ee32 | 750 | rx51_add_gpio_keys(); |
a24e61a9 KV |
751 | rx51_init_wl1251(); |
752 | spi_register_board_info(rx51_peripherals_spi_board_info, | |
753 | ARRAY_SIZE(rx51_peripherals_spi_board_info)); | |
ffe7f95b LL |
754 | } |
755 |