Commit | Line | Data |
---|---|---|
ffe7f95b | 1 | /* |
9312fffb | 2 | * linux/arch/arm/mach-omap2/board-rx51-peripherals.c |
ffe7f95b LL |
3 | * |
4 | * Copyright (C) 2008-2009 Nokia | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 as | |
8 | * published by the Free Software Foundation. | |
9 | */ | |
10 | ||
11 | #include <linux/kernel.h> | |
12 | #include <linux/init.h> | |
13 | #include <linux/platform_device.h> | |
14 | #include <linux/input.h> | |
6135434a | 15 | #include <linux/input/matrix_keypad.h> |
ffe7f95b | 16 | #include <linux/spi/spi.h> |
c1f9a095 | 17 | #include <linux/wl12xx.h> |
ffe7f95b | 18 | #include <linux/i2c.h> |
ebeb53e1 | 19 | #include <linux/i2c/twl.h> |
ffe7f95b LL |
20 | #include <linux/clk.h> |
21 | #include <linux/delay.h> | |
22 | #include <linux/regulator/machine.h> | |
23 | #include <linux/gpio.h> | |
f014ee32 | 24 | #include <linux/gpio_keys.h> |
5e763d29 | 25 | #include <linux/mmc/host.h> |
ffe7f95b | 26 | |
ce491cf8 | 27 | #include <plat/mcspi.h> |
ce491cf8 TL |
28 | #include <plat/board.h> |
29 | #include <plat/common.h> | |
30 | #include <plat/dma.h> | |
31 | #include <plat/gpmc.h> | |
ce491cf8 TL |
32 | #include <plat/onenand.h> |
33 | #include <plat/gpmc-smc91x.h> | |
ffe7f95b | 34 | |
04aeae77 MK |
35 | #include <mach/board-rx51.h> |
36 | ||
87581fd4 | 37 | #include <sound/tlv320aic3x.h> |
64d06691 | 38 | #include <sound/tpa6130a2-plat.h> |
589541c0 JN |
39 | #include <media/radio-si4713.h> |
40 | #include <media/si4713.h> | |
87581fd4 | 41 | |
70b5d737 MN |
42 | #include <../drivers/staging/iio/light/tsl2563.h> |
43 | ||
4896e394 | 44 | #include "mux.h" |
d02a900b | 45 | #include "hsmmc.h" |
ffe7f95b | 46 | |
f52eeee8 AH |
47 | #define SYSTEM_REV_B_USES_VAUX3 0x1699 |
48 | #define SYSTEM_REV_S_USES_VAUX3 0x8 | |
49 | ||
a24e61a9 KV |
50 | #define RX51_WL1251_POWER_GPIO 87 |
51 | #define RX51_WL1251_IRQ_GPIO 42 | |
589541c0 JN |
52 | #define RX51_FMTX_RESET_GPIO 163 |
53 | #define RX51_FMTX_IRQ 53 | |
a24e61a9 KV |
54 | |
55 | /* list all spi devices here */ | |
56 | enum { | |
57 | RX51_SPI_WL1251, | |
03e11104 | 58 | RX51_SPI_MIPID, /* LCD panel */ |
6996e7ff | 59 | RX51_SPI_TSC2005, /* Touch Controller */ |
a24e61a9 KV |
60 | }; |
61 | ||
62 | static struct wl12xx_platform_data wl1251_pdata; | |
63 | ||
70b5d737 MN |
64 | #if defined(CONFIG_SENSORS_TSL2563) || defined(CONFIG_SENSORS_TSL2563_MODULE) |
65 | static struct tsl2563_platform_data rx51_tsl2563_platform_data = { | |
66 | .cover_comp_gain = 16, | |
67 | }; | |
68 | #endif | |
69 | ||
a24e61a9 KV |
70 | static struct omap2_mcspi_device_config wl1251_mcspi_config = { |
71 | .turbo_mode = 0, | |
72 | .single_channel = 1, | |
73 | }; | |
74 | ||
03e11104 RQ |
75 | static struct omap2_mcspi_device_config mipid_mcspi_config = { |
76 | .turbo_mode = 0, | |
77 | .single_channel = 1, | |
78 | }; | |
79 | ||
6996e7ff RQ |
80 | static struct omap2_mcspi_device_config tsc2005_mcspi_config = { |
81 | .turbo_mode = 0, | |
82 | .single_channel = 1, | |
83 | }; | |
84 | ||
a24e61a9 KV |
85 | static struct spi_board_info rx51_peripherals_spi_board_info[] __initdata = { |
86 | [RX51_SPI_WL1251] = { | |
87 | .modalias = "wl1251", | |
88 | .bus_num = 4, | |
89 | .chip_select = 0, | |
90 | .max_speed_hz = 48000000, | |
860fc976 | 91 | .mode = SPI_MODE_3, |
a24e61a9 KV |
92 | .controller_data = &wl1251_mcspi_config, |
93 | .platform_data = &wl1251_pdata, | |
94 | }, | |
03e11104 RQ |
95 | [RX51_SPI_MIPID] = { |
96 | .modalias = "acx565akm", | |
97 | .bus_num = 1, | |
98 | .chip_select = 2, | |
99 | .max_speed_hz = 6000000, | |
100 | .controller_data = &mipid_mcspi_config, | |
101 | }, | |
6996e7ff RQ |
102 | [RX51_SPI_TSC2005] = { |
103 | .modalias = "tsc2005", | |
104 | .bus_num = 1, | |
105 | .chip_select = 0, | |
106 | /* .irq = OMAP_GPIO_IRQ(RX51_TSC2005_IRQ_GPIO),*/ | |
107 | .max_speed_hz = 6000000, | |
108 | .controller_data = &tsc2005_mcspi_config, | |
109 | /* .platform_data = &tsc2005_config,*/ | |
110 | }, | |
a24e61a9 KV |
111 | }; |
112 | ||
fd0964c5 HK |
113 | static struct platform_device rx51_charger_device = { |
114 | .name = "isp1704_charger", | |
115 | }; | |
116 | ||
f014ee32 JN |
117 | #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) |
118 | ||
119 | #define RX51_GPIO_CAMERA_LENS_COVER 110 | |
120 | #define RX51_GPIO_CAMERA_FOCUS 68 | |
121 | #define RX51_GPIO_CAMERA_CAPTURE 69 | |
122 | #define RX51_GPIO_KEYPAD_SLIDE 71 | |
123 | #define RX51_GPIO_LOCK_BUTTON 113 | |
124 | #define RX51_GPIO_PROXIMITY 89 | |
125 | ||
126 | #define RX51_GPIO_DEBOUNCE_TIMEOUT 10 | |
127 | ||
128 | static struct gpio_keys_button rx51_gpio_keys[] = { | |
129 | { | |
130 | .desc = "Camera Lens Cover", | |
131 | .type = EV_SW, | |
132 | .code = SW_CAMERA_LENS_COVER, | |
133 | .gpio = RX51_GPIO_CAMERA_LENS_COVER, | |
134 | .active_low = 1, | |
135 | .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT, | |
136 | }, { | |
137 | .desc = "Camera Focus", | |
138 | .type = EV_KEY, | |
139 | .code = KEY_CAMERA_FOCUS, | |
140 | .gpio = RX51_GPIO_CAMERA_FOCUS, | |
141 | .active_low = 1, | |
142 | .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT, | |
143 | }, { | |
144 | .desc = "Camera Capture", | |
145 | .type = EV_KEY, | |
146 | .code = KEY_CAMERA, | |
147 | .gpio = RX51_GPIO_CAMERA_CAPTURE, | |
148 | .active_low = 1, | |
149 | .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT, | |
150 | }, { | |
151 | .desc = "Lock Button", | |
152 | .type = EV_KEY, | |
153 | .code = KEY_SCREENLOCK, | |
154 | .gpio = RX51_GPIO_LOCK_BUTTON, | |
155 | .active_low = 1, | |
156 | .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT, | |
157 | }, { | |
158 | .desc = "Keypad Slide", | |
159 | .type = EV_SW, | |
160 | .code = SW_KEYPAD_SLIDE, | |
161 | .gpio = RX51_GPIO_KEYPAD_SLIDE, | |
162 | .active_low = 1, | |
163 | .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT, | |
164 | }, { | |
165 | .desc = "Proximity Sensor", | |
166 | .type = EV_SW, | |
167 | .code = SW_FRONT_PROXIMITY, | |
168 | .gpio = RX51_GPIO_PROXIMITY, | |
169 | .active_low = 0, | |
170 | .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT, | |
171 | } | |
172 | }; | |
173 | ||
174 | static struct gpio_keys_platform_data rx51_gpio_keys_data = { | |
175 | .buttons = rx51_gpio_keys, | |
176 | .nbuttons = ARRAY_SIZE(rx51_gpio_keys), | |
177 | }; | |
178 | ||
179 | static struct platform_device rx51_gpio_keys_device = { | |
180 | .name = "gpio-keys", | |
181 | .id = -1, | |
182 | .dev = { | |
183 | .platform_data = &rx51_gpio_keys_data, | |
184 | }, | |
185 | }; | |
186 | ||
187 | static void __init rx51_add_gpio_keys(void) | |
188 | { | |
189 | platform_device_register(&rx51_gpio_keys_device); | |
190 | } | |
191 | #else | |
192 | static void __init rx51_add_gpio_keys(void) | |
193 | { | |
194 | } | |
195 | #endif /* CONFIG_KEYBOARD_GPIO || CONFIG_KEYBOARD_GPIO_MODULE */ | |
196 | ||
bead4375 | 197 | static uint32_t board_keymap[] = { |
3fea6026 DT |
198 | /* |
199 | * Note that KEY(x, 8, KEY_XXX) entries represent "entrire row | |
200 | * connected to the ground" matrix state. | |
201 | */ | |
ffe7f95b | 202 | KEY(0, 0, KEY_Q), |
acf442dc AK |
203 | KEY(0, 1, KEY_O), |
204 | KEY(0, 2, KEY_P), | |
205 | KEY(0, 3, KEY_COMMA), | |
206 | KEY(0, 4, KEY_BACKSPACE), | |
207 | KEY(0, 6, KEY_A), | |
208 | KEY(0, 7, KEY_S), | |
3fea6026 | 209 | |
acf442dc | 210 | KEY(1, 0, KEY_W), |
ffe7f95b | 211 | KEY(1, 1, KEY_D), |
acf442dc AK |
212 | KEY(1, 2, KEY_F), |
213 | KEY(1, 3, KEY_G), | |
214 | KEY(1, 4, KEY_H), | |
215 | KEY(1, 5, KEY_J), | |
216 | KEY(1, 6, KEY_K), | |
217 | KEY(1, 7, KEY_L), | |
3fea6026 | 218 | |
acf442dc AK |
219 | KEY(2, 0, KEY_E), |
220 | KEY(2, 1, KEY_DOT), | |
ffe7f95b | 221 | KEY(2, 2, KEY_UP), |
acf442dc AK |
222 | KEY(2, 3, KEY_ENTER), |
223 | KEY(2, 5, KEY_Z), | |
224 | KEY(2, 6, KEY_X), | |
225 | KEY(2, 7, KEY_C), | |
3fea6026 DT |
226 | KEY(2, 8, KEY_F9), |
227 | ||
acf442dc AK |
228 | KEY(3, 0, KEY_R), |
229 | KEY(3, 1, KEY_V), | |
230 | KEY(3, 2, KEY_B), | |
ffe7f95b | 231 | KEY(3, 3, KEY_N), |
acf442dc AK |
232 | KEY(3, 4, KEY_M), |
233 | KEY(3, 5, KEY_SPACE), | |
234 | KEY(3, 6, KEY_SPACE), | |
235 | KEY(3, 7, KEY_LEFT), | |
3fea6026 | 236 | |
acf442dc AK |
237 | KEY(4, 0, KEY_T), |
238 | KEY(4, 1, KEY_DOWN), | |
239 | KEY(4, 2, KEY_RIGHT), | |
ffe7f95b | 240 | KEY(4, 4, KEY_LEFTCTRL), |
acf442dc AK |
241 | KEY(4, 5, KEY_RIGHTALT), |
242 | KEY(4, 6, KEY_LEFTSHIFT), | |
2e65a207 | 243 | KEY(4, 8, KEY_F10), |
3fea6026 | 244 | |
acf442dc | 245 | KEY(5, 0, KEY_Y), |
2e65a207 | 246 | KEY(5, 8, KEY_F11), |
3fea6026 | 247 | |
acf442dc | 248 | KEY(6, 0, KEY_U), |
3fea6026 | 249 | |
acf442dc AK |
250 | KEY(7, 0, KEY_I), |
251 | KEY(7, 1, KEY_F7), | |
252 | KEY(7, 2, KEY_F8), | |
ffe7f95b LL |
253 | }; |
254 | ||
4f543332 TL |
255 | static struct matrix_keymap_data board_map_data = { |
256 | .keymap = board_keymap, | |
257 | .keymap_size = ARRAY_SIZE(board_keymap), | |
258 | }; | |
259 | ||
ffe7f95b | 260 | static struct twl4030_keypad_data rx51_kp_data = { |
4f543332 | 261 | .keymap_data = &board_map_data, |
ffe7f95b LL |
262 | .rows = 8, |
263 | .cols = 8, | |
ffe7f95b LL |
264 | .rep = 1, |
265 | }; | |
266 | ||
ffe7f95b LL |
267 | static struct twl4030_madc_platform_data rx51_madc_data = { |
268 | .irq_line = 1, | |
269 | }; | |
270 | ||
ce6f0016 AH |
271 | /* Enable input logic and pull all lines up when eMMC is on. */ |
272 | static struct omap_board_mux rx51_mmc2_on_mux[] = { | |
273 | OMAP3_MUX(SDMMC2_CMD, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0), | |
274 | OMAP3_MUX(SDMMC2_DAT0, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0), | |
275 | OMAP3_MUX(SDMMC2_DAT1, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0), | |
276 | OMAP3_MUX(SDMMC2_DAT2, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0), | |
277 | OMAP3_MUX(SDMMC2_DAT3, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0), | |
278 | OMAP3_MUX(SDMMC2_DAT4, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0), | |
279 | OMAP3_MUX(SDMMC2_DAT5, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0), | |
280 | OMAP3_MUX(SDMMC2_DAT6, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0), | |
281 | OMAP3_MUX(SDMMC2_DAT7, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0), | |
282 | { .reg_offset = OMAP_MUX_TERMINATOR }, | |
283 | }; | |
284 | ||
285 | /* Disable input logic and pull all lines down when eMMC is off. */ | |
286 | static struct omap_board_mux rx51_mmc2_off_mux[] = { | |
287 | OMAP3_MUX(SDMMC2_CMD, OMAP_PULL_ENA | OMAP_MUX_MODE0), | |
288 | OMAP3_MUX(SDMMC2_DAT0, OMAP_PULL_ENA | OMAP_MUX_MODE0), | |
289 | OMAP3_MUX(SDMMC2_DAT1, OMAP_PULL_ENA | OMAP_MUX_MODE0), | |
290 | OMAP3_MUX(SDMMC2_DAT2, OMAP_PULL_ENA | OMAP_MUX_MODE0), | |
291 | OMAP3_MUX(SDMMC2_DAT3, OMAP_PULL_ENA | OMAP_MUX_MODE0), | |
292 | OMAP3_MUX(SDMMC2_DAT4, OMAP_PULL_ENA | OMAP_MUX_MODE0), | |
293 | OMAP3_MUX(SDMMC2_DAT5, OMAP_PULL_ENA | OMAP_MUX_MODE0), | |
294 | OMAP3_MUX(SDMMC2_DAT6, OMAP_PULL_ENA | OMAP_MUX_MODE0), | |
295 | OMAP3_MUX(SDMMC2_DAT7, OMAP_PULL_ENA | OMAP_MUX_MODE0), | |
296 | { .reg_offset = OMAP_MUX_TERMINATOR }, | |
297 | }; | |
298 | ||
112485e9 BC |
299 | static struct omap_mux_partition *partition; |
300 | ||
ce6f0016 AH |
301 | /* |
302 | * Current flows to eMMC when eMMC is off and the data lines are pulled up, | |
303 | * so pull them down. N.B. we pull 8 lines because we are using 8 lines. | |
304 | */ | |
305 | static void rx51_mmc2_remux(struct device *dev, int slot, int power_on) | |
306 | { | |
307 | if (power_on) | |
112485e9 | 308 | omap_mux_write_array(partition, rx51_mmc2_on_mux); |
ce6f0016 | 309 | else |
112485e9 | 310 | omap_mux_write_array(partition, rx51_mmc2_off_mux); |
ce6f0016 AH |
311 | } |
312 | ||
68ff0423 | 313 | static struct omap2_hsmmc_info mmc[] __initdata = { |
ffe7f95b LL |
314 | { |
315 | .name = "external", | |
316 | .mmc = 1, | |
3a63833e | 317 | .caps = MMC_CAP_4_BIT_DATA, |
ffe7f95b LL |
318 | .cover_only = true, |
319 | .gpio_cd = 160, | |
320 | .gpio_wp = -EINVAL, | |
5e763d29 | 321 | .power_saving = true, |
ffe7f95b LL |
322 | }, |
323 | { | |
324 | .name = "internal", | |
325 | .mmc = 2, | |
3a63833e SG |
326 | .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA, |
327 | /* See also rx51_mmc2_remux */ | |
ffe7f95b LL |
328 | .gpio_cd = -EINVAL, |
329 | .gpio_wp = -EINVAL, | |
5e763d29 AH |
330 | .nonremovable = true, |
331 | .power_saving = true, | |
ce6f0016 | 332 | .remux = rx51_mmc2_remux, |
ffe7f95b LL |
333 | }, |
334 | {} /* Terminator */ | |
335 | }; | |
336 | ||
5c7d9bbe JN |
337 | static struct regulator_consumer_supply rx51_vmmc1_supply = |
338 | REGULATOR_SUPPLY("vmmc", "mmci-omap-hs.0"); | |
ffe7f95b | 339 | |
5c7d9bbe JN |
340 | static struct regulator_consumer_supply rx51_vaux3_supply = |
341 | REGULATOR_SUPPLY("vmmc", "mmci-omap-hs.1"); | |
ffe7f95b | 342 | |
5c7d9bbe JN |
343 | static struct regulator_consumer_supply rx51_vsim_supply = |
344 | REGULATOR_SUPPLY("vmmc_aux", "mmci-omap-hs.1"); | |
ffe7f95b | 345 | |
4cfcaef1 JN |
346 | static struct regulator_consumer_supply rx51_vmmc2_supplies[] = { |
347 | /* tlv320aic3x analog supplies */ | |
5c7d9bbe JN |
348 | REGULATOR_SUPPLY("AVDD", "2-0018"), |
349 | REGULATOR_SUPPLY("DRVDD", "2-0018"), | |
caeeb4aa JN |
350 | REGULATOR_SUPPLY("AVDD", "2-0019"), |
351 | REGULATOR_SUPPLY("DRVDD", "2-0019"), | |
64d06691 JN |
352 | /* tpa6130a2 */ |
353 | REGULATOR_SUPPLY("Vdd", "2-0060"), | |
4cfcaef1 | 354 | /* Keep vmmc as last item. It is not iterated for newer boards */ |
5c7d9bbe | 355 | REGULATOR_SUPPLY("vmmc", "mmci-omap-hs.1"), |
4cfcaef1 JN |
356 | }; |
357 | ||
358 | static struct regulator_consumer_supply rx51_vio_supplies[] = { | |
359 | /* tlv320aic3x digital supplies */ | |
5c7d9bbe JN |
360 | REGULATOR_SUPPLY("IOVDD", "2-0018"), |
361 | REGULATOR_SUPPLY("DVDD", "2-0018"), | |
caeeb4aa JN |
362 | REGULATOR_SUPPLY("IOVDD", "2-0019"), |
363 | REGULATOR_SUPPLY("DVDD", "2-0019"), | |
589541c0 JN |
364 | /* Si4713 IO supply */ |
365 | REGULATOR_SUPPLY("vio", "2-0063"), | |
4cfcaef1 JN |
366 | }; |
367 | ||
0581b52e | 368 | static struct regulator_consumer_supply rx51_vaux1_consumers[] = { |
b5b9945b | 369 | REGULATOR_SUPPLY("vdds_sdi", "omapdss"), |
589541c0 JN |
370 | /* Si4713 supply */ |
371 | REGULATOR_SUPPLY("vdd", "2-0063"), | |
0581b52e RQ |
372 | }; |
373 | ||
31bbb4f0 JN |
374 | static struct regulator_consumer_supply rx51_vdac_supply[] = { |
375 | REGULATOR_SUPPLY("vdda_dac", "omapdss"), | |
376 | }; | |
377 | ||
ffe7f95b LL |
378 | static struct regulator_init_data rx51_vaux1 = { |
379 | .constraints = { | |
380 | .name = "V28", | |
381 | .min_uV = 2800000, | |
382 | .max_uV = 2800000, | |
000d534e | 383 | .always_on = true, /* due battery cover sensor */ |
ffe7f95b LL |
384 | .valid_modes_mask = REGULATOR_MODE_NORMAL |
385 | | REGULATOR_MODE_STANDBY, | |
386 | .valid_ops_mask = REGULATOR_CHANGE_MODE | |
387 | | REGULATOR_CHANGE_STATUS, | |
388 | }, | |
0581b52e RQ |
389 | .num_consumer_supplies = ARRAY_SIZE(rx51_vaux1_consumers), |
390 | .consumer_supplies = rx51_vaux1_consumers, | |
ffe7f95b LL |
391 | }; |
392 | ||
393 | static struct regulator_init_data rx51_vaux2 = { | |
394 | .constraints = { | |
395 | .name = "VCSI", | |
396 | .min_uV = 1800000, | |
397 | .max_uV = 1800000, | |
398 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
399 | | REGULATOR_MODE_STANDBY, | |
400 | .valid_ops_mask = REGULATOR_CHANGE_MODE | |
401 | | REGULATOR_CHANGE_STATUS, | |
402 | }, | |
403 | }; | |
404 | ||
405 | /* VAUX3 - adds more power to VIO_18 rail */ | |
f52eeee8 | 406 | static struct regulator_init_data rx51_vaux3_cam = { |
ffe7f95b LL |
407 | .constraints = { |
408 | .name = "VCAM_DIG_18", | |
409 | .min_uV = 1800000, | |
410 | .max_uV = 1800000, | |
411 | .apply_uV = true, | |
412 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
413 | | REGULATOR_MODE_STANDBY, | |
414 | .valid_ops_mask = REGULATOR_CHANGE_MODE | |
415 | | REGULATOR_CHANGE_STATUS, | |
416 | }, | |
417 | }; | |
418 | ||
f52eeee8 AH |
419 | static struct regulator_init_data rx51_vaux3_mmc = { |
420 | .constraints = { | |
421 | .name = "VMMC2_30", | |
422 | .min_uV = 2800000, | |
423 | .max_uV = 3000000, | |
424 | .apply_uV = true, | |
425 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
426 | | REGULATOR_MODE_STANDBY, | |
427 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | |
428 | | REGULATOR_CHANGE_MODE | |
429 | | REGULATOR_CHANGE_STATUS, | |
430 | }, | |
431 | .num_consumer_supplies = 1, | |
4cfcaef1 | 432 | .consumer_supplies = &rx51_vaux3_supply, |
f52eeee8 AH |
433 | }; |
434 | ||
ffe7f95b LL |
435 | static struct regulator_init_data rx51_vaux4 = { |
436 | .constraints = { | |
437 | .name = "VCAM_ANA_28", | |
438 | .min_uV = 2800000, | |
439 | .max_uV = 2800000, | |
440 | .apply_uV = true, | |
441 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
442 | | REGULATOR_MODE_STANDBY, | |
443 | .valid_ops_mask = REGULATOR_CHANGE_MODE | |
444 | | REGULATOR_CHANGE_STATUS, | |
445 | }, | |
446 | }; | |
447 | ||
448 | static struct regulator_init_data rx51_vmmc1 = { | |
449 | .constraints = { | |
450 | .min_uV = 1850000, | |
451 | .max_uV = 3150000, | |
452 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
453 | | REGULATOR_MODE_STANDBY, | |
454 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | |
455 | | REGULATOR_CHANGE_MODE | |
456 | | REGULATOR_CHANGE_STATUS, | |
457 | }, | |
458 | .num_consumer_supplies = 1, | |
459 | .consumer_supplies = &rx51_vmmc1_supply, | |
460 | }; | |
461 | ||
462 | static struct regulator_init_data rx51_vmmc2 = { | |
463 | .constraints = { | |
f2add1de JN |
464 | .name = "V28_A", |
465 | .min_uV = 2800000, | |
466 | .max_uV = 3000000, | |
ffe7f95b LL |
467 | .apply_uV = true, |
468 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
469 | | REGULATOR_MODE_STANDBY, | |
470 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | |
471 | | REGULATOR_CHANGE_MODE | |
472 | | REGULATOR_CHANGE_STATUS, | |
473 | }, | |
4cfcaef1 JN |
474 | .num_consumer_supplies = ARRAY_SIZE(rx51_vmmc2_supplies), |
475 | .consumer_supplies = rx51_vmmc2_supplies, | |
ffe7f95b LL |
476 | }; |
477 | ||
478 | static struct regulator_init_data rx51_vsim = { | |
479 | .constraints = { | |
480 | .name = "VMMC2_IO_18", | |
481 | .min_uV = 1800000, | |
482 | .max_uV = 1800000, | |
483 | .apply_uV = true, | |
484 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
485 | | REGULATOR_MODE_STANDBY, | |
486 | .valid_ops_mask = REGULATOR_CHANGE_MODE | |
487 | | REGULATOR_CHANGE_STATUS, | |
488 | }, | |
489 | .num_consumer_supplies = 1, | |
490 | .consumer_supplies = &rx51_vsim_supply, | |
491 | }; | |
492 | ||
493 | static struct regulator_init_data rx51_vdac = { | |
494 | .constraints = { | |
31bbb4f0 | 495 | .name = "VDAC", |
ffe7f95b LL |
496 | .min_uV = 1800000, |
497 | .max_uV = 1800000, | |
31bbb4f0 | 498 | .apply_uV = true, |
ffe7f95b LL |
499 | .valid_modes_mask = REGULATOR_MODE_NORMAL |
500 | | REGULATOR_MODE_STANDBY, | |
31bbb4f0 | 501 | .valid_ops_mask = REGULATOR_CHANGE_MODE |
ffe7f95b LL |
502 | | REGULATOR_CHANGE_STATUS, |
503 | }, | |
31bbb4f0 JN |
504 | .num_consumer_supplies = 1, |
505 | .consumer_supplies = rx51_vdac_supply, | |
ffe7f95b LL |
506 | }; |
507 | ||
4cfcaef1 JN |
508 | static struct regulator_init_data rx51_vio = { |
509 | .constraints = { | |
510 | .min_uV = 1800000, | |
511 | .max_uV = 1800000, | |
512 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
513 | | REGULATOR_MODE_STANDBY, | |
514 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | |
515 | | REGULATOR_CHANGE_MODE | |
516 | | REGULATOR_CHANGE_STATUS, | |
517 | }, | |
518 | .num_consumer_supplies = ARRAY_SIZE(rx51_vio_supplies), | |
519 | .consumer_supplies = rx51_vio_supplies, | |
520 | }; | |
521 | ||
589541c0 JN |
522 | static struct si4713_platform_data rx51_si4713_i2c_data __initdata_or_module = { |
523 | .gpio_reset = RX51_FMTX_RESET_GPIO, | |
524 | }; | |
525 | ||
526 | static struct i2c_board_info rx51_si4713_board_info __initdata_or_module = { | |
527 | I2C_BOARD_INFO("si4713", SI4713_I2C_ADDR_BUSEN_HIGH), | |
528 | .platform_data = &rx51_si4713_i2c_data, | |
529 | }; | |
530 | ||
531 | static struct radio_si4713_platform_data rx51_si4713_data __initdata_or_module = { | |
532 | .i2c_bus = 2, | |
533 | .subdev_board_info = &rx51_si4713_board_info, | |
534 | }; | |
535 | ||
536 | static struct platform_device rx51_si4713_dev __initdata_or_module = { | |
537 | .name = "radio-si4713", | |
538 | .id = -1, | |
539 | .dev = { | |
540 | .platform_data = &rx51_si4713_data, | |
541 | }, | |
542 | }; | |
543 | ||
544 | static __init void rx51_init_si4713(void) | |
545 | { | |
546 | int err; | |
547 | ||
548 | err = gpio_request_one(RX51_FMTX_IRQ, GPIOF_DIR_IN, "si4713 irq"); | |
549 | if (err) { | |
550 | printk(KERN_ERR "Cannot request si4713 irq gpio. %d\n", err); | |
551 | return; | |
552 | } | |
553 | rx51_si4713_board_info.irq = gpio_to_irq(RX51_FMTX_IRQ); | |
554 | platform_device_register(&rx51_si4713_dev); | |
555 | } | |
556 | ||
ffe7f95b LL |
557 | static int rx51_twlgpio_setup(struct device *dev, unsigned gpio, unsigned n) |
558 | { | |
559 | /* FIXME this gpio setup is just a placeholder for now */ | |
560 | gpio_request(gpio + 6, "backlight_pwm"); | |
561 | gpio_direction_output(gpio + 6, 0); | |
562 | gpio_request(gpio + 7, "speaker_en"); | |
563 | gpio_direction_output(gpio + 7, 1); | |
564 | ||
ffe7f95b LL |
565 | return 0; |
566 | } | |
567 | ||
568 | static struct twl4030_gpio_platform_data rx51_gpio_data = { | |
569 | .gpio_base = OMAP_MAX_GPIO_LINES, | |
570 | .irq_base = TWL4030_GPIO_IRQ_BASE, | |
571 | .irq_end = TWL4030_GPIO_IRQ_END, | |
572 | .pulldowns = BIT(0) | BIT(1) | BIT(2) | BIT(3) | |
573 | | BIT(4) | BIT(5) | |
574 | | BIT(8) | BIT(9) | BIT(10) | BIT(11) | |
575 | | BIT(12) | BIT(13) | BIT(14) | BIT(15) | |
576 | | BIT(16) | BIT(17) , | |
577 | .setup = rx51_twlgpio_setup, | |
578 | }; | |
579 | ||
dfc27b34 RQ |
580 | static struct twl4030_usb_data rx51_usb_data = { |
581 | .usb_mode = T2_USB_MODE_ULPI, | |
582 | }; | |
583 | ||
9312fffb AK |
584 | static struct twl4030_ins sleep_on_seq[] __initdata = { |
585 | /* | |
3c684e84 | 586 | * Turn off everything |
9312fffb | 587 | */ |
3c684e84 | 588 | {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 1, 0, RES_STATE_SLEEP), 2}, |
9312fffb AK |
589 | }; |
590 | ||
591 | static struct twl4030_script sleep_on_script __initdata = { | |
592 | .script = sleep_on_seq, | |
593 | .size = ARRAY_SIZE(sleep_on_seq), | |
594 | .flags = TWL4030_SLEEP_SCRIPT, | |
595 | }; | |
596 | ||
597 | static struct twl4030_ins wakeup_seq[] __initdata = { | |
598 | /* | |
3c684e84 | 599 | * Reenable everything |
9312fffb | 600 | */ |
3c684e84 | 601 | {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 1, 0, RES_STATE_ACTIVE), 2}, |
9312fffb AK |
602 | }; |
603 | ||
604 | static struct twl4030_script wakeup_script __initdata = { | |
605 | .script = wakeup_seq, | |
606 | .size = ARRAY_SIZE(wakeup_seq), | |
607 | .flags = TWL4030_WAKEUP12_SCRIPT, | |
608 | }; | |
609 | ||
610 | static struct twl4030_ins wakeup_p3_seq[] __initdata = { | |
611 | /* | |
3c684e84 | 612 | * Reenable everything |
9312fffb | 613 | */ |
3c684e84 | 614 | {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 1, 0, RES_STATE_ACTIVE), 2}, |
9312fffb AK |
615 | }; |
616 | ||
617 | static struct twl4030_script wakeup_p3_script __initdata = { | |
618 | .script = wakeup_p3_seq, | |
619 | .size = ARRAY_SIZE(wakeup_p3_seq), | |
620 | .flags = TWL4030_WAKEUP3_SCRIPT, | |
621 | }; | |
622 | ||
623 | static struct twl4030_ins wrst_seq[] __initdata = { | |
624 | /* | |
625 | * Reset twl4030. | |
626 | * Reset VDD1 regulator. | |
627 | * Reset VDD2 regulator. | |
628 | * Reset VPLL1 regulator. | |
629 | * Enable sysclk output. | |
630 | * Reenable twl4030. | |
631 | */ | |
632 | {MSG_SINGULAR(DEV_GRP_NULL, RES_RESET, RES_STATE_OFF), 2}, | |
633 | {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 0, 1, RES_STATE_ACTIVE), | |
634 | 0x13}, | |
9312fffb AK |
635 | {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_PP, 0, 3, RES_STATE_OFF), 0x13}, |
636 | {MSG_SINGULAR(DEV_GRP_NULL, RES_VDD1, RES_STATE_WRST), 0x13}, | |
637 | {MSG_SINGULAR(DEV_GRP_NULL, RES_VDD2, RES_STATE_WRST), 0x13}, | |
638 | {MSG_SINGULAR(DEV_GRP_NULL, RES_VPLL1, RES_STATE_WRST), 0x35}, | |
3c684e84 | 639 | {MSG_SINGULAR(DEV_GRP_P3, RES_HFCLKOUT, RES_STATE_ACTIVE), 2}, |
9312fffb AK |
640 | {MSG_SINGULAR(DEV_GRP_NULL, RES_RESET, RES_STATE_ACTIVE), 2}, |
641 | }; | |
642 | ||
643 | static struct twl4030_script wrst_script __initdata = { | |
644 | .script = wrst_seq, | |
645 | .size = ARRAY_SIZE(wrst_seq), | |
646 | .flags = TWL4030_WRST_SCRIPT, | |
647 | }; | |
648 | ||
649 | static struct twl4030_script *twl4030_scripts[] __initdata = { | |
650 | /* wakeup12 script should be loaded before sleep script, otherwise a | |
651 | board might hit retention before loading of wakeup script is | |
652 | completed. This can cause boot failures depending on timing issues. | |
653 | */ | |
654 | &wakeup_script, | |
655 | &sleep_on_script, | |
656 | &wakeup_p3_script, | |
657 | &wrst_script, | |
658 | }; | |
659 | ||
660 | static struct twl4030_resconfig twl4030_rconfig[] __initdata = { | |
3c684e84 AK |
661 | { .resource = RES_VDD1, .devgroup = -1, |
662 | .type = 1, .type2 = -1, .remap_off = RES_STATE_OFF, | |
663 | .remap_sleep = RES_STATE_OFF | |
664 | }, | |
665 | { .resource = RES_VDD2, .devgroup = -1, | |
666 | .type = 1, .type2 = -1, .remap_off = RES_STATE_OFF, | |
667 | .remap_sleep = RES_STATE_OFF | |
668 | }, | |
669 | { .resource = RES_VPLL1, .devgroup = -1, | |
670 | .type = 1, .type2 = -1, .remap_off = RES_STATE_OFF, | |
671 | .remap_sleep = RES_STATE_OFF | |
672 | }, | |
673 | { .resource = RES_VPLL2, .devgroup = -1, | |
674 | .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1 | |
675 | }, | |
676 | { .resource = RES_VAUX1, .devgroup = -1, | |
677 | .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1 | |
678 | }, | |
679 | { .resource = RES_VAUX2, .devgroup = -1, | |
680 | .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1 | |
681 | }, | |
682 | { .resource = RES_VAUX3, .devgroup = -1, | |
683 | .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1 | |
684 | }, | |
685 | { .resource = RES_VAUX4, .devgroup = -1, | |
686 | .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1 | |
687 | }, | |
688 | { .resource = RES_VMMC1, .devgroup = -1, | |
689 | .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1 | |
690 | }, | |
691 | { .resource = RES_VMMC2, .devgroup = -1, | |
692 | .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1 | |
693 | }, | |
694 | { .resource = RES_VDAC, .devgroup = -1, | |
695 | .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1 | |
696 | }, | |
697 | { .resource = RES_VSIM, .devgroup = -1, | |
698 | .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1 | |
699 | }, | |
700 | { .resource = RES_VINTANA1, .devgroup = DEV_GRP_P1 | DEV_GRP_P3, | |
701 | .type = -1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
702 | }, | |
703 | { .resource = RES_VINTANA2, .devgroup = DEV_GRP_P1 | DEV_GRP_P3, | |
704 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
705 | }, | |
706 | { .resource = RES_VINTDIG, .devgroup = DEV_GRP_P1 | DEV_GRP_P3, | |
707 | .type = -1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
708 | }, | |
709 | { .resource = RES_VIO, .devgroup = DEV_GRP_P3, | |
710 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
711 | }, | |
712 | { .resource = RES_CLKEN, .devgroup = DEV_GRP_P1 | DEV_GRP_P3, | |
713 | .type = 1, .type2 = -1 , .remap_off = -1, .remap_sleep = -1 | |
714 | }, | |
715 | { .resource = RES_REGEN, .devgroup = DEV_GRP_P1 | DEV_GRP_P3, | |
716 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
717 | }, | |
718 | { .resource = RES_NRES_PWRON, .devgroup = DEV_GRP_P1 | DEV_GRP_P3, | |
719 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
720 | }, | |
721 | { .resource = RES_SYSEN, .devgroup = DEV_GRP_P1 | DEV_GRP_P3, | |
722 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
723 | }, | |
724 | { .resource = RES_HFCLKOUT, .devgroup = DEV_GRP_P3, | |
725 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
726 | }, | |
727 | { .resource = RES_32KCLKOUT, .devgroup = -1, | |
728 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
729 | }, | |
730 | { .resource = RES_RESET, .devgroup = -1, | |
731 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
732 | }, | |
733 | { .resource = RES_Main_Ref, .devgroup = -1, | |
734 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
735 | }, | |
9312fffb AK |
736 | { 0, 0}, |
737 | }; | |
738 | ||
739 | static struct twl4030_power_data rx51_t2scripts_data __initdata = { | |
740 | .scripts = twl4030_scripts, | |
741 | .num = ARRAY_SIZE(twl4030_scripts), | |
742 | .resource_config = twl4030_rconfig, | |
743 | }; | |
744 | ||
745 | ||
9312fffb | 746 | static struct twl4030_platform_data rx51_twldata __initdata = { |
ffe7f95b LL |
747 | .irq_base = TWL4030_IRQ_BASE, |
748 | .irq_end = TWL4030_IRQ_END, | |
749 | ||
750 | /* platform_data for children goes here */ | |
751 | .gpio = &rx51_gpio_data, | |
752 | .keypad = &rx51_kp_data, | |
753 | .madc = &rx51_madc_data, | |
dfc27b34 | 754 | .usb = &rx51_usb_data, |
9312fffb | 755 | .power = &rx51_t2scripts_data, |
ffe7f95b LL |
756 | |
757 | .vaux1 = &rx51_vaux1, | |
758 | .vaux2 = &rx51_vaux2, | |
ffe7f95b LL |
759 | .vaux4 = &rx51_vaux4, |
760 | .vmmc1 = &rx51_vmmc1, | |
ffe7f95b LL |
761 | .vsim = &rx51_vsim, |
762 | .vdac = &rx51_vdac, | |
4cfcaef1 | 763 | .vio = &rx51_vio, |
ffe7f95b LL |
764 | }; |
765 | ||
f0c61d3d | 766 | static struct tpa6130a2_platform_data rx51_tpa6130a2_data __initdata_or_module = { |
64d06691 JN |
767 | .id = TPA6130A2, |
768 | .power_gpio = 98, | |
769 | }; | |
770 | ||
ffe7f95b LL |
771 | static struct i2c_board_info __initdata rx51_peripherals_i2c_board_info_1[] = { |
772 | { | |
773 | I2C_BOARD_INFO("twl5030", 0x48), | |
774 | .flags = I2C_CLIENT_WAKE, | |
775 | .irq = INT_34XX_SYS_NIRQ, | |
776 | .platform_data = &rx51_twldata, | |
777 | }, | |
778 | }; | |
779 | ||
f0fba2ad LG |
780 | /* Audio setup data */ |
781 | static struct aic3x_setup_data rx51_aic34_setup = { | |
782 | .gpio_func[0] = AIC3X_GPIO1_FUNC_DISABLED, | |
783 | .gpio_func[1] = AIC3X_GPIO2_FUNC_DIGITAL_MIC_INPUT, | |
784 | }; | |
785 | ||
e4862f2f | 786 | static struct aic3x_pdata rx51_aic3x_data = { |
f0fba2ad LG |
787 | .setup = &rx51_aic34_setup, |
788 | .gpio_reset = 60, | |
789 | }; | |
790 | ||
caeeb4aa JN |
791 | static struct aic3x_pdata rx51_aic3x_data2 = { |
792 | .gpio_reset = 60, | |
793 | }; | |
794 | ||
dabe929b JN |
795 | static struct i2c_board_info __initdata rx51_peripherals_i2c_board_info_2[] = { |
796 | { | |
797 | I2C_BOARD_INFO("tlv320aic3x", 0x18), | |
87581fd4 | 798 | .platform_data = &rx51_aic3x_data, |
dabe929b | 799 | }, |
caeeb4aa JN |
800 | { |
801 | I2C_BOARD_INFO("tlv320aic3x", 0x19), | |
802 | .platform_data = &rx51_aic3x_data2, | |
803 | }, | |
70b5d737 MN |
804 | #if defined(CONFIG_SENSORS_TSL2563) || defined(CONFIG_SENSORS_TSL2563_MODULE) |
805 | { | |
806 | I2C_BOARD_INFO("tsl2563", 0x29), | |
807 | .platform_data = &rx51_tsl2563_platform_data, | |
808 | }, | |
809 | #endif | |
64d06691 JN |
810 | { |
811 | I2C_BOARD_INFO("tpa6130a2", 0x60), | |
812 | .platform_data = &rx51_tpa6130a2_data, | |
813 | } | |
dabe929b JN |
814 | }; |
815 | ||
ffe7f95b LL |
816 | static int __init rx51_i2c_init(void) |
817 | { | |
f52eeee8 | 818 | if ((system_rev >= SYSTEM_REV_S_USES_VAUX3 && system_rev < 0x100) || |
4cfcaef1 | 819 | system_rev >= SYSTEM_REV_B_USES_VAUX3) { |
f52eeee8 | 820 | rx51_twldata.vaux3 = &rx51_vaux3_mmc; |
4cfcaef1 JN |
821 | /* Only older boards use VMMC2 for internal MMC */ |
822 | rx51_vmmc2.num_consumer_supplies--; | |
823 | } else { | |
f52eeee8 | 824 | rx51_twldata.vaux3 = &rx51_vaux3_cam; |
f52eeee8 | 825 | } |
4cfcaef1 | 826 | rx51_twldata.vmmc2 = &rx51_vmmc2; |
cb3cc45a | 827 | omap_register_i2c_bus(1, 2200, rx51_peripherals_i2c_board_info_1, |
dabe929b JN |
828 | ARRAY_SIZE(rx51_peripherals_i2c_board_info_1)); |
829 | omap_register_i2c_bus(2, 100, rx51_peripherals_i2c_board_info_2, | |
830 | ARRAY_SIZE(rx51_peripherals_i2c_board_info_2)); | |
ffe7f95b LL |
831 | omap_register_i2c_bus(3, 400, NULL, 0); |
832 | return 0; | |
833 | } | |
834 | ||
aa62e90f JY |
835 | #if defined(CONFIG_MTD_ONENAND_OMAP2) || \ |
836 | defined(CONFIG_MTD_ONENAND_OMAP2_MODULE) | |
837 | ||
838 | static struct mtd_partition onenand_partitions[] = { | |
839 | { | |
840 | .name = "bootloader", | |
841 | .offset = 0, | |
842 | .size = 0x20000, | |
843 | .mask_flags = MTD_WRITEABLE, /* Force read-only */ | |
844 | }, | |
845 | { | |
846 | .name = "config", | |
847 | .offset = MTDPART_OFS_APPEND, | |
848 | .size = 0x60000, | |
849 | }, | |
850 | { | |
851 | .name = "log", | |
852 | .offset = MTDPART_OFS_APPEND, | |
853 | .size = 0x40000, | |
854 | }, | |
855 | { | |
856 | .name = "kernel", | |
857 | .offset = MTDPART_OFS_APPEND, | |
858 | .size = 0x200000, | |
859 | }, | |
860 | { | |
861 | .name = "initfs", | |
862 | .offset = MTDPART_OFS_APPEND, | |
863 | .size = 0x200000, | |
864 | }, | |
865 | { | |
866 | .name = "rootfs", | |
867 | .offset = MTDPART_OFS_APPEND, | |
868 | .size = MTDPART_SIZ_FULL, | |
869 | }, | |
870 | }; | |
871 | ||
5403187f AK |
872 | static struct omap_onenand_platform_data board_onenand_data[] = { |
873 | { | |
874 | .cs = 0, | |
875 | .gpio_irq = 65, | |
876 | .parts = onenand_partitions, | |
877 | .nr_parts = ARRAY_SIZE(onenand_partitions), | |
878 | .flags = ONENAND_SYNC_READWRITE, | |
879 | } | |
aa62e90f | 880 | }; |
aa62e90f | 881 | #endif |
ffe7f95b | 882 | |
1a48e157 TL |
883 | #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) |
884 | ||
885 | static struct omap_smc91x_platform_data board_smc91x_data = { | |
886 | .cs = 1, | |
887 | .gpio_irq = 54, | |
888 | .gpio_pwrdwn = 86, | |
889 | .gpio_reset = 164, | |
890 | .flags = GPMC_TIMINGS_SMC91C96 | IORESOURCE_IRQ_HIGHLEVEL, | |
891 | }; | |
892 | ||
893 | static void __init board_smc91x_init(void) | |
894 | { | |
4896e394 TL |
895 | omap_mux_init_gpio(54, OMAP_PIN_INPUT_PULLDOWN); |
896 | omap_mux_init_gpio(86, OMAP_PIN_OUTPUT); | |
897 | omap_mux_init_gpio(164, OMAP_PIN_OUTPUT); | |
1a48e157 TL |
898 | |
899 | gpmc_smc91x_init(&board_smc91x_data); | |
900 | } | |
901 | ||
902 | #else | |
903 | ||
904 | static inline void board_smc91x_init(void) | |
905 | { | |
906 | } | |
907 | ||
908 | #endif | |
909 | ||
a24e61a9 KV |
910 | static void rx51_wl1251_set_power(bool enable) |
911 | { | |
912 | gpio_set_value(RX51_WL1251_POWER_GPIO, enable); | |
913 | } | |
914 | ||
915 | static void __init rx51_init_wl1251(void) | |
916 | { | |
917 | int irq, ret; | |
918 | ||
919 | ret = gpio_request(RX51_WL1251_POWER_GPIO, "wl1251 power"); | |
920 | if (ret < 0) | |
921 | goto error; | |
922 | ||
923 | ret = gpio_direction_output(RX51_WL1251_POWER_GPIO, 0); | |
924 | if (ret < 0) | |
925 | goto err_power; | |
926 | ||
927 | ret = gpio_request(RX51_WL1251_IRQ_GPIO, "wl1251 irq"); | |
928 | if (ret < 0) | |
929 | goto err_power; | |
930 | ||
931 | ret = gpio_direction_input(RX51_WL1251_IRQ_GPIO); | |
932 | if (ret < 0) | |
933 | goto err_irq; | |
934 | ||
935 | irq = gpio_to_irq(RX51_WL1251_IRQ_GPIO); | |
936 | if (irq < 0) | |
937 | goto err_irq; | |
938 | ||
939 | wl1251_pdata.set_power = rx51_wl1251_set_power; | |
940 | rx51_peripherals_spi_board_info[RX51_SPI_WL1251].irq = irq; | |
941 | ||
942 | return; | |
943 | ||
944 | err_irq: | |
945 | gpio_free(RX51_WL1251_IRQ_GPIO); | |
946 | ||
947 | err_power: | |
948 | gpio_free(RX51_WL1251_POWER_GPIO); | |
949 | ||
950 | error: | |
951 | printk(KERN_ERR "wl1251 board initialisation failed\n"); | |
952 | wl1251_pdata.set_power = NULL; | |
953 | ||
954 | /* | |
955 | * Now rx51_peripherals_spi_board_info[1].irq is zero and | |
956 | * set_power is null, and wl1251_probe() will fail. | |
957 | */ | |
958 | } | |
959 | ||
ffe7f95b LL |
960 | void __init rx51_peripherals_init(void) |
961 | { | |
ffe7f95b | 962 | rx51_i2c_init(); |
5403187f | 963 | gpmc_onenand_init(board_onenand_data); |
1a48e157 | 964 | board_smc91x_init(); |
f014ee32 | 965 | rx51_add_gpio_keys(); |
a24e61a9 | 966 | rx51_init_wl1251(); |
589541c0 | 967 | rx51_init_si4713(); |
a24e61a9 KV |
968 | spi_register_board_info(rx51_peripherals_spi_board_info, |
969 | ARRAY_SIZE(rx51_peripherals_spi_board_info)); | |
112485e9 BC |
970 | |
971 | partition = omap_mux_get("core"); | |
972 | if (partition) | |
973 | omap2_hsmmc_init(mmc); | |
974 | ||
fd0964c5 | 975 | platform_device_register(&rx51_charger_device); |
ffe7f95b LL |
976 | } |
977 |