Commit | Line | Data |
---|---|---|
d459bfe0 | 1 | /* |
8a3ddc75 | 2 | * OMAP2/3/4 clockdomain framework functions |
d459bfe0 | 3 | * |
91808a81 AP |
4 | * Copyright (C) 2008-2010 Texas Instruments, Inc. |
5 | * Copyright (C) 2008-2010 Nokia Corporation | |
d459bfe0 PW |
6 | * |
7 | * Written by Paul Walmsley and Jouni Högander | |
8a3ddc75 | 8 | * Added OMAP4 specific support by Abhijit Pagare <abhijitpagare@ti.com> |
d459bfe0 PW |
9 | * |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License version 2 as | |
12 | * published by the Free Software Foundation. | |
13 | */ | |
33903eb5 | 14 | #undef DEBUG |
d459bfe0 | 15 | |
d459bfe0 PW |
16 | #include <linux/kernel.h> |
17 | #include <linux/device.h> | |
18 | #include <linux/list.h> | |
19 | #include <linux/errno.h> | |
20 | #include <linux/delay.h> | |
21 | #include <linux/clk.h> | |
22 | #include <linux/limits.h> | |
5b74c676 | 23 | #include <linux/err.h> |
d459bfe0 PW |
24 | |
25 | #include <linux/io.h> | |
26 | ||
27 | #include <linux/bitops.h> | |
28 | ||
59fb659b | 29 | #include "prm2xxx_3xxx.h" |
d459bfe0 | 30 | #include "prm-regbits-24xx.h" |
59fb659b | 31 | #include "cm2xxx_3xxx.h" |
55ae3507 | 32 | #include "cm-regbits-24xx.h" |
bd2122ca PW |
33 | #include "cminst44xx.h" |
34 | #include "prcm44xx.h" | |
d459bfe0 | 35 | |
55ed9694 | 36 | #include <plat/clock.h> |
72e06d08 | 37 | #include "powerdomain.h" |
1540f214 | 38 | #include "clockdomain.h" |
55ed9694 | 39 | #include <plat/prcm.h> |
d459bfe0 PW |
40 | |
41 | /* clkdm_list contains all registered struct clockdomains */ | |
42 | static LIST_HEAD(clkdm_list); | |
43 | ||
55ed9694 PW |
44 | /* array of clockdomain deps to be added/removed when clkdm in hwsup mode */ |
45 | static struct clkdm_autodep *autodeps; | |
d459bfe0 PW |
46 | |
47 | ||
48 | /* Private functions */ | |
49 | ||
55ed9694 PW |
50 | static struct clockdomain *_clkdm_lookup(const char *name) |
51 | { | |
52 | struct clockdomain *clkdm, *temp_clkdm; | |
53 | ||
54 | if (!name) | |
55 | return NULL; | |
56 | ||
57 | clkdm = NULL; | |
58 | ||
59 | list_for_each_entry(temp_clkdm, &clkdm_list, node) { | |
60 | if (!strcmp(name, temp_clkdm->name)) { | |
61 | clkdm = temp_clkdm; | |
62 | break; | |
63 | } | |
64 | } | |
65 | ||
66 | return clkdm; | |
67 | } | |
68 | ||
e909d62a PW |
69 | /** |
70 | * _clkdm_register - register a clockdomain | |
71 | * @clkdm: struct clockdomain * to register | |
72 | * | |
73 | * Adds a clockdomain to the internal clockdomain list. | |
74 | * Returns -EINVAL if given a null pointer, -EEXIST if a clockdomain is | |
75 | * already registered by the provided name, or 0 upon success. | |
76 | */ | |
77 | static int _clkdm_register(struct clockdomain *clkdm) | |
78 | { | |
79 | struct powerdomain *pwrdm; | |
80 | ||
81 | if (!clkdm || !clkdm->name) | |
82 | return -EINVAL; | |
83 | ||
84 | if (!omap_chip_is(clkdm->omap_chip)) | |
85 | return -EINVAL; | |
86 | ||
87 | pwrdm = pwrdm_lookup(clkdm->pwrdm.name); | |
88 | if (!pwrdm) { | |
89 | pr_err("clockdomain: %s: powerdomain %s does not exist\n", | |
90 | clkdm->name, clkdm->pwrdm.name); | |
91 | return -EINVAL; | |
92 | } | |
93 | clkdm->pwrdm.ptr = pwrdm; | |
94 | ||
95 | /* Verify that the clockdomain is not already registered */ | |
96 | if (_clkdm_lookup(clkdm->name)) | |
97 | return -EEXIST; | |
98 | ||
99 | list_add(&clkdm->node, &clkdm_list); | |
100 | ||
101 | pwrdm_add_clkdm(pwrdm, clkdm); | |
102 | ||
103 | pr_debug("clockdomain: registered %s\n", clkdm->name); | |
104 | ||
105 | return 0; | |
106 | } | |
107 | ||
55ed9694 PW |
108 | /* _clkdm_deps_lookup - look up the specified clockdomain in a clkdm list */ |
109 | static struct clkdm_dep *_clkdm_deps_lookup(struct clockdomain *clkdm, | |
110 | struct clkdm_dep *deps) | |
111 | { | |
112 | struct clkdm_dep *cd; | |
113 | ||
114 | if (!clkdm || !deps || !omap_chip_is(clkdm->omap_chip)) | |
115 | return ERR_PTR(-EINVAL); | |
116 | ||
117 | for (cd = deps; cd->clkdm_name; cd++) { | |
55ed9694 PW |
118 | if (!omap_chip_is(cd->omap_chip)) |
119 | continue; | |
120 | ||
121 | if (!cd->clkdm && cd->clkdm_name) | |
122 | cd->clkdm = _clkdm_lookup(cd->clkdm_name); | |
123 | ||
124 | if (cd->clkdm == clkdm) | |
125 | break; | |
55ed9694 PW |
126 | } |
127 | ||
128 | if (!cd->clkdm_name) | |
129 | return ERR_PTR(-ENOENT); | |
130 | ||
131 | return cd; | |
132 | } | |
133 | ||
d459bfe0 | 134 | /* |
55ed9694 PW |
135 | * _autodep_lookup - resolve autodep clkdm names to clkdm pointers; store |
136 | * @autodep: struct clkdm_autodep * to resolve | |
d459bfe0 | 137 | * |
55ed9694 PW |
138 | * Resolve autodep clockdomain names to clockdomain pointers via |
139 | * clkdm_lookup() and store the pointers in the autodep structure. An | |
140 | * "autodep" is a clockdomain sleep/wakeup dependency that is | |
d459bfe0 PW |
141 | * automatically added and removed whenever clocks in the associated |
142 | * clockdomain are enabled or disabled (respectively) when the | |
143 | * clockdomain is in hardware-supervised mode. Meant to be called | |
144 | * once at clockdomain layer initialization, since these should remain | |
145 | * fixed for a particular architecture. No return value. | |
b170fbe1 PW |
146 | * |
147 | * XXX autodeps are deprecated and should be removed at the earliest | |
148 | * opportunity | |
d459bfe0 | 149 | */ |
55ed9694 | 150 | static void _autodep_lookup(struct clkdm_autodep *autodep) |
d459bfe0 | 151 | { |
55ed9694 | 152 | struct clockdomain *clkdm; |
d459bfe0 PW |
153 | |
154 | if (!autodep) | |
155 | return; | |
156 | ||
157 | if (!omap_chip_is(autodep->omap_chip)) | |
158 | return; | |
159 | ||
55ed9694 PW |
160 | clkdm = clkdm_lookup(autodep->clkdm.name); |
161 | if (!clkdm) { | |
162 | pr_err("clockdomain: autodeps: clockdomain %s does not exist\n", | |
163 | autodep->clkdm.name); | |
164 | clkdm = ERR_PTR(-ENOENT); | |
d459bfe0 | 165 | } |
55ed9694 | 166 | autodep->clkdm.ptr = clkdm; |
d459bfe0 PW |
167 | } |
168 | ||
169 | /* | |
170 | * _clkdm_add_autodeps - add auto sleepdeps/wkdeps to clkdm upon clock enable | |
171 | * @clkdm: struct clockdomain * | |
172 | * | |
173 | * Add the "autodep" sleep & wakeup dependencies to clockdomain 'clkdm' | |
174 | * in hardware-supervised mode. Meant to be called from clock framework | |
175 | * when a clock inside clockdomain 'clkdm' is enabled. No return value. | |
b170fbe1 PW |
176 | * |
177 | * XXX autodeps are deprecated and should be removed at the earliest | |
178 | * opportunity | |
d459bfe0 PW |
179 | */ |
180 | static void _clkdm_add_autodeps(struct clockdomain *clkdm) | |
181 | { | |
55ed9694 | 182 | struct clkdm_autodep *autodep; |
d459bfe0 | 183 | |
ad956160 PW |
184 | if (!autodeps) |
185 | return; | |
186 | ||
55ed9694 PW |
187 | for (autodep = autodeps; autodep->clkdm.ptr; autodep++) { |
188 | if (IS_ERR(autodep->clkdm.ptr)) | |
d459bfe0 PW |
189 | continue; |
190 | ||
d96df00d PW |
191 | if (!omap_chip_is(autodep->omap_chip)) |
192 | continue; | |
193 | ||
d459bfe0 | 194 | pr_debug("clockdomain: adding %s sleepdep/wkdep for " |
55ed9694 PW |
195 | "clkdm %s\n", autodep->clkdm.ptr->name, |
196 | clkdm->name); | |
d459bfe0 | 197 | |
55ed9694 PW |
198 | clkdm_add_sleepdep(clkdm, autodep->clkdm.ptr); |
199 | clkdm_add_wkdep(clkdm, autodep->clkdm.ptr); | |
d459bfe0 PW |
200 | } |
201 | } | |
202 | ||
203 | /* | |
204 | * _clkdm_add_autodeps - remove auto sleepdeps/wkdeps from clkdm | |
205 | * @clkdm: struct clockdomain * | |
206 | * | |
207 | * Remove the "autodep" sleep & wakeup dependencies from clockdomain 'clkdm' | |
208 | * in hardware-supervised mode. Meant to be called from clock framework | |
209 | * when a clock inside clockdomain 'clkdm' is disabled. No return value. | |
b170fbe1 PW |
210 | * |
211 | * XXX autodeps are deprecated and should be removed at the earliest | |
212 | * opportunity | |
d459bfe0 PW |
213 | */ |
214 | static void _clkdm_del_autodeps(struct clockdomain *clkdm) | |
215 | { | |
55ed9694 | 216 | struct clkdm_autodep *autodep; |
d459bfe0 | 217 | |
ad956160 PW |
218 | if (!autodeps) |
219 | return; | |
220 | ||
55ed9694 PW |
221 | for (autodep = autodeps; autodep->clkdm.ptr; autodep++) { |
222 | if (IS_ERR(autodep->clkdm.ptr)) | |
d459bfe0 PW |
223 | continue; |
224 | ||
d96df00d PW |
225 | if (!omap_chip_is(autodep->omap_chip)) |
226 | continue; | |
227 | ||
d459bfe0 | 228 | pr_debug("clockdomain: removing %s sleepdep/wkdep for " |
55ed9694 PW |
229 | "clkdm %s\n", autodep->clkdm.ptr->name, |
230 | clkdm->name); | |
d459bfe0 | 231 | |
55ed9694 PW |
232 | clkdm_del_sleepdep(clkdm, autodep->clkdm.ptr); |
233 | clkdm_del_wkdep(clkdm, autodep->clkdm.ptr); | |
d459bfe0 PW |
234 | } |
235 | } | |
236 | ||
b170fbe1 PW |
237 | /** |
238 | * _enable_hwsup - place a clockdomain into hardware-supervised idle | |
a0219fbd | 239 | * @clkdm: struct clockdomain * |
a0219fbd | 240 | * |
b170fbe1 PW |
241 | * Place the clockdomain into hardware-supervised idle mode. No return |
242 | * value. | |
243 | * | |
244 | * XXX Should this return an error if the clockdomain does not support | |
245 | * hardware-supervised idle mode? | |
246 | */ | |
247 | static void _enable_hwsup(struct clockdomain *clkdm) | |
248 | { | |
b170fbe1 | 249 | if (cpu_is_omap24xx()) |
55ae3507 PW |
250 | omap2xxx_cm_clkdm_enable_hwsup(clkdm->pwrdm.ptr->prcm_offs, |
251 | clkdm->clktrctrl_mask); | |
bd2122ca | 252 | else if (cpu_is_omap34xx()) |
55ae3507 PW |
253 | omap3xxx_cm_clkdm_enable_hwsup(clkdm->pwrdm.ptr->prcm_offs, |
254 | clkdm->clktrctrl_mask); | |
bd2122ca PW |
255 | else if (cpu_is_omap44xx()) |
256 | return omap4_cminst_clkdm_enable_hwsup(clkdm->prcm_partition, | |
257 | clkdm->cm_inst, | |
258 | clkdm->clkdm_offs); | |
b170fbe1 PW |
259 | else |
260 | BUG(); | |
b170fbe1 PW |
261 | } |
262 | ||
263 | /** | |
264 | * _disable_hwsup - place a clockdomain into software-supervised idle | |
265 | * @clkdm: struct clockdomain * | |
266 | * | |
267 | * Place the clockdomain @clkdm into software-supervised idle mode. | |
268 | * No return value. | |
269 | * | |
270 | * XXX Should this return an error if the clockdomain does not support | |
271 | * software-supervised idle mode? | |
a0219fbd | 272 | */ |
b170fbe1 | 273 | static void _disable_hwsup(struct clockdomain *clkdm) |
a0219fbd | 274 | { |
bd2122ca | 275 | if (cpu_is_omap24xx()) |
55ae3507 PW |
276 | omap2xxx_cm_clkdm_disable_hwsup(clkdm->pwrdm.ptr->prcm_offs, |
277 | clkdm->clktrctrl_mask); | |
bd2122ca | 278 | else if (cpu_is_omap34xx()) |
55ae3507 PW |
279 | omap3xxx_cm_clkdm_disable_hwsup(clkdm->pwrdm.ptr->prcm_offs, |
280 | clkdm->clktrctrl_mask); | |
bd2122ca PW |
281 | else if (cpu_is_omap44xx()) |
282 | return omap4_cminst_clkdm_disable_hwsup(clkdm->prcm_partition, | |
283 | clkdm->cm_inst, | |
284 | clkdm->clkdm_offs); | |
285 | else | |
a0219fbd | 286 | BUG(); |
a0219fbd | 287 | } |
d459bfe0 | 288 | |
d459bfe0 PW |
289 | /* Public functions */ |
290 | ||
291 | /** | |
292 | * clkdm_init - set up the clockdomain layer | |
293 | * @clkdms: optional pointer to an array of clockdomains to register | |
294 | * @init_autodeps: optional pointer to an array of autodeps to register | |
295 | * | |
296 | * Set up internal state. If a pointer to an array of clockdomains | |
f0271d65 PW |
297 | * @clkdms was supplied, loop through the list of clockdomains, |
298 | * register all that are available on the current platform. Similarly, | |
299 | * if a pointer to an array of clockdomain autodependencies | |
300 | * @init_autodeps was provided, register those. No return value. | |
d459bfe0 PW |
301 | */ |
302 | void clkdm_init(struct clockdomain **clkdms, | |
55ed9694 | 303 | struct clkdm_autodep *init_autodeps) |
d459bfe0 PW |
304 | { |
305 | struct clockdomain **c = NULL; | |
369d5614 | 306 | struct clockdomain *clkdm; |
55ed9694 | 307 | struct clkdm_autodep *autodep = NULL; |
d459bfe0 PW |
308 | |
309 | if (clkdms) | |
310 | for (c = clkdms; *c; c++) | |
e909d62a | 311 | _clkdm_register(*c); |
d459bfe0 | 312 | |
55ed9694 PW |
313 | autodeps = init_autodeps; |
314 | if (autodeps) | |
315 | for (autodep = autodeps; autodep->clkdm.ptr; autodep++) | |
316 | _autodep_lookup(autodep); | |
369d5614 PW |
317 | |
318 | /* | |
6f7f63cc PW |
319 | * Put all clockdomains into software-supervised mode; PM code |
320 | * should later enable hardware-supervised mode as appropriate | |
369d5614 PW |
321 | */ |
322 | list_for_each_entry(clkdm, &clkdm_list, node) { | |
6f7f63cc PW |
323 | if (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP) |
324 | omap2_clkdm_wakeup(clkdm); | |
325 | else if (clkdm->flags & CLKDM_CAN_DISABLE_AUTO) | |
326 | omap2_clkdm_deny_idle(clkdm); | |
327 | ||
328 | clkdm_clear_all_wkdeps(clkdm); | |
329 | clkdm_clear_all_sleepdeps(clkdm); | |
369d5614 | 330 | } |
d459bfe0 PW |
331 | } |
332 | ||
d459bfe0 PW |
333 | /** |
334 | * clkdm_lookup - look up a clockdomain by name, return a pointer | |
335 | * @name: name of clockdomain | |
336 | * | |
f0271d65 PW |
337 | * Find a registered clockdomain by its name @name. Returns a pointer |
338 | * to the struct clockdomain if found, or NULL otherwise. | |
d459bfe0 PW |
339 | */ |
340 | struct clockdomain *clkdm_lookup(const char *name) | |
341 | { | |
342 | struct clockdomain *clkdm, *temp_clkdm; | |
343 | ||
344 | if (!name) | |
345 | return NULL; | |
346 | ||
347 | clkdm = NULL; | |
348 | ||
d459bfe0 PW |
349 | list_for_each_entry(temp_clkdm, &clkdm_list, node) { |
350 | if (!strcmp(name, temp_clkdm->name)) { | |
351 | clkdm = temp_clkdm; | |
352 | break; | |
353 | } | |
354 | } | |
d459bfe0 PW |
355 | |
356 | return clkdm; | |
357 | } | |
358 | ||
359 | /** | |
360 | * clkdm_for_each - call function on each registered clockdomain | |
361 | * @fn: callback function * | |
362 | * | |
f0271d65 PW |
363 | * Call the supplied function @fn for each registered clockdomain. |
364 | * The callback function @fn can return anything but 0 to bail | |
d459bfe0 PW |
365 | * out early from the iterator. The callback function is called with |
366 | * the clkdm_mutex held, so no clockdomain structure manipulation | |
367 | * functions should be called from the callback, although hardware | |
368 | * clockdomain control functions are fine. Returns the last return | |
369 | * value of the callback function, which should be 0 for success or | |
370 | * anything else to indicate failure; or -EINVAL if the function pointer | |
371 | * is null. | |
372 | */ | |
a23456e9 PDS |
373 | int clkdm_for_each(int (*fn)(struct clockdomain *clkdm, void *user), |
374 | void *user) | |
d459bfe0 PW |
375 | { |
376 | struct clockdomain *clkdm; | |
377 | int ret = 0; | |
378 | ||
379 | if (!fn) | |
380 | return -EINVAL; | |
381 | ||
d459bfe0 | 382 | list_for_each_entry(clkdm, &clkdm_list, node) { |
a23456e9 | 383 | ret = (*fn)(clkdm, user); |
d459bfe0 PW |
384 | if (ret) |
385 | break; | |
386 | } | |
d459bfe0 PW |
387 | |
388 | return ret; | |
389 | } | |
390 | ||
391 | ||
e89087c9 PW |
392 | /** |
393 | * clkdm_get_pwrdm - return a ptr to the pwrdm that this clkdm resides in | |
394 | * @clkdm: struct clockdomain * | |
395 | * | |
396 | * Return a pointer to the struct powerdomain that the specified clockdomain | |
f0271d65 | 397 | * @clkdm exists in, or returns NULL if @clkdm is NULL. |
e89087c9 PW |
398 | */ |
399 | struct powerdomain *clkdm_get_pwrdm(struct clockdomain *clkdm) | |
400 | { | |
401 | if (!clkdm) | |
402 | return NULL; | |
403 | ||
5b74c676 | 404 | return clkdm->pwrdm.ptr; |
e89087c9 PW |
405 | } |
406 | ||
407 | ||
d459bfe0 PW |
408 | /* Hardware clockdomain control */ |
409 | ||
55ed9694 PW |
410 | /** |
411 | * clkdm_add_wkdep - add a wakeup dependency from clkdm2 to clkdm1 | |
412 | * @clkdm1: wake this struct clockdomain * up (dependent) | |
413 | * @clkdm2: when this struct clockdomain * wakes up (source) | |
414 | * | |
415 | * When the clockdomain represented by @clkdm2 wakes up, wake up | |
416 | * @clkdm1. Implemented in hardware on the OMAP, this feature is | |
417 | * designed to reduce wakeup latency of the dependent clockdomain @clkdm1. | |
418 | * Returns -EINVAL if presented with invalid clockdomain pointers, | |
419 | * -ENOENT if @clkdm2 cannot wake up clkdm1 in hardware, or 0 upon | |
420 | * success. | |
421 | */ | |
422 | int clkdm_add_wkdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2) | |
423 | { | |
424 | struct clkdm_dep *cd; | |
425 | ||
56bc78d4 PW |
426 | if (!cpu_is_omap24xx() && !cpu_is_omap34xx()) { |
427 | pr_err("clockdomain: %s/%s: %s: not yet implemented\n", | |
428 | clkdm1->name, clkdm2->name, __func__); | |
429 | return -EINVAL; | |
430 | } | |
431 | ||
55ed9694 PW |
432 | if (!clkdm1 || !clkdm2) |
433 | return -EINVAL; | |
434 | ||
435 | cd = _clkdm_deps_lookup(clkdm2, clkdm1->wkdep_srcs); | |
436 | if (IS_ERR(cd)) { | |
437 | pr_debug("clockdomain: hardware cannot set/clear wake up of " | |
438 | "%s when %s wakes up\n", clkdm1->name, clkdm2->name); | |
439 | return PTR_ERR(cd); | |
440 | } | |
441 | ||
369d5614 PW |
442 | if (atomic_inc_return(&cd->wkdep_usecount) == 1) { |
443 | pr_debug("clockdomain: hardware will wake up %s when %s wakes " | |
444 | "up\n", clkdm1->name, clkdm2->name); | |
55ed9694 | 445 | |
c4d7e58f | 446 | omap2_prm_set_mod_reg_bits((1 << clkdm2->dep_bit), |
369d5614 PW |
447 | clkdm1->pwrdm.ptr->prcm_offs, PM_WKDEP); |
448 | } | |
55ed9694 PW |
449 | |
450 | return 0; | |
451 | } | |
452 | ||
453 | /** | |
454 | * clkdm_del_wkdep - remove a wakeup dependency from clkdm2 to clkdm1 | |
455 | * @clkdm1: wake this struct clockdomain * up (dependent) | |
456 | * @clkdm2: when this struct clockdomain * wakes up (source) | |
457 | * | |
458 | * Remove a wakeup dependency causing @clkdm1 to wake up when @clkdm2 | |
459 | * wakes up. Returns -EINVAL if presented with invalid clockdomain | |
460 | * pointers, -ENOENT if @clkdm2 cannot wake up clkdm1 in hardware, or | |
461 | * 0 upon success. | |
462 | */ | |
463 | int clkdm_del_wkdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2) | |
464 | { | |
465 | struct clkdm_dep *cd; | |
466 | ||
56bc78d4 PW |
467 | if (!cpu_is_omap24xx() && !cpu_is_omap34xx()) { |
468 | pr_err("clockdomain: %s/%s: %s: not yet implemented\n", | |
469 | clkdm1->name, clkdm2->name, __func__); | |
470 | return -EINVAL; | |
471 | } | |
472 | ||
55ed9694 PW |
473 | if (!clkdm1 || !clkdm2) |
474 | return -EINVAL; | |
475 | ||
476 | cd = _clkdm_deps_lookup(clkdm2, clkdm1->wkdep_srcs); | |
477 | if (IS_ERR(cd)) { | |
478 | pr_debug("clockdomain: hardware cannot set/clear wake up of " | |
479 | "%s when %s wakes up\n", clkdm1->name, clkdm2->name); | |
480 | return PTR_ERR(cd); | |
481 | } | |
482 | ||
369d5614 PW |
483 | if (atomic_dec_return(&cd->wkdep_usecount) == 0) { |
484 | pr_debug("clockdomain: hardware will no longer wake up %s " | |
485 | "after %s wakes up\n", clkdm1->name, clkdm2->name); | |
55ed9694 | 486 | |
c4d7e58f | 487 | omap2_prm_clear_mod_reg_bits((1 << clkdm2->dep_bit), |
369d5614 PW |
488 | clkdm1->pwrdm.ptr->prcm_offs, PM_WKDEP); |
489 | } | |
55ed9694 PW |
490 | |
491 | return 0; | |
492 | } | |
493 | ||
494 | /** | |
495 | * clkdm_read_wkdep - read wakeup dependency state from clkdm2 to clkdm1 | |
496 | * @clkdm1: wake this struct clockdomain * up (dependent) | |
497 | * @clkdm2: when this struct clockdomain * wakes up (source) | |
498 | * | |
499 | * Return 1 if a hardware wakeup dependency exists wherein @clkdm1 will be | |
500 | * awoken when @clkdm2 wakes up; 0 if dependency is not set; -EINVAL | |
501 | * if either clockdomain pointer is invalid; or -ENOENT if the hardware | |
502 | * is incapable. | |
503 | * | |
504 | * REVISIT: Currently this function only represents software-controllable | |
505 | * wakeup dependencies. Wakeup dependencies fixed in hardware are not | |
506 | * yet handled here. | |
507 | */ | |
508 | int clkdm_read_wkdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2) | |
509 | { | |
510 | struct clkdm_dep *cd; | |
511 | ||
512 | if (!clkdm1 || !clkdm2) | |
513 | return -EINVAL; | |
514 | ||
56bc78d4 PW |
515 | if (!cpu_is_omap24xx() && !cpu_is_omap34xx()) { |
516 | pr_err("clockdomain: %s/%s: %s: not yet implemented\n", | |
517 | clkdm1->name, clkdm2->name, __func__); | |
518 | return -EINVAL; | |
519 | } | |
520 | ||
55ed9694 PW |
521 | cd = _clkdm_deps_lookup(clkdm2, clkdm1->wkdep_srcs); |
522 | if (IS_ERR(cd)) { | |
523 | pr_debug("clockdomain: hardware cannot set/clear wake up of " | |
524 | "%s when %s wakes up\n", clkdm1->name, clkdm2->name); | |
525 | return PTR_ERR(cd); | |
526 | } | |
527 | ||
369d5614 | 528 | /* XXX It's faster to return the atomic wkdep_usecount */ |
c4d7e58f | 529 | return omap2_prm_read_mod_bits_shift(clkdm1->pwrdm.ptr->prcm_offs, PM_WKDEP, |
55ed9694 PW |
530 | (1 << clkdm2->dep_bit)); |
531 | } | |
532 | ||
369d5614 PW |
533 | /** |
534 | * clkdm_clear_all_wkdeps - remove all wakeup dependencies from target clkdm | |
535 | * @clkdm: struct clockdomain * to remove all wakeup dependencies from | |
536 | * | |
537 | * Remove all inter-clockdomain wakeup dependencies that could cause | |
538 | * @clkdm to wake. Intended to be used during boot to initialize the | |
539 | * PRCM to a known state, after all clockdomains are put into swsup idle | |
540 | * and woken up. Returns -EINVAL if @clkdm pointer is invalid, or | |
541 | * 0 upon success. | |
542 | */ | |
543 | int clkdm_clear_all_wkdeps(struct clockdomain *clkdm) | |
544 | { | |
545 | struct clkdm_dep *cd; | |
546 | u32 mask = 0; | |
547 | ||
56bc78d4 PW |
548 | if (!cpu_is_omap24xx() && !cpu_is_omap34xx()) { |
549 | pr_err("clockdomain: %s: %s: not yet implemented\n", | |
550 | clkdm->name, __func__); | |
551 | return -EINVAL; | |
552 | } | |
553 | ||
369d5614 PW |
554 | if (!clkdm) |
555 | return -EINVAL; | |
556 | ||
557 | for (cd = clkdm->wkdep_srcs; cd && cd->clkdm_name; cd++) { | |
558 | if (!omap_chip_is(cd->omap_chip)) | |
559 | continue; | |
560 | ||
6f7f63cc PW |
561 | if (!cd->clkdm && cd->clkdm_name) |
562 | cd->clkdm = _clkdm_lookup(cd->clkdm_name); | |
563 | ||
369d5614 PW |
564 | /* PRM accesses are slow, so minimize them */ |
565 | mask |= 1 << cd->clkdm->dep_bit; | |
566 | atomic_set(&cd->wkdep_usecount, 0); | |
567 | } | |
568 | ||
c4d7e58f | 569 | omap2_prm_clear_mod_reg_bits(mask, clkdm->pwrdm.ptr->prcm_offs, PM_WKDEP); |
369d5614 PW |
570 | |
571 | return 0; | |
572 | } | |
573 | ||
55ed9694 PW |
574 | /** |
575 | * clkdm_add_sleepdep - add a sleep dependency from clkdm2 to clkdm1 | |
576 | * @clkdm1: prevent this struct clockdomain * from sleeping (dependent) | |
577 | * @clkdm2: when this struct clockdomain * is active (source) | |
578 | * | |
579 | * Prevent @clkdm1 from automatically going inactive (and then to | |
580 | * retention or off) if @clkdm2 is active. Returns -EINVAL if | |
581 | * presented with invalid clockdomain pointers or called on a machine | |
582 | * that does not support software-configurable hardware sleep | |
583 | * dependencies, -ENOENT if the specified dependency cannot be set in | |
584 | * hardware, or 0 upon success. | |
585 | */ | |
586 | int clkdm_add_sleepdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2) | |
587 | { | |
588 | struct clkdm_dep *cd; | |
589 | ||
590 | if (!cpu_is_omap34xx()) | |
591 | return -EINVAL; | |
592 | ||
593 | if (!clkdm1 || !clkdm2) | |
594 | return -EINVAL; | |
595 | ||
596 | cd = _clkdm_deps_lookup(clkdm2, clkdm1->sleepdep_srcs); | |
597 | if (IS_ERR(cd)) { | |
598 | pr_debug("clockdomain: hardware cannot set/clear sleep " | |
599 | "dependency affecting %s from %s\n", clkdm1->name, | |
600 | clkdm2->name); | |
601 | return PTR_ERR(cd); | |
602 | } | |
603 | ||
369d5614 PW |
604 | if (atomic_inc_return(&cd->sleepdep_usecount) == 1) { |
605 | pr_debug("clockdomain: will prevent %s from sleeping if %s " | |
606 | "is active\n", clkdm1->name, clkdm2->name); | |
55ed9694 | 607 | |
c4d7e58f | 608 | omap2_cm_set_mod_reg_bits((1 << clkdm2->dep_bit), |
369d5614 PW |
609 | clkdm1->pwrdm.ptr->prcm_offs, |
610 | OMAP3430_CM_SLEEPDEP); | |
611 | } | |
55ed9694 PW |
612 | |
613 | return 0; | |
614 | } | |
615 | ||
616 | /** | |
617 | * clkdm_del_sleepdep - remove a sleep dependency from clkdm2 to clkdm1 | |
618 | * @clkdm1: prevent this struct clockdomain * from sleeping (dependent) | |
619 | * @clkdm2: when this struct clockdomain * is active (source) | |
620 | * | |
621 | * Allow @clkdm1 to automatically go inactive (and then to retention or | |
622 | * off), independent of the activity state of @clkdm2. Returns -EINVAL | |
623 | * if presented with invalid clockdomain pointers or called on a machine | |
624 | * that does not support software-configurable hardware sleep dependencies, | |
625 | * -ENOENT if the specified dependency cannot be cleared in hardware, or | |
626 | * 0 upon success. | |
627 | */ | |
628 | int clkdm_del_sleepdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2) | |
629 | { | |
630 | struct clkdm_dep *cd; | |
631 | ||
632 | if (!cpu_is_omap34xx()) | |
633 | return -EINVAL; | |
634 | ||
635 | if (!clkdm1 || !clkdm2) | |
636 | return -EINVAL; | |
637 | ||
638 | cd = _clkdm_deps_lookup(clkdm2, clkdm1->sleepdep_srcs); | |
639 | if (IS_ERR(cd)) { | |
640 | pr_debug("clockdomain: hardware cannot set/clear sleep " | |
641 | "dependency affecting %s from %s\n", clkdm1->name, | |
642 | clkdm2->name); | |
643 | return PTR_ERR(cd); | |
644 | } | |
645 | ||
369d5614 PW |
646 | if (atomic_dec_return(&cd->sleepdep_usecount) == 0) { |
647 | pr_debug("clockdomain: will no longer prevent %s from " | |
648 | "sleeping if %s is active\n", clkdm1->name, | |
649 | clkdm2->name); | |
55ed9694 | 650 | |
c4d7e58f | 651 | omap2_cm_clear_mod_reg_bits((1 << clkdm2->dep_bit), |
369d5614 PW |
652 | clkdm1->pwrdm.ptr->prcm_offs, |
653 | OMAP3430_CM_SLEEPDEP); | |
654 | } | |
55ed9694 PW |
655 | |
656 | return 0; | |
657 | } | |
658 | ||
659 | /** | |
660 | * clkdm_read_sleepdep - read sleep dependency state from clkdm2 to clkdm1 | |
661 | * @clkdm1: prevent this struct clockdomain * from sleeping (dependent) | |
662 | * @clkdm2: when this struct clockdomain * is active (source) | |
663 | * | |
664 | * Return 1 if a hardware sleep dependency exists wherein @clkdm1 will | |
665 | * not be allowed to automatically go inactive if @clkdm2 is active; | |
666 | * 0 if @clkdm1's automatic power state inactivity transition is independent | |
667 | * of @clkdm2's; -EINVAL if either clockdomain pointer is invalid or called | |
668 | * on a machine that does not support software-configurable hardware sleep | |
669 | * dependencies; or -ENOENT if the hardware is incapable. | |
670 | * | |
671 | * REVISIT: Currently this function only represents software-controllable | |
672 | * sleep dependencies. Sleep dependencies fixed in hardware are not | |
673 | * yet handled here. | |
674 | */ | |
675 | int clkdm_read_sleepdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2) | |
676 | { | |
677 | struct clkdm_dep *cd; | |
678 | ||
679 | if (!cpu_is_omap34xx()) | |
680 | return -EINVAL; | |
681 | ||
682 | if (!clkdm1 || !clkdm2) | |
683 | return -EINVAL; | |
684 | ||
685 | cd = _clkdm_deps_lookup(clkdm2, clkdm1->sleepdep_srcs); | |
686 | if (IS_ERR(cd)) { | |
687 | pr_debug("clockdomain: hardware cannot set/clear sleep " | |
688 | "dependency affecting %s from %s\n", clkdm1->name, | |
689 | clkdm2->name); | |
690 | return PTR_ERR(cd); | |
691 | } | |
692 | ||
369d5614 | 693 | /* XXX It's faster to return the atomic sleepdep_usecount */ |
c4d7e58f | 694 | return omap2_prm_read_mod_bits_shift(clkdm1->pwrdm.ptr->prcm_offs, |
55ed9694 PW |
695 | OMAP3430_CM_SLEEPDEP, |
696 | (1 << clkdm2->dep_bit)); | |
697 | } | |
698 | ||
369d5614 PW |
699 | /** |
700 | * clkdm_clear_all_sleepdeps - remove all sleep dependencies from target clkdm | |
701 | * @clkdm: struct clockdomain * to remove all sleep dependencies from | |
702 | * | |
703 | * Remove all inter-clockdomain sleep dependencies that could prevent | |
704 | * @clkdm from idling. Intended to be used during boot to initialize the | |
705 | * PRCM to a known state, after all clockdomains are put into swsup idle | |
706 | * and woken up. Returns -EINVAL if @clkdm pointer is invalid, or | |
707 | * 0 upon success. | |
708 | */ | |
709 | int clkdm_clear_all_sleepdeps(struct clockdomain *clkdm) | |
710 | { | |
711 | struct clkdm_dep *cd; | |
712 | u32 mask = 0; | |
713 | ||
714 | if (!cpu_is_omap34xx()) | |
715 | return -EINVAL; | |
716 | ||
717 | if (!clkdm) | |
718 | return -EINVAL; | |
719 | ||
720 | for (cd = clkdm->sleepdep_srcs; cd && cd->clkdm_name; cd++) { | |
721 | if (!omap_chip_is(cd->omap_chip)) | |
722 | continue; | |
723 | ||
6f7f63cc PW |
724 | if (!cd->clkdm && cd->clkdm_name) |
725 | cd->clkdm = _clkdm_lookup(cd->clkdm_name); | |
726 | ||
369d5614 PW |
727 | /* PRM accesses are slow, so minimize them */ |
728 | mask |= 1 << cd->clkdm->dep_bit; | |
729 | atomic_set(&cd->sleepdep_usecount, 0); | |
730 | } | |
731 | ||
c4d7e58f | 732 | omap2_prm_clear_mod_reg_bits(mask, clkdm->pwrdm.ptr->prcm_offs, |
369d5614 PW |
733 | OMAP3430_CM_SLEEPDEP); |
734 | ||
735 | return 0; | |
736 | } | |
55ed9694 | 737 | |
d459bfe0 PW |
738 | /** |
739 | * omap2_clkdm_sleep - force clockdomain sleep transition | |
740 | * @clkdm: struct clockdomain * | |
741 | * | |
742 | * Instruct the CM to force a sleep transition on the specified | |
f0271d65 | 743 | * clockdomain @clkdm. Returns -EINVAL if @clkdm is NULL or if |
d459bfe0 PW |
744 | * clockdomain does not support software-initiated sleep; 0 upon |
745 | * success. | |
746 | */ | |
747 | int omap2_clkdm_sleep(struct clockdomain *clkdm) | |
748 | { | |
749 | if (!clkdm) | |
750 | return -EINVAL; | |
751 | ||
752 | if (!(clkdm->flags & CLKDM_CAN_FORCE_SLEEP)) { | |
753 | pr_debug("clockdomain: %s does not support forcing " | |
754 | "sleep via software\n", clkdm->name); | |
755 | return -EINVAL; | |
756 | } | |
757 | ||
758 | pr_debug("clockdomain: forcing sleep on %s\n", clkdm->name); | |
759 | ||
760 | if (cpu_is_omap24xx()) { | |
761 | ||
c4d7e58f | 762 | omap2_cm_set_mod_reg_bits(OMAP24XX_FORCESTATE_MASK, |
37903009 | 763 | clkdm->pwrdm.ptr->prcm_offs, OMAP2_PM_PWSTCTRL); |
d459bfe0 | 764 | |
bd2122ca | 765 | } else if (cpu_is_omap34xx()) { |
d459bfe0 | 766 | |
55ae3507 PW |
767 | omap3xxx_cm_clkdm_force_sleep(clkdm->pwrdm.ptr->prcm_offs, |
768 | clkdm->clktrctrl_mask); | |
d459bfe0 | 769 | |
bd2122ca PW |
770 | } else if (cpu_is_omap44xx()) { |
771 | ||
772 | omap4_cminst_clkdm_force_sleep(clkdm->prcm_partition, | |
773 | clkdm->cm_inst, | |
774 | clkdm->clkdm_offs); | |
775 | ||
d459bfe0 PW |
776 | } else { |
777 | BUG(); | |
778 | }; | |
779 | ||
780 | return 0; | |
781 | } | |
782 | ||
783 | /** | |
784 | * omap2_clkdm_wakeup - force clockdomain wakeup transition | |
785 | * @clkdm: struct clockdomain * | |
786 | * | |
787 | * Instruct the CM to force a wakeup transition on the specified | |
f0271d65 | 788 | * clockdomain @clkdm. Returns -EINVAL if @clkdm is NULL or if the |
d459bfe0 PW |
789 | * clockdomain does not support software-controlled wakeup; 0 upon |
790 | * success. | |
791 | */ | |
792 | int omap2_clkdm_wakeup(struct clockdomain *clkdm) | |
793 | { | |
794 | if (!clkdm) | |
795 | return -EINVAL; | |
796 | ||
797 | if (!(clkdm->flags & CLKDM_CAN_FORCE_WAKEUP)) { | |
798 | pr_debug("clockdomain: %s does not support forcing " | |
799 | "wakeup via software\n", clkdm->name); | |
800 | return -EINVAL; | |
801 | } | |
802 | ||
803 | pr_debug("clockdomain: forcing wakeup on %s\n", clkdm->name); | |
804 | ||
805 | if (cpu_is_omap24xx()) { | |
806 | ||
c4d7e58f | 807 | omap2_cm_clear_mod_reg_bits(OMAP24XX_FORCESTATE_MASK, |
37903009 | 808 | clkdm->pwrdm.ptr->prcm_offs, OMAP2_PM_PWSTCTRL); |
d459bfe0 | 809 | |
bd2122ca | 810 | } else if (cpu_is_omap34xx()) { |
d459bfe0 | 811 | |
55ae3507 PW |
812 | omap3xxx_cm_clkdm_force_wakeup(clkdm->pwrdm.ptr->prcm_offs, |
813 | clkdm->clktrctrl_mask); | |
d459bfe0 | 814 | |
bd2122ca PW |
815 | } else if (cpu_is_omap44xx()) { |
816 | ||
817 | omap4_cminst_clkdm_force_wakeup(clkdm->prcm_partition, | |
818 | clkdm->cm_inst, | |
819 | clkdm->clkdm_offs); | |
820 | ||
d459bfe0 PW |
821 | } else { |
822 | BUG(); | |
823 | }; | |
824 | ||
825 | return 0; | |
826 | } | |
827 | ||
828 | /** | |
829 | * omap2_clkdm_allow_idle - enable hwsup idle transitions for clkdm | |
830 | * @clkdm: struct clockdomain * | |
831 | * | |
f0271d65 | 832 | * Allow the hardware to automatically switch the clockdomain @clkdm into |
d459bfe0 PW |
833 | * active or idle states, as needed by downstream clocks. If the |
834 | * clockdomain has any downstream clocks enabled in the clock | |
835 | * framework, wkdep/sleepdep autodependencies are added; this is so | |
836 | * device drivers can read and write to the device. No return value. | |
837 | */ | |
838 | void omap2_clkdm_allow_idle(struct clockdomain *clkdm) | |
839 | { | |
d459bfe0 PW |
840 | if (!clkdm) |
841 | return; | |
842 | ||
843 | if (!(clkdm->flags & CLKDM_CAN_ENABLE_AUTO)) { | |
844 | pr_debug("clock: automatic idle transitions cannot be enabled " | |
845 | "on clockdomain %s\n", clkdm->name); | |
846 | return; | |
847 | } | |
848 | ||
849 | pr_debug("clockdomain: enabling automatic idle transitions for %s\n", | |
850 | clkdm->name); | |
851 | ||
91808a81 AP |
852 | /* |
853 | * XXX This should be removed once TI adds wakeup/sleep | |
854 | * dependency code and data for OMAP4. | |
855 | */ | |
856 | if (cpu_is_omap44xx()) { | |
56bc78d4 | 857 | pr_err("clockdomain: %s: OMAP4 wakeup/sleep dependency support: not yet implemented\n", clkdm->name); |
91808a81 AP |
858 | } else { |
859 | if (atomic_read(&clkdm->usecount) > 0) | |
860 | _clkdm_add_autodeps(clkdm); | |
861 | } | |
d459bfe0 | 862 | |
b170fbe1 | 863 | _enable_hwsup(clkdm); |
ba20bb12 PDS |
864 | |
865 | pwrdm_clkdm_state_switch(clkdm); | |
d459bfe0 PW |
866 | } |
867 | ||
868 | /** | |
869 | * omap2_clkdm_deny_idle - disable hwsup idle transitions for clkdm | |
870 | * @clkdm: struct clockdomain * | |
871 | * | |
872 | * Prevent the hardware from automatically switching the clockdomain | |
f0271d65 PW |
873 | * @clkdm into inactive or idle states. If the clockdomain has |
874 | * downstream clocks enabled in the clock framework, wkdep/sleepdep | |
d459bfe0 PW |
875 | * autodependencies are removed. No return value. |
876 | */ | |
877 | void omap2_clkdm_deny_idle(struct clockdomain *clkdm) | |
878 | { | |
d459bfe0 PW |
879 | if (!clkdm) |
880 | return; | |
881 | ||
882 | if (!(clkdm->flags & CLKDM_CAN_DISABLE_AUTO)) { | |
883 | pr_debug("clockdomain: automatic idle transitions cannot be " | |
884 | "disabled on %s\n", clkdm->name); | |
885 | return; | |
886 | } | |
887 | ||
888 | pr_debug("clockdomain: disabling automatic idle transitions for %s\n", | |
889 | clkdm->name); | |
890 | ||
b170fbe1 | 891 | _disable_hwsup(clkdm); |
d459bfe0 | 892 | |
91808a81 AP |
893 | /* |
894 | * XXX This should be removed once TI adds wakeup/sleep | |
895 | * dependency code and data for OMAP4. | |
896 | */ | |
897 | if (cpu_is_omap44xx()) { | |
56bc78d4 | 898 | pr_err("clockdomain: %s: OMAP4 wakeup/sleep dependency support: not yet implemented\n", clkdm->name); |
91808a81 AP |
899 | } else { |
900 | if (atomic_read(&clkdm->usecount) > 0) | |
901 | _clkdm_del_autodeps(clkdm); | |
902 | } | |
d459bfe0 PW |
903 | } |
904 | ||
905 | ||
906 | /* Clockdomain-to-clock framework interface code */ | |
907 | ||
908 | /** | |
909 | * omap2_clkdm_clk_enable - add an enabled downstream clock to this clkdm | |
910 | * @clkdm: struct clockdomain * | |
911 | * @clk: struct clk * of the enabled downstream clock | |
912 | * | |
f0271d65 PW |
913 | * Increment the usecount of the clockdomain @clkdm and ensure that it |
914 | * is awake before @clk is enabled. Intended to be called by | |
915 | * clk_enable() code. If the clockdomain is in software-supervised | |
916 | * idle mode, force the clockdomain to wake. If the clockdomain is in | |
917 | * hardware-supervised idle mode, add clkdm-pwrdm autodependencies, to | |
918 | * ensure that devices in the clockdomain can be read from/written to | |
919 | * by on-chip processors. Returns -EINVAL if passed null pointers; | |
920 | * returns 0 upon success or if the clockdomain is in hwsup idle mode. | |
d459bfe0 PW |
921 | */ |
922 | int omap2_clkdm_clk_enable(struct clockdomain *clkdm, struct clk *clk) | |
923 | { | |
55ae3507 | 924 | bool hwsup = false; |
d459bfe0 PW |
925 | |
926 | /* | |
927 | * XXX Rewrite this code to maintain a list of enabled | |
928 | * downstream clocks for debugging purposes? | |
929 | */ | |
930 | ||
30962d9d | 931 | if (!clkdm || !clk) |
d459bfe0 PW |
932 | return -EINVAL; |
933 | ||
934 | if (atomic_inc_return(&clkdm->usecount) > 1) | |
935 | return 0; | |
936 | ||
937 | /* Clockdomain now has one enabled downstream clock */ | |
938 | ||
939 | pr_debug("clockdomain: clkdm %s: clk %s now enabled\n", clkdm->name, | |
940 | clk->name); | |
941 | ||
55ae3507 | 942 | if (cpu_is_omap24xx() || cpu_is_omap34xx()) { |
30962d9d | 943 | |
55ae3507 PW |
944 | if (!clkdm->clktrctrl_mask) |
945 | return 0; | |
946 | ||
947 | hwsup = omap2_cm_is_clkdm_in_hwsup(clkdm->pwrdm.ptr->prcm_offs, | |
948 | clkdm->clktrctrl_mask); | |
949 | ||
950 | } else if (cpu_is_omap44xx()) { | |
951 | ||
952 | hwsup = omap4_cminst_is_clkdm_in_hwsup(clkdm->prcm_partition, | |
953 | clkdm->cm_inst, | |
954 | clkdm->clkdm_offs); | |
d459bfe0 | 955 | |
55ae3507 PW |
956 | } |
957 | ||
958 | if (hwsup) { | |
a0219fbd | 959 | /* Disable HW transitions when we are changing deps */ |
b170fbe1 | 960 | _disable_hwsup(clkdm); |
d459bfe0 | 961 | _clkdm_add_autodeps(clkdm); |
b170fbe1 | 962 | _enable_hwsup(clkdm); |
a0219fbd | 963 | } else { |
d459bfe0 | 964 | omap2_clkdm_wakeup(clkdm); |
a0219fbd | 965 | } |
d459bfe0 | 966 | |
054ce503 | 967 | pwrdm_wait_transition(clkdm->pwrdm.ptr); |
fe617af7 | 968 | pwrdm_clkdm_state_switch(clkdm); |
054ce503 | 969 | |
d459bfe0 PW |
970 | return 0; |
971 | } | |
972 | ||
973 | /** | |
974 | * omap2_clkdm_clk_disable - remove an enabled downstream clock from this clkdm | |
975 | * @clkdm: struct clockdomain * | |
976 | * @clk: struct clk * of the disabled downstream clock | |
977 | * | |
f0271d65 PW |
978 | * Decrement the usecount of this clockdomain @clkdm when @clk is |
979 | * disabled. Intended to be called by clk_disable() code. If the | |
980 | * clockdomain usecount goes to 0, put the clockdomain to sleep | |
981 | * (software-supervised mode) or remove the clkdm autodependencies | |
982 | * (hardware-supervised mode). Returns -EINVAL if passed null | |
983 | * pointers; -ERANGE if the @clkdm usecount underflows and debugging | |
984 | * is enabled; or returns 0 upon success or if the clockdomain is in | |
985 | * hwsup idle mode. | |
d459bfe0 PW |
986 | */ |
987 | int omap2_clkdm_clk_disable(struct clockdomain *clkdm, struct clk *clk) | |
988 | { | |
55ae3507 | 989 | bool hwsup = false; |
d459bfe0 PW |
990 | |
991 | /* | |
992 | * XXX Rewrite this code to maintain a list of enabled | |
993 | * downstream clocks for debugging purposes? | |
994 | */ | |
995 | ||
30962d9d | 996 | if (!clkdm || !clk) |
d459bfe0 PW |
997 | return -EINVAL; |
998 | ||
999 | #ifdef DEBUG | |
1000 | if (atomic_read(&clkdm->usecount) == 0) { | |
1001 | WARN_ON(1); /* underflow */ | |
1002 | return -ERANGE; | |
1003 | } | |
1004 | #endif | |
1005 | ||
1006 | if (atomic_dec_return(&clkdm->usecount) > 0) | |
1007 | return 0; | |
1008 | ||
1009 | /* All downstream clocks of this clockdomain are now disabled */ | |
1010 | ||
1011 | pr_debug("clockdomain: clkdm %s: clk %s now disabled\n", clkdm->name, | |
1012 | clk->name); | |
1013 | ||
55ae3507 PW |
1014 | if (cpu_is_omap24xx() || cpu_is_omap34xx()) { |
1015 | ||
1016 | if (!clkdm->clktrctrl_mask) | |
1017 | return 0; | |
1018 | ||
1019 | hwsup = omap2_cm_is_clkdm_in_hwsup(clkdm->pwrdm.ptr->prcm_offs, | |
1020 | clkdm->clktrctrl_mask); | |
30962d9d | 1021 | |
55ae3507 PW |
1022 | } else if (cpu_is_omap44xx()) { |
1023 | ||
1024 | hwsup = omap4_cminst_is_clkdm_in_hwsup(clkdm->prcm_partition, | |
1025 | clkdm->cm_inst, | |
1026 | clkdm->clkdm_offs); | |
1027 | ||
1028 | } | |
d459bfe0 | 1029 | |
55ae3507 | 1030 | if (hwsup) { |
a0219fbd | 1031 | /* Disable HW transitions when we are changing deps */ |
b170fbe1 | 1032 | _disable_hwsup(clkdm); |
d459bfe0 | 1033 | _clkdm_del_autodeps(clkdm); |
b170fbe1 | 1034 | _enable_hwsup(clkdm); |
a0219fbd | 1035 | } else { |
d459bfe0 | 1036 | omap2_clkdm_sleep(clkdm); |
a0219fbd | 1037 | } |
d459bfe0 | 1038 | |
fe617af7 PDS |
1039 | pwrdm_clkdm_state_switch(clkdm); |
1040 | ||
d459bfe0 PW |
1041 | return 0; |
1042 | } | |
1043 |