Commit | Line | Data |
---|---|---|
d459bfe0 | 1 | /* |
8a3ddc75 | 2 | * OMAP2/3/4 clockdomain framework functions |
d459bfe0 | 3 | * |
91808a81 AP |
4 | * Copyright (C) 2008-2010 Texas Instruments, Inc. |
5 | * Copyright (C) 2008-2010 Nokia Corporation | |
d459bfe0 PW |
6 | * |
7 | * Written by Paul Walmsley and Jouni Högander | |
8a3ddc75 | 8 | * Added OMAP4 specific support by Abhijit Pagare <abhijitpagare@ti.com> |
d459bfe0 PW |
9 | * |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License version 2 as | |
12 | * published by the Free Software Foundation. | |
13 | */ | |
33903eb5 | 14 | #undef DEBUG |
d459bfe0 | 15 | |
d459bfe0 PW |
16 | #include <linux/kernel.h> |
17 | #include <linux/device.h> | |
18 | #include <linux/list.h> | |
19 | #include <linux/errno.h> | |
20 | #include <linux/delay.h> | |
21 | #include <linux/clk.h> | |
22 | #include <linux/limits.h> | |
5b74c676 | 23 | #include <linux/err.h> |
d459bfe0 PW |
24 | |
25 | #include <linux/io.h> | |
26 | ||
27 | #include <linux/bitops.h> | |
28 | ||
59fb659b | 29 | #include "prm2xxx_3xxx.h" |
d459bfe0 | 30 | #include "prm-regbits-24xx.h" |
59fb659b | 31 | #include "cm2xxx_3xxx.h" |
d459bfe0 | 32 | |
55ed9694 | 33 | #include <plat/clock.h> |
ce491cf8 TL |
34 | #include <plat/powerdomain.h> |
35 | #include <plat/clockdomain.h> | |
55ed9694 | 36 | #include <plat/prcm.h> |
d459bfe0 PW |
37 | |
38 | /* clkdm_list contains all registered struct clockdomains */ | |
39 | static LIST_HEAD(clkdm_list); | |
40 | ||
55ed9694 PW |
41 | /* array of clockdomain deps to be added/removed when clkdm in hwsup mode */ |
42 | static struct clkdm_autodep *autodeps; | |
d459bfe0 PW |
43 | |
44 | ||
45 | /* Private functions */ | |
46 | ||
55ed9694 PW |
47 | static struct clockdomain *_clkdm_lookup(const char *name) |
48 | { | |
49 | struct clockdomain *clkdm, *temp_clkdm; | |
50 | ||
51 | if (!name) | |
52 | return NULL; | |
53 | ||
54 | clkdm = NULL; | |
55 | ||
56 | list_for_each_entry(temp_clkdm, &clkdm_list, node) { | |
57 | if (!strcmp(name, temp_clkdm->name)) { | |
58 | clkdm = temp_clkdm; | |
59 | break; | |
60 | } | |
61 | } | |
62 | ||
63 | return clkdm; | |
64 | } | |
65 | ||
e909d62a PW |
66 | /** |
67 | * _clkdm_register - register a clockdomain | |
68 | * @clkdm: struct clockdomain * to register | |
69 | * | |
70 | * Adds a clockdomain to the internal clockdomain list. | |
71 | * Returns -EINVAL if given a null pointer, -EEXIST if a clockdomain is | |
72 | * already registered by the provided name, or 0 upon success. | |
73 | */ | |
74 | static int _clkdm_register(struct clockdomain *clkdm) | |
75 | { | |
76 | struct powerdomain *pwrdm; | |
77 | ||
78 | if (!clkdm || !clkdm->name) | |
79 | return -EINVAL; | |
80 | ||
81 | if (!omap_chip_is(clkdm->omap_chip)) | |
82 | return -EINVAL; | |
83 | ||
84 | pwrdm = pwrdm_lookup(clkdm->pwrdm.name); | |
85 | if (!pwrdm) { | |
86 | pr_err("clockdomain: %s: powerdomain %s does not exist\n", | |
87 | clkdm->name, clkdm->pwrdm.name); | |
88 | return -EINVAL; | |
89 | } | |
90 | clkdm->pwrdm.ptr = pwrdm; | |
91 | ||
92 | /* Verify that the clockdomain is not already registered */ | |
93 | if (_clkdm_lookup(clkdm->name)) | |
94 | return -EEXIST; | |
95 | ||
96 | list_add(&clkdm->node, &clkdm_list); | |
97 | ||
98 | pwrdm_add_clkdm(pwrdm, clkdm); | |
99 | ||
100 | pr_debug("clockdomain: registered %s\n", clkdm->name); | |
101 | ||
102 | return 0; | |
103 | } | |
104 | ||
55ed9694 PW |
105 | /* _clkdm_deps_lookup - look up the specified clockdomain in a clkdm list */ |
106 | static struct clkdm_dep *_clkdm_deps_lookup(struct clockdomain *clkdm, | |
107 | struct clkdm_dep *deps) | |
108 | { | |
109 | struct clkdm_dep *cd; | |
110 | ||
111 | if (!clkdm || !deps || !omap_chip_is(clkdm->omap_chip)) | |
112 | return ERR_PTR(-EINVAL); | |
113 | ||
114 | for (cd = deps; cd->clkdm_name; cd++) { | |
55ed9694 PW |
115 | if (!omap_chip_is(cd->omap_chip)) |
116 | continue; | |
117 | ||
118 | if (!cd->clkdm && cd->clkdm_name) | |
119 | cd->clkdm = _clkdm_lookup(cd->clkdm_name); | |
120 | ||
121 | if (cd->clkdm == clkdm) | |
122 | break; | |
55ed9694 PW |
123 | } |
124 | ||
125 | if (!cd->clkdm_name) | |
126 | return ERR_PTR(-ENOENT); | |
127 | ||
128 | return cd; | |
129 | } | |
130 | ||
d459bfe0 | 131 | /* |
55ed9694 PW |
132 | * _autodep_lookup - resolve autodep clkdm names to clkdm pointers; store |
133 | * @autodep: struct clkdm_autodep * to resolve | |
d459bfe0 | 134 | * |
55ed9694 PW |
135 | * Resolve autodep clockdomain names to clockdomain pointers via |
136 | * clkdm_lookup() and store the pointers in the autodep structure. An | |
137 | * "autodep" is a clockdomain sleep/wakeup dependency that is | |
d459bfe0 PW |
138 | * automatically added and removed whenever clocks in the associated |
139 | * clockdomain are enabled or disabled (respectively) when the | |
140 | * clockdomain is in hardware-supervised mode. Meant to be called | |
141 | * once at clockdomain layer initialization, since these should remain | |
142 | * fixed for a particular architecture. No return value. | |
143 | */ | |
55ed9694 | 144 | static void _autodep_lookup(struct clkdm_autodep *autodep) |
d459bfe0 | 145 | { |
55ed9694 | 146 | struct clockdomain *clkdm; |
d459bfe0 PW |
147 | |
148 | if (!autodep) | |
149 | return; | |
150 | ||
151 | if (!omap_chip_is(autodep->omap_chip)) | |
152 | return; | |
153 | ||
55ed9694 PW |
154 | clkdm = clkdm_lookup(autodep->clkdm.name); |
155 | if (!clkdm) { | |
156 | pr_err("clockdomain: autodeps: clockdomain %s does not exist\n", | |
157 | autodep->clkdm.name); | |
158 | clkdm = ERR_PTR(-ENOENT); | |
d459bfe0 | 159 | } |
55ed9694 | 160 | autodep->clkdm.ptr = clkdm; |
d459bfe0 PW |
161 | } |
162 | ||
163 | /* | |
164 | * _clkdm_add_autodeps - add auto sleepdeps/wkdeps to clkdm upon clock enable | |
165 | * @clkdm: struct clockdomain * | |
166 | * | |
167 | * Add the "autodep" sleep & wakeup dependencies to clockdomain 'clkdm' | |
168 | * in hardware-supervised mode. Meant to be called from clock framework | |
169 | * when a clock inside clockdomain 'clkdm' is enabled. No return value. | |
170 | */ | |
171 | static void _clkdm_add_autodeps(struct clockdomain *clkdm) | |
172 | { | |
55ed9694 | 173 | struct clkdm_autodep *autodep; |
d459bfe0 | 174 | |
ad956160 PW |
175 | if (!autodeps) |
176 | return; | |
177 | ||
55ed9694 PW |
178 | for (autodep = autodeps; autodep->clkdm.ptr; autodep++) { |
179 | if (IS_ERR(autodep->clkdm.ptr)) | |
d459bfe0 PW |
180 | continue; |
181 | ||
d96df00d PW |
182 | if (!omap_chip_is(autodep->omap_chip)) |
183 | continue; | |
184 | ||
d459bfe0 | 185 | pr_debug("clockdomain: adding %s sleepdep/wkdep for " |
55ed9694 PW |
186 | "clkdm %s\n", autodep->clkdm.ptr->name, |
187 | clkdm->name); | |
d459bfe0 | 188 | |
55ed9694 PW |
189 | clkdm_add_sleepdep(clkdm, autodep->clkdm.ptr); |
190 | clkdm_add_wkdep(clkdm, autodep->clkdm.ptr); | |
d459bfe0 PW |
191 | } |
192 | } | |
193 | ||
194 | /* | |
195 | * _clkdm_add_autodeps - remove auto sleepdeps/wkdeps from clkdm | |
196 | * @clkdm: struct clockdomain * | |
197 | * | |
198 | * Remove the "autodep" sleep & wakeup dependencies from clockdomain 'clkdm' | |
199 | * in hardware-supervised mode. Meant to be called from clock framework | |
200 | * when a clock inside clockdomain 'clkdm' is disabled. No return value. | |
201 | */ | |
202 | static void _clkdm_del_autodeps(struct clockdomain *clkdm) | |
203 | { | |
55ed9694 | 204 | struct clkdm_autodep *autodep; |
d459bfe0 | 205 | |
ad956160 PW |
206 | if (!autodeps) |
207 | return; | |
208 | ||
55ed9694 PW |
209 | for (autodep = autodeps; autodep->clkdm.ptr; autodep++) { |
210 | if (IS_ERR(autodep->clkdm.ptr)) | |
d459bfe0 PW |
211 | continue; |
212 | ||
d96df00d PW |
213 | if (!omap_chip_is(autodep->omap_chip)) |
214 | continue; | |
215 | ||
d459bfe0 | 216 | pr_debug("clockdomain: removing %s sleepdep/wkdep for " |
55ed9694 PW |
217 | "clkdm %s\n", autodep->clkdm.ptr->name, |
218 | clkdm->name); | |
d459bfe0 | 219 | |
55ed9694 PW |
220 | clkdm_del_sleepdep(clkdm, autodep->clkdm.ptr); |
221 | clkdm_del_wkdep(clkdm, autodep->clkdm.ptr); | |
d459bfe0 PW |
222 | } |
223 | } | |
224 | ||
a0219fbd KJ |
225 | /* |
226 | * _omap2_clkdm_set_hwsup - set the hwsup idle transition bit | |
227 | * @clkdm: struct clockdomain * | |
228 | * @enable: int 0 to disable, 1 to enable | |
229 | * | |
230 | * Internal helper for actually switching the bit that controls hwsup | |
231 | * idle transitions for clkdm. | |
232 | */ | |
233 | static void _omap2_clkdm_set_hwsup(struct clockdomain *clkdm, int enable) | |
234 | { | |
b099474a | 235 | u32 bits, v; |
a0219fbd KJ |
236 | |
237 | if (cpu_is_omap24xx()) { | |
238 | if (enable) | |
b099474a | 239 | bits = OMAP24XX_CLKSTCTRL_ENABLE_AUTO; |
a0219fbd | 240 | else |
b099474a | 241 | bits = OMAP24XX_CLKSTCTRL_DISABLE_AUTO; |
766d305f | 242 | } else if (cpu_is_omap34xx() || cpu_is_omap44xx()) { |
a0219fbd | 243 | if (enable) |
b099474a | 244 | bits = OMAP34XX_CLKSTCTRL_ENABLE_AUTO; |
a0219fbd | 245 | else |
b099474a | 246 | bits = OMAP34XX_CLKSTCTRL_DISABLE_AUTO; |
a0219fbd KJ |
247 | } else { |
248 | BUG(); | |
249 | } | |
250 | ||
b099474a AP |
251 | bits = bits << __ffs(clkdm->clktrctrl_mask); |
252 | ||
253 | v = __raw_readl(clkdm->clkstctrl_reg); | |
254 | v &= ~(clkdm->clktrctrl_mask); | |
255 | v |= bits; | |
256 | __raw_writel(v, clkdm->clkstctrl_reg); | |
257 | ||
a0219fbd | 258 | } |
d459bfe0 | 259 | |
d459bfe0 PW |
260 | /* Public functions */ |
261 | ||
262 | /** | |
263 | * clkdm_init - set up the clockdomain layer | |
264 | * @clkdms: optional pointer to an array of clockdomains to register | |
265 | * @init_autodeps: optional pointer to an array of autodeps to register | |
266 | * | |
267 | * Set up internal state. If a pointer to an array of clockdomains | |
f0271d65 PW |
268 | * @clkdms was supplied, loop through the list of clockdomains, |
269 | * register all that are available on the current platform. Similarly, | |
270 | * if a pointer to an array of clockdomain autodependencies | |
271 | * @init_autodeps was provided, register those. No return value. | |
d459bfe0 PW |
272 | */ |
273 | void clkdm_init(struct clockdomain **clkdms, | |
55ed9694 | 274 | struct clkdm_autodep *init_autodeps) |
d459bfe0 PW |
275 | { |
276 | struct clockdomain **c = NULL; | |
369d5614 | 277 | struct clockdomain *clkdm; |
55ed9694 | 278 | struct clkdm_autodep *autodep = NULL; |
d459bfe0 PW |
279 | |
280 | if (clkdms) | |
281 | for (c = clkdms; *c; c++) | |
e909d62a | 282 | _clkdm_register(*c); |
d459bfe0 | 283 | |
55ed9694 PW |
284 | autodeps = init_autodeps; |
285 | if (autodeps) | |
286 | for (autodep = autodeps; autodep->clkdm.ptr; autodep++) | |
287 | _autodep_lookup(autodep); | |
369d5614 PW |
288 | |
289 | /* | |
6f7f63cc PW |
290 | * Put all clockdomains into software-supervised mode; PM code |
291 | * should later enable hardware-supervised mode as appropriate | |
369d5614 PW |
292 | */ |
293 | list_for_each_entry(clkdm, &clkdm_list, node) { | |
6f7f63cc PW |
294 | if (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP) |
295 | omap2_clkdm_wakeup(clkdm); | |
296 | else if (clkdm->flags & CLKDM_CAN_DISABLE_AUTO) | |
297 | omap2_clkdm_deny_idle(clkdm); | |
298 | ||
299 | clkdm_clear_all_wkdeps(clkdm); | |
300 | clkdm_clear_all_sleepdeps(clkdm); | |
369d5614 | 301 | } |
d459bfe0 PW |
302 | } |
303 | ||
d459bfe0 PW |
304 | /** |
305 | * clkdm_lookup - look up a clockdomain by name, return a pointer | |
306 | * @name: name of clockdomain | |
307 | * | |
f0271d65 PW |
308 | * Find a registered clockdomain by its name @name. Returns a pointer |
309 | * to the struct clockdomain if found, or NULL otherwise. | |
d459bfe0 PW |
310 | */ |
311 | struct clockdomain *clkdm_lookup(const char *name) | |
312 | { | |
313 | struct clockdomain *clkdm, *temp_clkdm; | |
314 | ||
315 | if (!name) | |
316 | return NULL; | |
317 | ||
318 | clkdm = NULL; | |
319 | ||
d459bfe0 PW |
320 | list_for_each_entry(temp_clkdm, &clkdm_list, node) { |
321 | if (!strcmp(name, temp_clkdm->name)) { | |
322 | clkdm = temp_clkdm; | |
323 | break; | |
324 | } | |
325 | } | |
d459bfe0 PW |
326 | |
327 | return clkdm; | |
328 | } | |
329 | ||
330 | /** | |
331 | * clkdm_for_each - call function on each registered clockdomain | |
332 | * @fn: callback function * | |
333 | * | |
f0271d65 PW |
334 | * Call the supplied function @fn for each registered clockdomain. |
335 | * The callback function @fn can return anything but 0 to bail | |
d459bfe0 PW |
336 | * out early from the iterator. The callback function is called with |
337 | * the clkdm_mutex held, so no clockdomain structure manipulation | |
338 | * functions should be called from the callback, although hardware | |
339 | * clockdomain control functions are fine. Returns the last return | |
340 | * value of the callback function, which should be 0 for success or | |
341 | * anything else to indicate failure; or -EINVAL if the function pointer | |
342 | * is null. | |
343 | */ | |
a23456e9 PDS |
344 | int clkdm_for_each(int (*fn)(struct clockdomain *clkdm, void *user), |
345 | void *user) | |
d459bfe0 PW |
346 | { |
347 | struct clockdomain *clkdm; | |
348 | int ret = 0; | |
349 | ||
350 | if (!fn) | |
351 | return -EINVAL; | |
352 | ||
d459bfe0 | 353 | list_for_each_entry(clkdm, &clkdm_list, node) { |
a23456e9 | 354 | ret = (*fn)(clkdm, user); |
d459bfe0 PW |
355 | if (ret) |
356 | break; | |
357 | } | |
d459bfe0 PW |
358 | |
359 | return ret; | |
360 | } | |
361 | ||
362 | ||
e89087c9 PW |
363 | /** |
364 | * clkdm_get_pwrdm - return a ptr to the pwrdm that this clkdm resides in | |
365 | * @clkdm: struct clockdomain * | |
366 | * | |
367 | * Return a pointer to the struct powerdomain that the specified clockdomain | |
f0271d65 | 368 | * @clkdm exists in, or returns NULL if @clkdm is NULL. |
e89087c9 PW |
369 | */ |
370 | struct powerdomain *clkdm_get_pwrdm(struct clockdomain *clkdm) | |
371 | { | |
372 | if (!clkdm) | |
373 | return NULL; | |
374 | ||
5b74c676 | 375 | return clkdm->pwrdm.ptr; |
e89087c9 PW |
376 | } |
377 | ||
378 | ||
d459bfe0 PW |
379 | /* Hardware clockdomain control */ |
380 | ||
55ed9694 PW |
381 | /** |
382 | * clkdm_add_wkdep - add a wakeup dependency from clkdm2 to clkdm1 | |
383 | * @clkdm1: wake this struct clockdomain * up (dependent) | |
384 | * @clkdm2: when this struct clockdomain * wakes up (source) | |
385 | * | |
386 | * When the clockdomain represented by @clkdm2 wakes up, wake up | |
387 | * @clkdm1. Implemented in hardware on the OMAP, this feature is | |
388 | * designed to reduce wakeup latency of the dependent clockdomain @clkdm1. | |
389 | * Returns -EINVAL if presented with invalid clockdomain pointers, | |
390 | * -ENOENT if @clkdm2 cannot wake up clkdm1 in hardware, or 0 upon | |
391 | * success. | |
392 | */ | |
393 | int clkdm_add_wkdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2) | |
394 | { | |
395 | struct clkdm_dep *cd; | |
396 | ||
397 | if (!clkdm1 || !clkdm2) | |
398 | return -EINVAL; | |
399 | ||
400 | cd = _clkdm_deps_lookup(clkdm2, clkdm1->wkdep_srcs); | |
401 | if (IS_ERR(cd)) { | |
402 | pr_debug("clockdomain: hardware cannot set/clear wake up of " | |
403 | "%s when %s wakes up\n", clkdm1->name, clkdm2->name); | |
404 | return PTR_ERR(cd); | |
405 | } | |
406 | ||
369d5614 PW |
407 | if (atomic_inc_return(&cd->wkdep_usecount) == 1) { |
408 | pr_debug("clockdomain: hardware will wake up %s when %s wakes " | |
409 | "up\n", clkdm1->name, clkdm2->name); | |
55ed9694 | 410 | |
c4d7e58f | 411 | omap2_prm_set_mod_reg_bits((1 << clkdm2->dep_bit), |
369d5614 PW |
412 | clkdm1->pwrdm.ptr->prcm_offs, PM_WKDEP); |
413 | } | |
55ed9694 PW |
414 | |
415 | return 0; | |
416 | } | |
417 | ||
418 | /** | |
419 | * clkdm_del_wkdep - remove a wakeup dependency from clkdm2 to clkdm1 | |
420 | * @clkdm1: wake this struct clockdomain * up (dependent) | |
421 | * @clkdm2: when this struct clockdomain * wakes up (source) | |
422 | * | |
423 | * Remove a wakeup dependency causing @clkdm1 to wake up when @clkdm2 | |
424 | * wakes up. Returns -EINVAL if presented with invalid clockdomain | |
425 | * pointers, -ENOENT if @clkdm2 cannot wake up clkdm1 in hardware, or | |
426 | * 0 upon success. | |
427 | */ | |
428 | int clkdm_del_wkdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2) | |
429 | { | |
430 | struct clkdm_dep *cd; | |
431 | ||
432 | if (!clkdm1 || !clkdm2) | |
433 | return -EINVAL; | |
434 | ||
435 | cd = _clkdm_deps_lookup(clkdm2, clkdm1->wkdep_srcs); | |
436 | if (IS_ERR(cd)) { | |
437 | pr_debug("clockdomain: hardware cannot set/clear wake up of " | |
438 | "%s when %s wakes up\n", clkdm1->name, clkdm2->name); | |
439 | return PTR_ERR(cd); | |
440 | } | |
441 | ||
369d5614 PW |
442 | if (atomic_dec_return(&cd->wkdep_usecount) == 0) { |
443 | pr_debug("clockdomain: hardware will no longer wake up %s " | |
444 | "after %s wakes up\n", clkdm1->name, clkdm2->name); | |
55ed9694 | 445 | |
c4d7e58f | 446 | omap2_prm_clear_mod_reg_bits((1 << clkdm2->dep_bit), |
369d5614 PW |
447 | clkdm1->pwrdm.ptr->prcm_offs, PM_WKDEP); |
448 | } | |
55ed9694 PW |
449 | |
450 | return 0; | |
451 | } | |
452 | ||
453 | /** | |
454 | * clkdm_read_wkdep - read wakeup dependency state from clkdm2 to clkdm1 | |
455 | * @clkdm1: wake this struct clockdomain * up (dependent) | |
456 | * @clkdm2: when this struct clockdomain * wakes up (source) | |
457 | * | |
458 | * Return 1 if a hardware wakeup dependency exists wherein @clkdm1 will be | |
459 | * awoken when @clkdm2 wakes up; 0 if dependency is not set; -EINVAL | |
460 | * if either clockdomain pointer is invalid; or -ENOENT if the hardware | |
461 | * is incapable. | |
462 | * | |
463 | * REVISIT: Currently this function only represents software-controllable | |
464 | * wakeup dependencies. Wakeup dependencies fixed in hardware are not | |
465 | * yet handled here. | |
466 | */ | |
467 | int clkdm_read_wkdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2) | |
468 | { | |
469 | struct clkdm_dep *cd; | |
470 | ||
471 | if (!clkdm1 || !clkdm2) | |
472 | return -EINVAL; | |
473 | ||
474 | cd = _clkdm_deps_lookup(clkdm2, clkdm1->wkdep_srcs); | |
475 | if (IS_ERR(cd)) { | |
476 | pr_debug("clockdomain: hardware cannot set/clear wake up of " | |
477 | "%s when %s wakes up\n", clkdm1->name, clkdm2->name); | |
478 | return PTR_ERR(cd); | |
479 | } | |
480 | ||
369d5614 | 481 | /* XXX It's faster to return the atomic wkdep_usecount */ |
c4d7e58f | 482 | return omap2_prm_read_mod_bits_shift(clkdm1->pwrdm.ptr->prcm_offs, PM_WKDEP, |
55ed9694 PW |
483 | (1 << clkdm2->dep_bit)); |
484 | } | |
485 | ||
369d5614 PW |
486 | /** |
487 | * clkdm_clear_all_wkdeps - remove all wakeup dependencies from target clkdm | |
488 | * @clkdm: struct clockdomain * to remove all wakeup dependencies from | |
489 | * | |
490 | * Remove all inter-clockdomain wakeup dependencies that could cause | |
491 | * @clkdm to wake. Intended to be used during boot to initialize the | |
492 | * PRCM to a known state, after all clockdomains are put into swsup idle | |
493 | * and woken up. Returns -EINVAL if @clkdm pointer is invalid, or | |
494 | * 0 upon success. | |
495 | */ | |
496 | int clkdm_clear_all_wkdeps(struct clockdomain *clkdm) | |
497 | { | |
498 | struct clkdm_dep *cd; | |
499 | u32 mask = 0; | |
500 | ||
501 | if (!clkdm) | |
502 | return -EINVAL; | |
503 | ||
504 | for (cd = clkdm->wkdep_srcs; cd && cd->clkdm_name; cd++) { | |
505 | if (!omap_chip_is(cd->omap_chip)) | |
506 | continue; | |
507 | ||
6f7f63cc PW |
508 | if (!cd->clkdm && cd->clkdm_name) |
509 | cd->clkdm = _clkdm_lookup(cd->clkdm_name); | |
510 | ||
369d5614 PW |
511 | /* PRM accesses are slow, so minimize them */ |
512 | mask |= 1 << cd->clkdm->dep_bit; | |
513 | atomic_set(&cd->wkdep_usecount, 0); | |
514 | } | |
515 | ||
c4d7e58f | 516 | omap2_prm_clear_mod_reg_bits(mask, clkdm->pwrdm.ptr->prcm_offs, PM_WKDEP); |
369d5614 PW |
517 | |
518 | return 0; | |
519 | } | |
520 | ||
55ed9694 PW |
521 | /** |
522 | * clkdm_add_sleepdep - add a sleep dependency from clkdm2 to clkdm1 | |
523 | * @clkdm1: prevent this struct clockdomain * from sleeping (dependent) | |
524 | * @clkdm2: when this struct clockdomain * is active (source) | |
525 | * | |
526 | * Prevent @clkdm1 from automatically going inactive (and then to | |
527 | * retention or off) if @clkdm2 is active. Returns -EINVAL if | |
528 | * presented with invalid clockdomain pointers or called on a machine | |
529 | * that does not support software-configurable hardware sleep | |
530 | * dependencies, -ENOENT if the specified dependency cannot be set in | |
531 | * hardware, or 0 upon success. | |
532 | */ | |
533 | int clkdm_add_sleepdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2) | |
534 | { | |
535 | struct clkdm_dep *cd; | |
536 | ||
537 | if (!cpu_is_omap34xx()) | |
538 | return -EINVAL; | |
539 | ||
540 | if (!clkdm1 || !clkdm2) | |
541 | return -EINVAL; | |
542 | ||
543 | cd = _clkdm_deps_lookup(clkdm2, clkdm1->sleepdep_srcs); | |
544 | if (IS_ERR(cd)) { | |
545 | pr_debug("clockdomain: hardware cannot set/clear sleep " | |
546 | "dependency affecting %s from %s\n", clkdm1->name, | |
547 | clkdm2->name); | |
548 | return PTR_ERR(cd); | |
549 | } | |
550 | ||
369d5614 PW |
551 | if (atomic_inc_return(&cd->sleepdep_usecount) == 1) { |
552 | pr_debug("clockdomain: will prevent %s from sleeping if %s " | |
553 | "is active\n", clkdm1->name, clkdm2->name); | |
55ed9694 | 554 | |
c4d7e58f | 555 | omap2_cm_set_mod_reg_bits((1 << clkdm2->dep_bit), |
369d5614 PW |
556 | clkdm1->pwrdm.ptr->prcm_offs, |
557 | OMAP3430_CM_SLEEPDEP); | |
558 | } | |
55ed9694 PW |
559 | |
560 | return 0; | |
561 | } | |
562 | ||
563 | /** | |
564 | * clkdm_del_sleepdep - remove a sleep dependency from clkdm2 to clkdm1 | |
565 | * @clkdm1: prevent this struct clockdomain * from sleeping (dependent) | |
566 | * @clkdm2: when this struct clockdomain * is active (source) | |
567 | * | |
568 | * Allow @clkdm1 to automatically go inactive (and then to retention or | |
569 | * off), independent of the activity state of @clkdm2. Returns -EINVAL | |
570 | * if presented with invalid clockdomain pointers or called on a machine | |
571 | * that does not support software-configurable hardware sleep dependencies, | |
572 | * -ENOENT if the specified dependency cannot be cleared in hardware, or | |
573 | * 0 upon success. | |
574 | */ | |
575 | int clkdm_del_sleepdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2) | |
576 | { | |
577 | struct clkdm_dep *cd; | |
578 | ||
579 | if (!cpu_is_omap34xx()) | |
580 | return -EINVAL; | |
581 | ||
582 | if (!clkdm1 || !clkdm2) | |
583 | return -EINVAL; | |
584 | ||
585 | cd = _clkdm_deps_lookup(clkdm2, clkdm1->sleepdep_srcs); | |
586 | if (IS_ERR(cd)) { | |
587 | pr_debug("clockdomain: hardware cannot set/clear sleep " | |
588 | "dependency affecting %s from %s\n", clkdm1->name, | |
589 | clkdm2->name); | |
590 | return PTR_ERR(cd); | |
591 | } | |
592 | ||
369d5614 PW |
593 | if (atomic_dec_return(&cd->sleepdep_usecount) == 0) { |
594 | pr_debug("clockdomain: will no longer prevent %s from " | |
595 | "sleeping if %s is active\n", clkdm1->name, | |
596 | clkdm2->name); | |
55ed9694 | 597 | |
c4d7e58f | 598 | omap2_cm_clear_mod_reg_bits((1 << clkdm2->dep_bit), |
369d5614 PW |
599 | clkdm1->pwrdm.ptr->prcm_offs, |
600 | OMAP3430_CM_SLEEPDEP); | |
601 | } | |
55ed9694 PW |
602 | |
603 | return 0; | |
604 | } | |
605 | ||
606 | /** | |
607 | * clkdm_read_sleepdep - read sleep dependency state from clkdm2 to clkdm1 | |
608 | * @clkdm1: prevent this struct clockdomain * from sleeping (dependent) | |
609 | * @clkdm2: when this struct clockdomain * is active (source) | |
610 | * | |
611 | * Return 1 if a hardware sleep dependency exists wherein @clkdm1 will | |
612 | * not be allowed to automatically go inactive if @clkdm2 is active; | |
613 | * 0 if @clkdm1's automatic power state inactivity transition is independent | |
614 | * of @clkdm2's; -EINVAL if either clockdomain pointer is invalid or called | |
615 | * on a machine that does not support software-configurable hardware sleep | |
616 | * dependencies; or -ENOENT if the hardware is incapable. | |
617 | * | |
618 | * REVISIT: Currently this function only represents software-controllable | |
619 | * sleep dependencies. Sleep dependencies fixed in hardware are not | |
620 | * yet handled here. | |
621 | */ | |
622 | int clkdm_read_sleepdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2) | |
623 | { | |
624 | struct clkdm_dep *cd; | |
625 | ||
626 | if (!cpu_is_omap34xx()) | |
627 | return -EINVAL; | |
628 | ||
629 | if (!clkdm1 || !clkdm2) | |
630 | return -EINVAL; | |
631 | ||
632 | cd = _clkdm_deps_lookup(clkdm2, clkdm1->sleepdep_srcs); | |
633 | if (IS_ERR(cd)) { | |
634 | pr_debug("clockdomain: hardware cannot set/clear sleep " | |
635 | "dependency affecting %s from %s\n", clkdm1->name, | |
636 | clkdm2->name); | |
637 | return PTR_ERR(cd); | |
638 | } | |
639 | ||
369d5614 | 640 | /* XXX It's faster to return the atomic sleepdep_usecount */ |
c4d7e58f | 641 | return omap2_prm_read_mod_bits_shift(clkdm1->pwrdm.ptr->prcm_offs, |
55ed9694 PW |
642 | OMAP3430_CM_SLEEPDEP, |
643 | (1 << clkdm2->dep_bit)); | |
644 | } | |
645 | ||
369d5614 PW |
646 | /** |
647 | * clkdm_clear_all_sleepdeps - remove all sleep dependencies from target clkdm | |
648 | * @clkdm: struct clockdomain * to remove all sleep dependencies from | |
649 | * | |
650 | * Remove all inter-clockdomain sleep dependencies that could prevent | |
651 | * @clkdm from idling. Intended to be used during boot to initialize the | |
652 | * PRCM to a known state, after all clockdomains are put into swsup idle | |
653 | * and woken up. Returns -EINVAL if @clkdm pointer is invalid, or | |
654 | * 0 upon success. | |
655 | */ | |
656 | int clkdm_clear_all_sleepdeps(struct clockdomain *clkdm) | |
657 | { | |
658 | struct clkdm_dep *cd; | |
659 | u32 mask = 0; | |
660 | ||
661 | if (!cpu_is_omap34xx()) | |
662 | return -EINVAL; | |
663 | ||
664 | if (!clkdm) | |
665 | return -EINVAL; | |
666 | ||
667 | for (cd = clkdm->sleepdep_srcs; cd && cd->clkdm_name; cd++) { | |
668 | if (!omap_chip_is(cd->omap_chip)) | |
669 | continue; | |
670 | ||
6f7f63cc PW |
671 | if (!cd->clkdm && cd->clkdm_name) |
672 | cd->clkdm = _clkdm_lookup(cd->clkdm_name); | |
673 | ||
369d5614 PW |
674 | /* PRM accesses are slow, so minimize them */ |
675 | mask |= 1 << cd->clkdm->dep_bit; | |
676 | atomic_set(&cd->sleepdep_usecount, 0); | |
677 | } | |
678 | ||
c4d7e58f | 679 | omap2_prm_clear_mod_reg_bits(mask, clkdm->pwrdm.ptr->prcm_offs, |
369d5614 PW |
680 | OMAP3430_CM_SLEEPDEP); |
681 | ||
682 | return 0; | |
683 | } | |
55ed9694 | 684 | |
d459bfe0 PW |
685 | /** |
686 | * omap2_clkdm_clktrctrl_read - read the clkdm's current state transition mode | |
f0271d65 | 687 | * @clkdm: struct clkdm * of a clockdomain |
d459bfe0 | 688 | * |
f0271d65 PW |
689 | * Return the clockdomain @clkdm current state transition mode from the |
690 | * corresponding domain CM_CLKSTCTRL register. Returns -EINVAL if @clkdm | |
d459bfe0 PW |
691 | * is NULL or the current mode upon success. |
692 | */ | |
693 | static int omap2_clkdm_clktrctrl_read(struct clockdomain *clkdm) | |
694 | { | |
695 | u32 v; | |
696 | ||
697 | if (!clkdm) | |
698 | return -EINVAL; | |
699 | ||
b099474a | 700 | v = __raw_readl(clkdm->clkstctrl_reg); |
d459bfe0 PW |
701 | v &= clkdm->clktrctrl_mask; |
702 | v >>= __ffs(clkdm->clktrctrl_mask); | |
703 | ||
704 | return v; | |
705 | } | |
706 | ||
707 | /** | |
708 | * omap2_clkdm_sleep - force clockdomain sleep transition | |
709 | * @clkdm: struct clockdomain * | |
710 | * | |
711 | * Instruct the CM to force a sleep transition on the specified | |
f0271d65 | 712 | * clockdomain @clkdm. Returns -EINVAL if @clkdm is NULL or if |
d459bfe0 PW |
713 | * clockdomain does not support software-initiated sleep; 0 upon |
714 | * success. | |
715 | */ | |
716 | int omap2_clkdm_sleep(struct clockdomain *clkdm) | |
717 | { | |
718 | if (!clkdm) | |
719 | return -EINVAL; | |
720 | ||
721 | if (!(clkdm->flags & CLKDM_CAN_FORCE_SLEEP)) { | |
722 | pr_debug("clockdomain: %s does not support forcing " | |
723 | "sleep via software\n", clkdm->name); | |
724 | return -EINVAL; | |
725 | } | |
726 | ||
727 | pr_debug("clockdomain: forcing sleep on %s\n", clkdm->name); | |
728 | ||
729 | if (cpu_is_omap24xx()) { | |
730 | ||
c4d7e58f | 731 | omap2_cm_set_mod_reg_bits(OMAP24XX_FORCESTATE_MASK, |
37903009 | 732 | clkdm->pwrdm.ptr->prcm_offs, OMAP2_PM_PWSTCTRL); |
d459bfe0 | 733 | |
766d305f | 734 | } else if (cpu_is_omap34xx() || cpu_is_omap44xx()) { |
d459bfe0 | 735 | |
b099474a | 736 | u32 bits = (OMAP34XX_CLKSTCTRL_FORCE_SLEEP << |
d459bfe0 PW |
737 | __ffs(clkdm->clktrctrl_mask)); |
738 | ||
b099474a AP |
739 | u32 v = __raw_readl(clkdm->clkstctrl_reg); |
740 | v &= ~(clkdm->clktrctrl_mask); | |
741 | v |= bits; | |
742 | __raw_writel(v, clkdm->clkstctrl_reg); | |
d459bfe0 PW |
743 | |
744 | } else { | |
745 | BUG(); | |
746 | }; | |
747 | ||
748 | return 0; | |
749 | } | |
750 | ||
751 | /** | |
752 | * omap2_clkdm_wakeup - force clockdomain wakeup transition | |
753 | * @clkdm: struct clockdomain * | |
754 | * | |
755 | * Instruct the CM to force a wakeup transition on the specified | |
f0271d65 | 756 | * clockdomain @clkdm. Returns -EINVAL if @clkdm is NULL or if the |
d459bfe0 PW |
757 | * clockdomain does not support software-controlled wakeup; 0 upon |
758 | * success. | |
759 | */ | |
760 | int omap2_clkdm_wakeup(struct clockdomain *clkdm) | |
761 | { | |
762 | if (!clkdm) | |
763 | return -EINVAL; | |
764 | ||
765 | if (!(clkdm->flags & CLKDM_CAN_FORCE_WAKEUP)) { | |
766 | pr_debug("clockdomain: %s does not support forcing " | |
767 | "wakeup via software\n", clkdm->name); | |
768 | return -EINVAL; | |
769 | } | |
770 | ||
771 | pr_debug("clockdomain: forcing wakeup on %s\n", clkdm->name); | |
772 | ||
773 | if (cpu_is_omap24xx()) { | |
774 | ||
c4d7e58f | 775 | omap2_cm_clear_mod_reg_bits(OMAP24XX_FORCESTATE_MASK, |
37903009 | 776 | clkdm->pwrdm.ptr->prcm_offs, OMAP2_PM_PWSTCTRL); |
d459bfe0 | 777 | |
766d305f | 778 | } else if (cpu_is_omap34xx() || cpu_is_omap44xx()) { |
d459bfe0 | 779 | |
b099474a | 780 | u32 bits = (OMAP34XX_CLKSTCTRL_FORCE_WAKEUP << |
d459bfe0 PW |
781 | __ffs(clkdm->clktrctrl_mask)); |
782 | ||
b099474a AP |
783 | u32 v = __raw_readl(clkdm->clkstctrl_reg); |
784 | v &= ~(clkdm->clktrctrl_mask); | |
785 | v |= bits; | |
786 | __raw_writel(v, clkdm->clkstctrl_reg); | |
d459bfe0 PW |
787 | |
788 | } else { | |
789 | BUG(); | |
790 | }; | |
791 | ||
792 | return 0; | |
793 | } | |
794 | ||
795 | /** | |
796 | * omap2_clkdm_allow_idle - enable hwsup idle transitions for clkdm | |
797 | * @clkdm: struct clockdomain * | |
798 | * | |
f0271d65 | 799 | * Allow the hardware to automatically switch the clockdomain @clkdm into |
d459bfe0 PW |
800 | * active or idle states, as needed by downstream clocks. If the |
801 | * clockdomain has any downstream clocks enabled in the clock | |
802 | * framework, wkdep/sleepdep autodependencies are added; this is so | |
803 | * device drivers can read and write to the device. No return value. | |
804 | */ | |
805 | void omap2_clkdm_allow_idle(struct clockdomain *clkdm) | |
806 | { | |
d459bfe0 PW |
807 | if (!clkdm) |
808 | return; | |
809 | ||
810 | if (!(clkdm->flags & CLKDM_CAN_ENABLE_AUTO)) { | |
811 | pr_debug("clock: automatic idle transitions cannot be enabled " | |
812 | "on clockdomain %s\n", clkdm->name); | |
813 | return; | |
814 | } | |
815 | ||
816 | pr_debug("clockdomain: enabling automatic idle transitions for %s\n", | |
817 | clkdm->name); | |
818 | ||
91808a81 AP |
819 | /* |
820 | * XXX This should be removed once TI adds wakeup/sleep | |
821 | * dependency code and data for OMAP4. | |
822 | */ | |
823 | if (cpu_is_omap44xx()) { | |
824 | WARN_ONCE(1, "clockdomain: OMAP4 wakeup/sleep dependency " | |
825 | "support is not yet implemented\n"); | |
826 | } else { | |
827 | if (atomic_read(&clkdm->usecount) > 0) | |
828 | _clkdm_add_autodeps(clkdm); | |
829 | } | |
d459bfe0 | 830 | |
a0219fbd | 831 | _omap2_clkdm_set_hwsup(clkdm, 1); |
ba20bb12 PDS |
832 | |
833 | pwrdm_clkdm_state_switch(clkdm); | |
d459bfe0 PW |
834 | } |
835 | ||
836 | /** | |
837 | * omap2_clkdm_deny_idle - disable hwsup idle transitions for clkdm | |
838 | * @clkdm: struct clockdomain * | |
839 | * | |
840 | * Prevent the hardware from automatically switching the clockdomain | |
f0271d65 PW |
841 | * @clkdm into inactive or idle states. If the clockdomain has |
842 | * downstream clocks enabled in the clock framework, wkdep/sleepdep | |
d459bfe0 PW |
843 | * autodependencies are removed. No return value. |
844 | */ | |
845 | void omap2_clkdm_deny_idle(struct clockdomain *clkdm) | |
846 | { | |
d459bfe0 PW |
847 | if (!clkdm) |
848 | return; | |
849 | ||
850 | if (!(clkdm->flags & CLKDM_CAN_DISABLE_AUTO)) { | |
851 | pr_debug("clockdomain: automatic idle transitions cannot be " | |
852 | "disabled on %s\n", clkdm->name); | |
853 | return; | |
854 | } | |
855 | ||
856 | pr_debug("clockdomain: disabling automatic idle transitions for %s\n", | |
857 | clkdm->name); | |
858 | ||
a0219fbd | 859 | _omap2_clkdm_set_hwsup(clkdm, 0); |
d459bfe0 | 860 | |
91808a81 AP |
861 | /* |
862 | * XXX This should be removed once TI adds wakeup/sleep | |
863 | * dependency code and data for OMAP4. | |
864 | */ | |
865 | if (cpu_is_omap44xx()) { | |
866 | WARN_ONCE(1, "clockdomain: OMAP4 wakeup/sleep dependency " | |
867 | "support is not yet implemented\n"); | |
868 | } else { | |
869 | if (atomic_read(&clkdm->usecount) > 0) | |
870 | _clkdm_del_autodeps(clkdm); | |
871 | } | |
d459bfe0 PW |
872 | } |
873 | ||
874 | ||
875 | /* Clockdomain-to-clock framework interface code */ | |
876 | ||
877 | /** | |
878 | * omap2_clkdm_clk_enable - add an enabled downstream clock to this clkdm | |
879 | * @clkdm: struct clockdomain * | |
880 | * @clk: struct clk * of the enabled downstream clock | |
881 | * | |
f0271d65 PW |
882 | * Increment the usecount of the clockdomain @clkdm and ensure that it |
883 | * is awake before @clk is enabled. Intended to be called by | |
884 | * clk_enable() code. If the clockdomain is in software-supervised | |
885 | * idle mode, force the clockdomain to wake. If the clockdomain is in | |
886 | * hardware-supervised idle mode, add clkdm-pwrdm autodependencies, to | |
887 | * ensure that devices in the clockdomain can be read from/written to | |
888 | * by on-chip processors. Returns -EINVAL if passed null pointers; | |
889 | * returns 0 upon success or if the clockdomain is in hwsup idle mode. | |
d459bfe0 PW |
890 | */ |
891 | int omap2_clkdm_clk_enable(struct clockdomain *clkdm, struct clk *clk) | |
892 | { | |
893 | int v; | |
894 | ||
895 | /* | |
896 | * XXX Rewrite this code to maintain a list of enabled | |
897 | * downstream clocks for debugging purposes? | |
898 | */ | |
899 | ||
30962d9d | 900 | if (!clkdm || !clk) |
d459bfe0 PW |
901 | return -EINVAL; |
902 | ||
903 | if (atomic_inc_return(&clkdm->usecount) > 1) | |
904 | return 0; | |
905 | ||
906 | /* Clockdomain now has one enabled downstream clock */ | |
907 | ||
908 | pr_debug("clockdomain: clkdm %s: clk %s now enabled\n", clkdm->name, | |
909 | clk->name); | |
910 | ||
30962d9d PW |
911 | if (!clkdm->clkstctrl_reg) |
912 | return 0; | |
913 | ||
d459bfe0 PW |
914 | v = omap2_clkdm_clktrctrl_read(clkdm); |
915 | ||
916 | if ((cpu_is_omap34xx() && v == OMAP34XX_CLKSTCTRL_ENABLE_AUTO) || | |
a0219fbd KJ |
917 | (cpu_is_omap24xx() && v == OMAP24XX_CLKSTCTRL_ENABLE_AUTO)) { |
918 | /* Disable HW transitions when we are changing deps */ | |
919 | _omap2_clkdm_set_hwsup(clkdm, 0); | |
d459bfe0 | 920 | _clkdm_add_autodeps(clkdm); |
a0219fbd KJ |
921 | _omap2_clkdm_set_hwsup(clkdm, 1); |
922 | } else { | |
d459bfe0 | 923 | omap2_clkdm_wakeup(clkdm); |
a0219fbd | 924 | } |
d459bfe0 | 925 | |
054ce503 | 926 | pwrdm_wait_transition(clkdm->pwrdm.ptr); |
fe617af7 | 927 | pwrdm_clkdm_state_switch(clkdm); |
054ce503 | 928 | |
d459bfe0 PW |
929 | return 0; |
930 | } | |
931 | ||
932 | /** | |
933 | * omap2_clkdm_clk_disable - remove an enabled downstream clock from this clkdm | |
934 | * @clkdm: struct clockdomain * | |
935 | * @clk: struct clk * of the disabled downstream clock | |
936 | * | |
f0271d65 PW |
937 | * Decrement the usecount of this clockdomain @clkdm when @clk is |
938 | * disabled. Intended to be called by clk_disable() code. If the | |
939 | * clockdomain usecount goes to 0, put the clockdomain to sleep | |
940 | * (software-supervised mode) or remove the clkdm autodependencies | |
941 | * (hardware-supervised mode). Returns -EINVAL if passed null | |
942 | * pointers; -ERANGE if the @clkdm usecount underflows and debugging | |
943 | * is enabled; or returns 0 upon success or if the clockdomain is in | |
944 | * hwsup idle mode. | |
d459bfe0 PW |
945 | */ |
946 | int omap2_clkdm_clk_disable(struct clockdomain *clkdm, struct clk *clk) | |
947 | { | |
948 | int v; | |
949 | ||
950 | /* | |
951 | * XXX Rewrite this code to maintain a list of enabled | |
952 | * downstream clocks for debugging purposes? | |
953 | */ | |
954 | ||
30962d9d | 955 | if (!clkdm || !clk) |
d459bfe0 PW |
956 | return -EINVAL; |
957 | ||
958 | #ifdef DEBUG | |
959 | if (atomic_read(&clkdm->usecount) == 0) { | |
960 | WARN_ON(1); /* underflow */ | |
961 | return -ERANGE; | |
962 | } | |
963 | #endif | |
964 | ||
965 | if (atomic_dec_return(&clkdm->usecount) > 0) | |
966 | return 0; | |
967 | ||
968 | /* All downstream clocks of this clockdomain are now disabled */ | |
969 | ||
970 | pr_debug("clockdomain: clkdm %s: clk %s now disabled\n", clkdm->name, | |
971 | clk->name); | |
972 | ||
30962d9d PW |
973 | if (!clkdm->clkstctrl_reg) |
974 | return 0; | |
975 | ||
d459bfe0 PW |
976 | v = omap2_clkdm_clktrctrl_read(clkdm); |
977 | ||
978 | if ((cpu_is_omap34xx() && v == OMAP34XX_CLKSTCTRL_ENABLE_AUTO) || | |
a0219fbd KJ |
979 | (cpu_is_omap24xx() && v == OMAP24XX_CLKSTCTRL_ENABLE_AUTO)) { |
980 | /* Disable HW transitions when we are changing deps */ | |
981 | _omap2_clkdm_set_hwsup(clkdm, 0); | |
d459bfe0 | 982 | _clkdm_del_autodeps(clkdm); |
a0219fbd KJ |
983 | _omap2_clkdm_set_hwsup(clkdm, 1); |
984 | } else { | |
d459bfe0 | 985 | omap2_clkdm_sleep(clkdm); |
a0219fbd | 986 | } |
d459bfe0 | 987 | |
fe617af7 PDS |
988 | pwrdm_clkdm_state_switch(clkdm); |
989 | ||
d459bfe0 PW |
990 | return 0; |
991 | } | |
992 |