Commit | Line | Data |
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dd708413 RN |
1 | /* |
2 | * OMAP44xx Clock Management register bits | |
3 | * | |
4 | * Copyright (C) 2009 Texas Instruments, Inc. | |
5 | * Copyright (C) 2009 Nokia Corporation | |
6 | * | |
7 | * Paul Walmsley (paul@pwsan.com) | |
8 | * Rajendra Nayak (rnayak@ti.com) | |
9 | * Benoit Cousson (b-cousson@ti.com) | |
10 | * | |
11 | * This file is automatically generated from the OMAP hardware databases. | |
12 | * We respectfully ask that any modifications to this file be coordinated | |
13 | * with the public linux-omap@vger.kernel.org mailing list and the | |
14 | * authors above to ensure that the autogeneration scripts are kept | |
15 | * up-to-date with the file contents. | |
16 | * | |
17 | * This program is free software; you can redistribute it and/or modify | |
18 | * it under the terms of the GNU General Public License version 2 as | |
19 | * published by the Free Software Foundation. | |
20 | */ | |
21 | ||
22 | #ifndef __ARCH_ARM_MACH_OMAP2_CM_REGBITS_44XX_H | |
23 | #define __ARCH_ARM_MACH_OMAP2_CM_REGBITS_44XX_H | |
24 | ||
25 | #include "cm.h" | |
26 | ||
27 | ||
28 | /* Used by CM_L3_1_DYNAMICDEP, CM_MPU_DYNAMICDEP, CM_TESLA_DYNAMICDEP */ | |
29 | #define OMAP4430_ABE_DYNDEP_SHIFT (1 << 3) | |
30 | #define OMAP4430_ABE_DYNDEP_MASK BITFIELD(3, 3) | |
31 | ||
32 | /* | |
33 | * Used by CM_D2D_STATICDEP, CM_DUCATI_STATICDEP, CM_SDMA_STATICDEP, | |
34 | * CM_L3INIT_STATICDEP, CM_SDMA_STATICDEP_RESTORE, CM_MPU_STATICDEP, | |
35 | * CM_TESLA_STATICDEP | |
36 | */ | |
37 | #define OMAP4430_ABE_STATDEP_SHIFT (1 << 3) | |
38 | #define OMAP4430_ABE_STATDEP_MASK BITFIELD(3, 3) | |
39 | ||
40 | /* Used by CM_L4CFG_DYNAMICDEP */ | |
41 | #define OMAP4430_ALWONCORE_DYNDEP_SHIFT (1 << 16) | |
42 | #define OMAP4430_ALWONCORE_DYNDEP_MASK BITFIELD(16, 16) | |
43 | ||
44 | /* Used by CM_DUCATI_STATICDEP, CM_MPU_STATICDEP, CM_TESLA_STATICDEP */ | |
45 | #define OMAP4430_ALWONCORE_STATDEP_SHIFT (1 << 16) | |
46 | #define OMAP4430_ALWONCORE_STATDEP_MASK BITFIELD(16, 16) | |
47 | ||
48 | /* | |
49 | * Used by CM_AUTOIDLE_DPLL_PER, CM_AUTOIDLE_DPLL_UNIPRO, CM_AUTOIDLE_DPLL_USB, | |
50 | * CM_AUTOIDLE_DPLL_CORE_RESTORE, CM_AUTOIDLE_DPLL_ABE, CM_AUTOIDLE_DPLL_CORE, | |
51 | * CM_AUTOIDLE_DPLL_DDRPHY, CM_AUTOIDLE_DPLL_IVA, CM_AUTOIDLE_DPLL_MPU | |
52 | */ | |
53 | #define OMAP4430_AUTO_DPLL_MODE_SHIFT (1 << 0) | |
54 | #define OMAP4430_AUTO_DPLL_MODE_MASK BITFIELD(0, 2) | |
55 | ||
56 | /* Used by CM_L4CFG_DYNAMICDEP */ | |
57 | #define OMAP4430_CEFUSE_DYNDEP_SHIFT (1 << 17) | |
58 | #define OMAP4430_CEFUSE_DYNDEP_MASK BITFIELD(17, 17) | |
59 | ||
60 | /* Used by CM_DUCATI_STATICDEP, CM_MPU_STATICDEP, CM_TESLA_STATICDEP */ | |
61 | #define OMAP4430_CEFUSE_STATDEP_SHIFT (1 << 17) | |
62 | #define OMAP4430_CEFUSE_STATDEP_MASK BITFIELD(17, 17) | |
63 | ||
64 | /* Used by CM1_ABE_CLKSTCTRL */ | |
65 | #define OMAP4430_CLKACTIVITY_ABE_24M_GFCLK_SHIFT (1 << 13) | |
66 | #define OMAP4430_CLKACTIVITY_ABE_24M_GFCLK_MASK BITFIELD(13, 13) | |
67 | ||
68 | /* Used by CM1_ABE_CLKSTCTRL */ | |
69 | #define OMAP4430_CLKACTIVITY_ABE_ALWON_32K_CLK_SHIFT (1 << 12) | |
70 | #define OMAP4430_CLKACTIVITY_ABE_ALWON_32K_CLK_MASK BITFIELD(12, 12) | |
71 | ||
72 | /* Used by CM_WKUP_CLKSTCTRL */ | |
73 | #define OMAP4430_CLKACTIVITY_ABE_LP_CLK_SHIFT (1 << 9) | |
74 | #define OMAP4430_CLKACTIVITY_ABE_LP_CLK_MASK BITFIELD(9, 9) | |
75 | ||
76 | /* Used by CM1_ABE_CLKSTCTRL */ | |
77 | #define OMAP4430_CLKACTIVITY_ABE_SYSCLK_SHIFT (1 << 11) | |
78 | #define OMAP4430_CLKACTIVITY_ABE_SYSCLK_MASK BITFIELD(11, 11) | |
79 | ||
80 | /* Used by CM1_ABE_CLKSTCTRL */ | |
81 | #define OMAP4430_CLKACTIVITY_ABE_X2_CLK_SHIFT (1 << 8) | |
82 | #define OMAP4430_CLKACTIVITY_ABE_X2_CLK_MASK BITFIELD(8, 8) | |
83 | ||
84 | /* Used by CM_MEMIF_CLKSTCTRL, CM_MEMIF_CLKSTCTRL_RESTORE */ | |
85 | #define OMAP4430_CLKACTIVITY_ASYNC_DLL_CLK_SHIFT (1 << 11) | |
86 | #define OMAP4430_CLKACTIVITY_ASYNC_DLL_CLK_MASK BITFIELD(11, 11) | |
87 | ||
88 | /* Used by CM_MEMIF_CLKSTCTRL, CM_MEMIF_CLKSTCTRL_RESTORE */ | |
89 | #define OMAP4430_CLKACTIVITY_ASYNC_PHY1_CLK_SHIFT (1 << 12) | |
90 | #define OMAP4430_CLKACTIVITY_ASYNC_PHY1_CLK_MASK BITFIELD(12, 12) | |
91 | ||
92 | /* Used by CM_MEMIF_CLKSTCTRL, CM_MEMIF_CLKSTCTRL_RESTORE */ | |
93 | #define OMAP4430_CLKACTIVITY_ASYNC_PHY2_CLK_SHIFT (1 << 13) | |
94 | #define OMAP4430_CLKACTIVITY_ASYNC_PHY2_CLK_MASK BITFIELD(13, 13) | |
95 | ||
96 | /* Used by CM_CAM_CLKSTCTRL */ | |
97 | #define OMAP4430_CLKACTIVITY_CAM_PHY_CTRL_GCLK_SHIFT (1 << 9) | |
98 | #define OMAP4430_CLKACTIVITY_CAM_PHY_CTRL_GCLK_MASK BITFIELD(9, 9) | |
99 | ||
100 | /* Used by CM_EMU_CLKSTCTRL */ | |
101 | #define OMAP4430_CLKACTIVITY_CORE_DPLL_EMU_CLK_SHIFT (1 << 9) | |
102 | #define OMAP4430_CLKACTIVITY_CORE_DPLL_EMU_CLK_MASK BITFIELD(9, 9) | |
103 | ||
104 | /* Used by CM_CEFUSE_CLKSTCTRL */ | |
105 | #define OMAP4430_CLKACTIVITY_CUST_EFUSE_SYS_CLK_SHIFT (1 << 9) | |
106 | #define OMAP4430_CLKACTIVITY_CUST_EFUSE_SYS_CLK_MASK BITFIELD(9, 9) | |
107 | ||
108 | /* Used by CM_MEMIF_CLKSTCTRL, CM_MEMIF_CLKSTCTRL_RESTORE */ | |
109 | #define OMAP4430_CLKACTIVITY_DLL_CLK_SHIFT (1 << 9) | |
110 | #define OMAP4430_CLKACTIVITY_DLL_CLK_MASK BITFIELD(9, 9) | |
111 | ||
112 | /* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ | |
113 | #define OMAP4430_CLKACTIVITY_DMT10_GFCLK_SHIFT (1 << 9) | |
114 | #define OMAP4430_CLKACTIVITY_DMT10_GFCLK_MASK BITFIELD(9, 9) | |
115 | ||
116 | /* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ | |
117 | #define OMAP4430_CLKACTIVITY_DMT11_GFCLK_SHIFT (1 << 10) | |
118 | #define OMAP4430_CLKACTIVITY_DMT11_GFCLK_MASK BITFIELD(10, 10) | |
119 | ||
120 | /* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ | |
121 | #define OMAP4430_CLKACTIVITY_DMT2_GFCLK_SHIFT (1 << 11) | |
122 | #define OMAP4430_CLKACTIVITY_DMT2_GFCLK_MASK BITFIELD(11, 11) | |
123 | ||
124 | /* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ | |
125 | #define OMAP4430_CLKACTIVITY_DMT3_GFCLK_SHIFT (1 << 12) | |
126 | #define OMAP4430_CLKACTIVITY_DMT3_GFCLK_MASK BITFIELD(12, 12) | |
127 | ||
128 | /* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ | |
129 | #define OMAP4430_CLKACTIVITY_DMT4_GFCLK_SHIFT (1 << 13) | |
130 | #define OMAP4430_CLKACTIVITY_DMT4_GFCLK_MASK BITFIELD(13, 13) | |
131 | ||
132 | /* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ | |
133 | #define OMAP4430_CLKACTIVITY_DMT9_GFCLK_SHIFT (1 << 14) | |
134 | #define OMAP4430_CLKACTIVITY_DMT9_GFCLK_MASK BITFIELD(14, 14) | |
135 | ||
136 | /* Used by CM_DSS_CLKSTCTRL */ | |
137 | #define OMAP4430_CLKACTIVITY_DSS_ALWON_SYS_CLK_SHIFT (1 << 10) | |
138 | #define OMAP4430_CLKACTIVITY_DSS_ALWON_SYS_CLK_MASK BITFIELD(10, 10) | |
139 | ||
140 | /* Used by CM_DSS_CLKSTCTRL */ | |
141 | #define OMAP4430_CLKACTIVITY_DSS_FCLK_SHIFT (1 << 9) | |
142 | #define OMAP4430_CLKACTIVITY_DSS_FCLK_MASK BITFIELD(9, 9) | |
143 | ||
144 | /* Used by CM_DUCATI_CLKSTCTRL */ | |
145 | #define OMAP4430_CLKACTIVITY_DUCATI_GCLK_SHIFT (1 << 8) | |
146 | #define OMAP4430_CLKACTIVITY_DUCATI_GCLK_MASK BITFIELD(8, 8) | |
147 | ||
148 | /* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ | |
149 | #define OMAP4430_CLKACTIVITY_EMAC_50MHZ_CLK_SHIFT (1 << 10) | |
150 | #define OMAP4430_CLKACTIVITY_EMAC_50MHZ_CLK_MASK BITFIELD(10, 10) | |
151 | ||
152 | /* Used by CM_EMU_CLKSTCTRL */ | |
153 | #define OMAP4430_CLKACTIVITY_EMU_SYS_CLK_SHIFT (1 << 8) | |
154 | #define OMAP4430_CLKACTIVITY_EMU_SYS_CLK_MASK BITFIELD(8, 8) | |
155 | ||
156 | /* Used by CM_CAM_CLKSTCTRL */ | |
157 | #define OMAP4430_CLKACTIVITY_FDIF_GFCLK_SHIFT (1 << 10) | |
158 | #define OMAP4430_CLKACTIVITY_FDIF_GFCLK_MASK BITFIELD(10, 10) | |
159 | ||
160 | /* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ | |
161 | #define OMAP4430_CLKACTIVITY_FUNC_12M_GFCLK_SHIFT (1 << 15) | |
162 | #define OMAP4430_CLKACTIVITY_FUNC_12M_GFCLK_MASK BITFIELD(15, 15) | |
163 | ||
164 | /* Used by CM1_ABE_CLKSTCTRL */ | |
165 | #define OMAP4430_CLKACTIVITY_FUNC_24M_GFCLK_SHIFT (1 << 10) | |
166 | #define OMAP4430_CLKACTIVITY_FUNC_24M_GFCLK_MASK BITFIELD(10, 10) | |
167 | ||
168 | /* Used by CM_DSS_CLKSTCTRL */ | |
169 | #define OMAP4430_CLKACTIVITY_HDMI_PHY_48MHZ_GFCLK_SHIFT (1 << 11) | |
170 | #define OMAP4430_CLKACTIVITY_HDMI_PHY_48MHZ_GFCLK_MASK BITFIELD(11, 11) | |
171 | ||
172 | /* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ | |
173 | #define OMAP4430_CLKACTIVITY_HSIC_P1_480M_GFCLK_SHIFT (1 << 20) | |
174 | #define OMAP4430_CLKACTIVITY_HSIC_P1_480M_GFCLK_MASK BITFIELD(20, 20) | |
175 | ||
176 | /* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ | |
177 | #define OMAP4430_CLKACTIVITY_HSIC_P1_GFCLK_SHIFT (1 << 26) | |
178 | #define OMAP4430_CLKACTIVITY_HSIC_P1_GFCLK_MASK BITFIELD(26, 26) | |
179 | ||
180 | /* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ | |
181 | #define OMAP4430_CLKACTIVITY_HSIC_P2_480M_GFCLK_SHIFT (1 << 21) | |
182 | #define OMAP4430_CLKACTIVITY_HSIC_P2_480M_GFCLK_MASK BITFIELD(21, 21) | |
183 | ||
184 | /* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ | |
185 | #define OMAP4430_CLKACTIVITY_HSIC_P2_GFCLK_SHIFT (1 << 27) | |
186 | #define OMAP4430_CLKACTIVITY_HSIC_P2_GFCLK_MASK BITFIELD(27, 27) | |
187 | ||
188 | /* Used by CM_L3INIT_CLKSTCTRL */ | |
189 | #define OMAP4430_CLKACTIVITY_INIT_32K_GFCLK_SHIFT (1 << 31) | |
190 | #define OMAP4430_CLKACTIVITY_INIT_32K_GFCLK_MASK BITFIELD(31, 31) | |
191 | ||
192 | /* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ | |
193 | #define OMAP4430_CLKACTIVITY_INIT_48MC_GFCLK_SHIFT (1 << 13) | |
194 | #define OMAP4430_CLKACTIVITY_INIT_48MC_GFCLK_MASK BITFIELD(13, 13) | |
195 | ||
196 | /* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ | |
197 | #define OMAP4430_CLKACTIVITY_INIT_48M_GFCLK_SHIFT (1 << 12) | |
198 | #define OMAP4430_CLKACTIVITY_INIT_48M_GFCLK_MASK BITFIELD(12, 12) | |
199 | ||
200 | /* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ | |
201 | #define OMAP4430_CLKACTIVITY_INIT_60M_P1_GFCLK_SHIFT (1 << 28) | |
202 | #define OMAP4430_CLKACTIVITY_INIT_60M_P1_GFCLK_MASK BITFIELD(28, 28) | |
203 | ||
204 | /* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ | |
205 | #define OMAP4430_CLKACTIVITY_INIT_60M_P2_GFCLK_SHIFT (1 << 29) | |
206 | #define OMAP4430_CLKACTIVITY_INIT_60M_P2_GFCLK_MASK BITFIELD(29, 29) | |
207 | ||
208 | /* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ | |
209 | #define OMAP4430_CLKACTIVITY_INIT_96M_GFCLK_SHIFT (1 << 11) | |
210 | #define OMAP4430_CLKACTIVITY_INIT_96M_GFCLK_MASK BITFIELD(11, 11) | |
211 | ||
212 | /* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ | |
213 | #define OMAP4430_CLKACTIVITY_INIT_HSI_GFCLK_SHIFT (1 << 16) | |
214 | #define OMAP4430_CLKACTIVITY_INIT_HSI_GFCLK_MASK BITFIELD(16, 16) | |
215 | ||
216 | /* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ | |
217 | #define OMAP4430_CLKACTIVITY_INIT_HSMMC1_GFCLK_SHIFT (1 << 17) | |
218 | #define OMAP4430_CLKACTIVITY_INIT_HSMMC1_GFCLK_MASK BITFIELD(17, 17) | |
219 | ||
220 | /* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ | |
221 | #define OMAP4430_CLKACTIVITY_INIT_HSMMC2_GFCLK_SHIFT (1 << 18) | |
222 | #define OMAP4430_CLKACTIVITY_INIT_HSMMC2_GFCLK_MASK BITFIELD(18, 18) | |
223 | ||
224 | /* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ | |
225 | #define OMAP4430_CLKACTIVITY_INIT_HSMMC6_GFCLK_SHIFT (1 << 19) | |
226 | #define OMAP4430_CLKACTIVITY_INIT_HSMMC6_GFCLK_MASK BITFIELD(19, 19) | |
227 | ||
228 | /* Used by CM_CAM_CLKSTCTRL */ | |
229 | #define OMAP4430_CLKACTIVITY_ISS_GCLK_SHIFT (1 << 8) | |
230 | #define OMAP4430_CLKACTIVITY_ISS_GCLK_MASK BITFIELD(8, 8) | |
231 | ||
232 | /* Used by CM_IVAHD_CLKSTCTRL */ | |
233 | #define OMAP4430_CLKACTIVITY_IVAHD_ROOT_CLK_SHIFT (1 << 8) | |
234 | #define OMAP4430_CLKACTIVITY_IVAHD_ROOT_CLK_MASK BITFIELD(8, 8) | |
235 | ||
236 | /* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ | |
237 | #define OMAP4430_CLKACTIVITY_L3INIT_DPLL_ALWON_CLK_SHIFT (1 << 14) | |
238 | #define OMAP4430_CLKACTIVITY_L3INIT_DPLL_ALWON_CLK_MASK BITFIELD(14, 14) | |
239 | ||
240 | /* Used by CM_L3_1_CLKSTCTRL, CM_L3_1_CLKSTCTRL_RESTORE */ | |
241 | #define OMAP4430_CLKACTIVITY_L3_1_GICLK_SHIFT (1 << 8) | |
242 | #define OMAP4430_CLKACTIVITY_L3_1_GICLK_MASK BITFIELD(8, 8) | |
243 | ||
244 | /* Used by CM_L3_2_CLKSTCTRL, CM_L3_2_CLKSTCTRL_RESTORE */ | |
245 | #define OMAP4430_CLKACTIVITY_L3_2_GICLK_SHIFT (1 << 8) | |
246 | #define OMAP4430_CLKACTIVITY_L3_2_GICLK_MASK BITFIELD(8, 8) | |
247 | ||
248 | /* Used by CM_D2D_CLKSTCTRL */ | |
249 | #define OMAP4430_CLKACTIVITY_L3_D2D_GICLK_SHIFT (1 << 8) | |
250 | #define OMAP4430_CLKACTIVITY_L3_D2D_GICLK_MASK BITFIELD(8, 8) | |
251 | ||
252 | /* Used by CM_SDMA_CLKSTCTRL */ | |
253 | #define OMAP4430_CLKACTIVITY_L3_DMA_GICLK_SHIFT (1 << 8) | |
254 | #define OMAP4430_CLKACTIVITY_L3_DMA_GICLK_MASK BITFIELD(8, 8) | |
255 | ||
256 | /* Used by CM_DSS_CLKSTCTRL */ | |
257 | #define OMAP4430_CLKACTIVITY_L3_DSS_GICLK_SHIFT (1 << 8) | |
258 | #define OMAP4430_CLKACTIVITY_L3_DSS_GICLK_MASK BITFIELD(8, 8) | |
259 | ||
260 | /* Used by CM_MEMIF_CLKSTCTRL, CM_MEMIF_CLKSTCTRL_RESTORE */ | |
261 | #define OMAP4430_CLKACTIVITY_L3_EMIF_GICLK_SHIFT (1 << 8) | |
262 | #define OMAP4430_CLKACTIVITY_L3_EMIF_GICLK_MASK BITFIELD(8, 8) | |
263 | ||
264 | /* Used by CM_GFX_CLKSTCTRL */ | |
265 | #define OMAP4430_CLKACTIVITY_L3_GFX_GICLK_SHIFT (1 << 8) | |
266 | #define OMAP4430_CLKACTIVITY_L3_GFX_GICLK_MASK BITFIELD(8, 8) | |
267 | ||
268 | /* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ | |
269 | #define OMAP4430_CLKACTIVITY_L3_INIT_GICLK_SHIFT (1 << 8) | |
270 | #define OMAP4430_CLKACTIVITY_L3_INIT_GICLK_MASK BITFIELD(8, 8) | |
271 | ||
272 | /* Used by CM_L3INSTR_CLKSTCTRL */ | |
273 | #define OMAP4430_CLKACTIVITY_L3_INSTR_GICLK_SHIFT (1 << 8) | |
274 | #define OMAP4430_CLKACTIVITY_L3_INSTR_GICLK_MASK BITFIELD(8, 8) | |
275 | ||
276 | /* Used by CM_L4SEC_CLKSTCTRL */ | |
277 | #define OMAP4430_CLKACTIVITY_L3_SECURE_GICLK_SHIFT (1 << 8) | |
278 | #define OMAP4430_CLKACTIVITY_L3_SECURE_GICLK_MASK BITFIELD(8, 8) | |
279 | ||
280 | /* Used by CM_ALWON_CLKSTCTRL */ | |
281 | #define OMAP4430_CLKACTIVITY_L4_AO_ICLK_SHIFT (1 << 8) | |
282 | #define OMAP4430_CLKACTIVITY_L4_AO_ICLK_MASK BITFIELD(8, 8) | |
283 | ||
284 | /* Used by CM_CEFUSE_CLKSTCTRL */ | |
285 | #define OMAP4430_CLKACTIVITY_L4_CEFUSE_GICLK_SHIFT (1 << 8) | |
286 | #define OMAP4430_CLKACTIVITY_L4_CEFUSE_GICLK_MASK BITFIELD(8, 8) | |
287 | ||
288 | /* Used by CM_L4CFG_CLKSTCTRL, CM_L4CFG_CLKSTCTRL_RESTORE */ | |
289 | #define OMAP4430_CLKACTIVITY_L4_CFG_GICLK_SHIFT (1 << 8) | |
290 | #define OMAP4430_CLKACTIVITY_L4_CFG_GICLK_MASK BITFIELD(8, 8) | |
291 | ||
292 | /* Used by CM_D2D_CLKSTCTRL */ | |
293 | #define OMAP4430_CLKACTIVITY_L4_D2D_GICLK_SHIFT (1 << 9) | |
294 | #define OMAP4430_CLKACTIVITY_L4_D2D_GICLK_MASK BITFIELD(9, 9) | |
295 | ||
296 | /* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ | |
297 | #define OMAP4430_CLKACTIVITY_L4_INIT_GICLK_SHIFT (1 << 9) | |
298 | #define OMAP4430_CLKACTIVITY_L4_INIT_GICLK_MASK BITFIELD(9, 9) | |
299 | ||
300 | /* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ | |
301 | #define OMAP4430_CLKACTIVITY_L4_PER_GICLK_SHIFT (1 << 8) | |
302 | #define OMAP4430_CLKACTIVITY_L4_PER_GICLK_MASK BITFIELD(8, 8) | |
303 | ||
304 | /* Used by CM_L4SEC_CLKSTCTRL */ | |
305 | #define OMAP4430_CLKACTIVITY_L4_SECURE_GICLK_SHIFT (1 << 9) | |
306 | #define OMAP4430_CLKACTIVITY_L4_SECURE_GICLK_MASK BITFIELD(9, 9) | |
307 | ||
308 | /* Used by CM_WKUP_CLKSTCTRL */ | |
309 | #define OMAP4430_CLKACTIVITY_L4_WKUP_GICLK_SHIFT (1 << 12) | |
310 | #define OMAP4430_CLKACTIVITY_L4_WKUP_GICLK_MASK BITFIELD(12, 12) | |
311 | ||
312 | /* Used by CM_MPU_CLKSTCTRL, CM_MPU_CLKSTCTRL_RESTORE */ | |
313 | #define OMAP4430_CLKACTIVITY_MPU_DPLL_CLK_SHIFT (1 << 8) | |
314 | #define OMAP4430_CLKACTIVITY_MPU_DPLL_CLK_MASK BITFIELD(8, 8) | |
315 | ||
316 | /* Used by CM1_ABE_CLKSTCTRL */ | |
317 | #define OMAP4430_CLKACTIVITY_OCP_ABE_GICLK_SHIFT (1 << 9) | |
318 | #define OMAP4430_CLKACTIVITY_OCP_ABE_GICLK_MASK BITFIELD(9, 9) | |
319 | ||
320 | /* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ | |
321 | #define OMAP4430_CLKACTIVITY_PER_24MC_GFCLK_SHIFT (1 << 16) | |
322 | #define OMAP4430_CLKACTIVITY_PER_24MC_GFCLK_MASK BITFIELD(16, 16) | |
323 | ||
324 | /* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ | |
325 | #define OMAP4430_CLKACTIVITY_PER_32K_GFCLK_SHIFT (1 << 17) | |
326 | #define OMAP4430_CLKACTIVITY_PER_32K_GFCLK_MASK BITFIELD(17, 17) | |
327 | ||
328 | /* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ | |
329 | #define OMAP4430_CLKACTIVITY_PER_48M_GFCLK_SHIFT (1 << 18) | |
330 | #define OMAP4430_CLKACTIVITY_PER_48M_GFCLK_MASK BITFIELD(18, 18) | |
331 | ||
332 | /* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ | |
333 | #define OMAP4430_CLKACTIVITY_PER_96M_GFCLK_SHIFT (1 << 19) | |
334 | #define OMAP4430_CLKACTIVITY_PER_96M_GFCLK_MASK BITFIELD(19, 19) | |
335 | ||
336 | /* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ | |
337 | #define OMAP4430_CLKACTIVITY_PER_ABE_24M_GFCLK_SHIFT (1 << 25) | |
338 | #define OMAP4430_CLKACTIVITY_PER_ABE_24M_GFCLK_MASK BITFIELD(25, 25) | |
339 | ||
340 | /* Used by CM_EMU_CLKSTCTRL */ | |
341 | #define OMAP4430_CLKACTIVITY_PER_DPLL_EMU_CLK_SHIFT (1 << 10) | |
342 | #define OMAP4430_CLKACTIVITY_PER_DPLL_EMU_CLK_MASK BITFIELD(10, 10) | |
343 | ||
344 | /* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ | |
345 | #define OMAP4430_CLKACTIVITY_PER_MCASP2_GFCLK_SHIFT (1 << 20) | |
346 | #define OMAP4430_CLKACTIVITY_PER_MCASP2_GFCLK_MASK BITFIELD(20, 20) | |
347 | ||
348 | /* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ | |
349 | #define OMAP4430_CLKACTIVITY_PER_MCASP3_GFCLK_SHIFT (1 << 21) | |
350 | #define OMAP4430_CLKACTIVITY_PER_MCASP3_GFCLK_MASK BITFIELD(21, 21) | |
351 | ||
352 | /* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ | |
353 | #define OMAP4430_CLKACTIVITY_PER_MCBSP4_GFCLK_SHIFT (1 << 22) | |
354 | #define OMAP4430_CLKACTIVITY_PER_MCBSP4_GFCLK_MASK BITFIELD(22, 22) | |
355 | ||
356 | /* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ | |
357 | #define OMAP4430_CLKACTIVITY_PER_SYS_GFCLK_SHIFT (1 << 24) | |
358 | #define OMAP4430_CLKACTIVITY_PER_SYS_GFCLK_MASK BITFIELD(24, 24) | |
359 | ||
360 | /* Used by CM_MEMIF_CLKSTCTRL, CM_MEMIF_CLKSTCTRL_RESTORE */ | |
361 | #define OMAP4430_CLKACTIVITY_PHY_ROOT_CLK_SHIFT (1 << 10) | |
362 | #define OMAP4430_CLKACTIVITY_PHY_ROOT_CLK_MASK BITFIELD(10, 10) | |
363 | ||
364 | /* Used by CM_GFX_CLKSTCTRL */ | |
365 | #define OMAP4430_CLKACTIVITY_SGX_GFCLK_SHIFT (1 << 9) | |
366 | #define OMAP4430_CLKACTIVITY_SGX_GFCLK_MASK BITFIELD(9, 9) | |
367 | ||
368 | /* Used by CM_ALWON_CLKSTCTRL */ | |
369 | #define OMAP4430_CLKACTIVITY_SR_CORE_SYSCLK_SHIFT (1 << 11) | |
370 | #define OMAP4430_CLKACTIVITY_SR_CORE_SYSCLK_MASK BITFIELD(11, 11) | |
371 | ||
372 | /* Used by CM_ALWON_CLKSTCTRL */ | |
373 | #define OMAP4430_CLKACTIVITY_SR_IVA_SYSCLK_SHIFT (1 << 10) | |
374 | #define OMAP4430_CLKACTIVITY_SR_IVA_SYSCLK_MASK BITFIELD(10, 10) | |
375 | ||
376 | /* Used by CM_ALWON_CLKSTCTRL */ | |
377 | #define OMAP4430_CLKACTIVITY_SR_MPU_SYSCLK_SHIFT (1 << 9) | |
378 | #define OMAP4430_CLKACTIVITY_SR_MPU_SYSCLK_MASK BITFIELD(9, 9) | |
379 | ||
380 | /* Used by CM_WKUP_CLKSTCTRL */ | |
381 | #define OMAP4430_CLKACTIVITY_SYS_CLK_SHIFT (1 << 8) | |
382 | #define OMAP4430_CLKACTIVITY_SYS_CLK_MASK BITFIELD(8, 8) | |
383 | ||
384 | /* Used by CM_TESLA_CLKSTCTRL */ | |
385 | #define OMAP4430_CLKACTIVITY_TESLA_ROOT_CLK_SHIFT (1 << 8) | |
386 | #define OMAP4430_CLKACTIVITY_TESLA_ROOT_CLK_MASK BITFIELD(8, 8) | |
387 | ||
388 | /* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ | |
389 | #define OMAP4430_CLKACTIVITY_TLL_CH0_GFCLK_SHIFT (1 << 22) | |
390 | #define OMAP4430_CLKACTIVITY_TLL_CH0_GFCLK_MASK BITFIELD(22, 22) | |
391 | ||
392 | /* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ | |
393 | #define OMAP4430_CLKACTIVITY_TLL_CH1_GFCLK_SHIFT (1 << 23) | |
394 | #define OMAP4430_CLKACTIVITY_TLL_CH1_GFCLK_MASK BITFIELD(23, 23) | |
395 | ||
396 | /* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ | |
397 | #define OMAP4430_CLKACTIVITY_TLL_CH2_GFCLK_SHIFT (1 << 24) | |
398 | #define OMAP4430_CLKACTIVITY_TLL_CH2_GFCLK_MASK BITFIELD(24, 24) | |
399 | ||
400 | /* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ | |
401 | #define OMAP4430_CLKACTIVITY_USB_DPLL_HS_CLK_SHIFT (1 << 15) | |
402 | #define OMAP4430_CLKACTIVITY_USB_DPLL_HS_CLK_MASK BITFIELD(15, 15) | |
403 | ||
404 | /* Used by CM_WKUP_CLKSTCTRL */ | |
405 | #define OMAP4430_CLKACTIVITY_USIM_GFCLK_SHIFT (1 << 10) | |
406 | #define OMAP4430_CLKACTIVITY_USIM_GFCLK_MASK BITFIELD(10, 10) | |
407 | ||
408 | /* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ | |
409 | #define OMAP4430_CLKACTIVITY_UTMI_P3_GFCLK_SHIFT (1 << 30) | |
410 | #define OMAP4430_CLKACTIVITY_UTMI_P3_GFCLK_MASK BITFIELD(30, 30) | |
411 | ||
412 | /* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ | |
413 | #define OMAP4430_CLKACTIVITY_UTMI_ROOT_GFCLK_SHIFT (1 << 25) | |
414 | #define OMAP4430_CLKACTIVITY_UTMI_ROOT_GFCLK_MASK BITFIELD(25, 25) | |
415 | ||
416 | /* Used by CM_WKUP_CLKSTCTRL */ | |
417 | #define OMAP4430_CLKACTIVITY_WKUP_32K_GFCLK_SHIFT (1 << 11) | |
418 | #define OMAP4430_CLKACTIVITY_WKUP_32K_GFCLK_MASK BITFIELD(11, 11) | |
419 | ||
420 | /* | |
421 | * Used by CM_WKUP_TIMER1_CLKCTRL, CM_L4PER_DMTIMER10_CLKCTRL, | |
422 | * CM_L4PER_DMTIMER11_CLKCTRL, CM_L4PER_DMTIMER2_CLKCTRL, | |
423 | * CM_L4PER_DMTIMER3_CLKCTRL, CM_L4PER_DMTIMER4_CLKCTRL, | |
424 | * CM_L4PER_DMTIMER9_CLKCTRL, CM_L4PER_MCASP2_CLKCTRL, CM_L4PER_MCASP3_CLKCTRL, | |
425 | * CM_L3INIT_MMC1_CLKCTRL, CM_L3INIT_MMC2_CLKCTRL, CM_L3INIT_MMC6_CLKCTRL, | |
426 | * CM1_ABE_TIMER5_CLKCTRL, CM1_ABE_TIMER6_CLKCTRL, CM1_ABE_TIMER7_CLKCTRL, | |
427 | * CM1_ABE_TIMER8_CLKCTRL | |
428 | */ | |
429 | #define OMAP4430_CLKSEL_SHIFT (1 << 24) | |
430 | #define OMAP4430_CLKSEL_MASK BITFIELD(24, 24) | |
431 | ||
432 | /* | |
433 | * Renamed from CLKSEL Used by CM_ABE_DSS_SYS_CLKSEL, CM_ABE_PLL_REF_CLKSEL, | |
434 | * CM_DPLL_SYS_REF_CLKSEL, CM_L4_WKUP_CLKSEL, CM_CLKSEL_DUCATI_ISS_ROOT, | |
435 | * CM_CLKSEL_USB_60MHZ | |
436 | */ | |
437 | #define OMAP4430_CLKSEL_0_0_SHIFT (1 << 0) | |
438 | #define OMAP4430_CLKSEL_0_0_MASK BITFIELD(0, 0) | |
439 | ||
440 | /* Renamed from CLKSEL Used by CM_BYPCLK_DPLL_IVA, CM_BYPCLK_DPLL_MPU */ | |
441 | #define OMAP4430_CLKSEL_0_1_SHIFT (1 << 0) | |
442 | #define OMAP4430_CLKSEL_0_1_MASK BITFIELD(0, 1) | |
443 | ||
444 | /* Renamed from CLKSEL Used by CM_L3INIT_HSI_CLKCTRL */ | |
445 | #define OMAP4430_CLKSEL_24_25_SHIFT (1 << 24) | |
446 | #define OMAP4430_CLKSEL_24_25_MASK BITFIELD(24, 25) | |
447 | ||
448 | /* Used by CM_L3INIT_USB_OTG_CLKCTRL */ | |
449 | #define OMAP4430_CLKSEL_60M_SHIFT (1 << 24) | |
450 | #define OMAP4430_CLKSEL_60M_MASK BITFIELD(24, 24) | |
451 | ||
452 | /* Used by CM1_ABE_AESS_CLKCTRL */ | |
453 | #define OMAP4430_CLKSEL_AESS_FCLK_SHIFT (1 << 24) | |
454 | #define OMAP4430_CLKSEL_AESS_FCLK_MASK BITFIELD(24, 24) | |
455 | ||
456 | /* Used by CM_CLKSEL_CORE_RESTORE, CM_CLKSEL_CORE */ | |
457 | #define OMAP4430_CLKSEL_CORE_SHIFT (1 << 0) | |
458 | #define OMAP4430_CLKSEL_CORE_MASK BITFIELD(0, 0) | |
459 | ||
460 | /* Renamed from CLKSEL_CORE Used by CM_SHADOW_FREQ_CONFIG2 */ | |
461 | #define OMAP4430_CLKSEL_CORE_1_1_SHIFT (1 << 1) | |
462 | #define OMAP4430_CLKSEL_CORE_1_1_MASK BITFIELD(1, 1) | |
463 | ||
464 | /* Used by CM_WKUP_USIM_CLKCTRL */ | |
465 | #define OMAP4430_CLKSEL_DIV_SHIFT (1 << 24) | |
466 | #define OMAP4430_CLKSEL_DIV_MASK BITFIELD(24, 24) | |
467 | ||
468 | /* Used by CM_CAM_FDIF_CLKCTRL */ | |
469 | #define OMAP4430_CLKSEL_FCLK_SHIFT (1 << 24) | |
470 | #define OMAP4430_CLKSEL_FCLK_MASK BITFIELD(24, 25) | |
471 | ||
472 | /* Used by CM_L4PER_MCBSP4_CLKCTRL */ | |
473 | #define OMAP4430_CLKSEL_INTERNAL_SOURCE_SHIFT (1 << 25) | |
474 | #define OMAP4430_CLKSEL_INTERNAL_SOURCE_MASK BITFIELD(25, 25) | |
475 | ||
476 | /* | |
477 | * Renamed from CLKSEL_INTERNAL_SOURCE Used by CM1_ABE_DMIC_CLKCTRL, | |
478 | * CM1_ABE_MCASP_CLKCTRL, CM1_ABE_MCBSP1_CLKCTRL, CM1_ABE_MCBSP2_CLKCTRL, | |
479 | * CM1_ABE_MCBSP3_CLKCTRL | |
480 | */ | |
481 | #define OMAP4430_CLKSEL_INTERNAL_SOURCE_CM1_ABE_DMIC_SHIFT (1 << 26) | |
482 | #define OMAP4430_CLKSEL_INTERNAL_SOURCE_CM1_ABE_DMIC_MASK BITFIELD(26, 27) | |
483 | ||
484 | /* Used by CM_CLKSEL_CORE_RESTORE, CM_CLKSEL_CORE */ | |
485 | #define OMAP4430_CLKSEL_L3_SHIFT (1 << 4) | |
486 | #define OMAP4430_CLKSEL_L3_MASK BITFIELD(4, 4) | |
487 | ||
488 | /* Renamed from CLKSEL_L3 Used by CM_SHADOW_FREQ_CONFIG2 */ | |
489 | #define OMAP4430_CLKSEL_L3_SHADOW_SHIFT (1 << 2) | |
490 | #define OMAP4430_CLKSEL_L3_SHADOW_MASK BITFIELD(2, 2) | |
491 | ||
492 | /* Used by CM_CLKSEL_CORE_RESTORE, CM_CLKSEL_CORE */ | |
493 | #define OMAP4430_CLKSEL_L4_SHIFT (1 << 8) | |
494 | #define OMAP4430_CLKSEL_L4_MASK BITFIELD(8, 8) | |
495 | ||
496 | /* Used by CM_CLKSEL_ABE */ | |
497 | #define OMAP4430_CLKSEL_OPP_SHIFT (1 << 0) | |
498 | #define OMAP4430_CLKSEL_OPP_MASK BITFIELD(0, 1) | |
499 | ||
500 | /* Used by CM_GFX_GFX_CLKCTRL */ | |
501 | #define OMAP4430_CLKSEL_PER_192M_SHIFT (1 << 25) | |
502 | #define OMAP4430_CLKSEL_PER_192M_MASK BITFIELD(25, 26) | |
503 | ||
504 | /* Used by CM_EMU_DEBUGSS_CLKCTRL */ | |
505 | #define OMAP4430_CLKSEL_PMD_STM_CLK_SHIFT (1 << 27) | |
506 | #define OMAP4430_CLKSEL_PMD_STM_CLK_MASK BITFIELD(27, 29) | |
507 | ||
508 | /* Used by CM_EMU_DEBUGSS_CLKCTRL */ | |
509 | #define OMAP4430_CLKSEL_PMD_TRACE_CLK_SHIFT (1 << 24) | |
510 | #define OMAP4430_CLKSEL_PMD_TRACE_CLK_MASK BITFIELD(24, 26) | |
511 | ||
512 | /* Used by CM_GFX_GFX_CLKCTRL */ | |
513 | #define OMAP4430_CLKSEL_SGX_FCLK_SHIFT (1 << 24) | |
514 | #define OMAP4430_CLKSEL_SGX_FCLK_MASK BITFIELD(24, 24) | |
515 | ||
516 | /* | |
517 | * Used by CM1_ABE_DMIC_CLKCTRL, CM1_ABE_MCASP_CLKCTRL, CM1_ABE_MCBSP1_CLKCTRL, | |
518 | * CM1_ABE_MCBSP2_CLKCTRL, CM1_ABE_MCBSP3_CLKCTRL | |
519 | */ | |
520 | #define OMAP4430_CLKSEL_SOURCE_SHIFT (1 << 24) | |
521 | #define OMAP4430_CLKSEL_SOURCE_MASK BITFIELD(24, 25) | |
522 | ||
523 | /* Renamed from CLKSEL_SOURCE Used by CM_L4PER_MCBSP4_CLKCTRL */ | |
524 | #define OMAP4430_CLKSEL_SOURCE_24_24_SHIFT (1 << 24) | |
525 | #define OMAP4430_CLKSEL_SOURCE_24_24_MASK BITFIELD(24, 24) | |
526 | ||
527 | /* Used by CM_L3INIT_USB_HOST_CLKCTRL, CM_L3INIT_USB_HOST_CLKCTRL_RESTORE */ | |
528 | #define OMAP4430_CLKSEL_UTMI_P1_SHIFT (1 << 24) | |
529 | #define OMAP4430_CLKSEL_UTMI_P1_MASK BITFIELD(24, 24) | |
530 | ||
531 | /* Used by CM_L3INIT_USB_HOST_CLKCTRL, CM_L3INIT_USB_HOST_CLKCTRL_RESTORE */ | |
532 | #define OMAP4430_CLKSEL_UTMI_P2_SHIFT (1 << 25) | |
533 | #define OMAP4430_CLKSEL_UTMI_P2_MASK BITFIELD(25, 25) | |
534 | ||
535 | /* | |
536 | * Used by CM_WKUP_CLKSTCTRL, CM_EMU_CLKSTCTRL, CM_D2D_CLKSTCTRL, | |
537 | * CM_DUCATI_CLKSTCTRL, CM_L3INSTR_CLKSTCTRL, CM_L3_1_CLKSTCTRL, | |
538 | * CM_L3_2_CLKSTCTRL, CM_L4CFG_CLKSTCTRL, CM_MEMIF_CLKSTCTRL, | |
539 | * CM_SDMA_CLKSTCTRL, CM_GFX_CLKSTCTRL, CM_L4PER_CLKSTCTRL, CM_L4SEC_CLKSTCTRL, | |
540 | * CM_L3INIT_CLKSTCTRL, CM_CAM_CLKSTCTRL, CM_CEFUSE_CLKSTCTRL, | |
541 | * CM_L3INIT_CLKSTCTRL_RESTORE, CM_L3_1_CLKSTCTRL_RESTORE, | |
542 | * CM_L3_2_CLKSTCTRL_RESTORE, CM_L4CFG_CLKSTCTRL_RESTORE, | |
543 | * CM_L4PER_CLKSTCTRL_RESTORE, CM_MEMIF_CLKSTCTRL_RESTORE, CM_ALWON_CLKSTCTRL, | |
544 | * CM_IVAHD_CLKSTCTRL, CM_DSS_CLKSTCTRL, CM_MPU_CLKSTCTRL, CM_TESLA_CLKSTCTRL, | |
545 | * CM1_ABE_CLKSTCTRL, CM_MPU_CLKSTCTRL_RESTORE | |
546 | */ | |
547 | #define OMAP4430_CLKTRCTRL_SHIFT (1 << 0) | |
548 | #define OMAP4430_CLKTRCTRL_MASK BITFIELD(0, 1) | |
549 | ||
550 | /* Used by CM_EMU_OVERRIDE_DPLL_CORE */ | |
551 | #define OMAP4430_CORE_DPLL_EMU_DIV_SHIFT (1 << 0) | |
552 | #define OMAP4430_CORE_DPLL_EMU_DIV_MASK BITFIELD(0, 6) | |
553 | ||
554 | /* Used by CM_EMU_OVERRIDE_DPLL_CORE */ | |
555 | #define OMAP4430_CORE_DPLL_EMU_MULT_SHIFT (1 << 8) | |
556 | #define OMAP4430_CORE_DPLL_EMU_MULT_MASK BITFIELD(8, 18) | |
557 | ||
558 | /* Used by CM_L3_2_DYNAMICDEP, CM_L4CFG_DYNAMICDEP */ | |
559 | #define OMAP4430_D2D_DYNDEP_SHIFT (1 << 18) | |
560 | #define OMAP4430_D2D_DYNDEP_MASK BITFIELD(18, 18) | |
561 | ||
562 | /* Used by CM_MPU_STATICDEP */ | |
563 | #define OMAP4430_D2D_STATDEP_SHIFT (1 << 18) | |
564 | #define OMAP4430_D2D_STATDEP_MASK BITFIELD(18, 18) | |
565 | ||
566 | /* | |
567 | * Used by CM_SSC_DELTAMSTEP_DPLL_PER, CM_SSC_DELTAMSTEP_DPLL_UNIPRO, | |
568 | * CM_SSC_DELTAMSTEP_DPLL_USB, CM_SSC_DELTAMSTEP_DPLL_CORE_RESTORE, | |
569 | * CM_SSC_DELTAMSTEP_DPLL_ABE, CM_SSC_DELTAMSTEP_DPLL_CORE, | |
570 | * CM_SSC_DELTAMSTEP_DPLL_DDRPHY, CM_SSC_DELTAMSTEP_DPLL_IVA, | |
571 | * CM_SSC_DELTAMSTEP_DPLL_MPU | |
572 | */ | |
573 | #define OMAP4430_DELTAMSTEP_SHIFT (1 << 0) | |
574 | #define OMAP4430_DELTAMSTEP_MASK BITFIELD(0, 19) | |
575 | ||
576 | /* Used by CM_SHADOW_FREQ_CONFIG1_RESTORE, CM_SHADOW_FREQ_CONFIG1 */ | |
577 | #define OMAP4430_DLL_OVERRIDE_SHIFT (1 << 2) | |
578 | #define OMAP4430_DLL_OVERRIDE_MASK BITFIELD(2, 2) | |
579 | ||
580 | /* Renamed from DLL_OVERRIDE Used by CM_DLL_CTRL */ | |
581 | #define OMAP4430_DLL_OVERRIDE_0_0_SHIFT (1 << 0) | |
582 | #define OMAP4430_DLL_OVERRIDE_0_0_MASK BITFIELD(0, 0) | |
583 | ||
584 | /* Used by CM_SHADOW_FREQ_CONFIG1_RESTORE, CM_SHADOW_FREQ_CONFIG1 */ | |
585 | #define OMAP4430_DLL_RESET_SHIFT (1 << 3) | |
586 | #define OMAP4430_DLL_RESET_MASK BITFIELD(3, 3) | |
587 | ||
588 | /* | |
589 | * Used by CM_CLKSEL_DPLL_PER, CM_CLKSEL_DPLL_UNIPRO, CM_CLKSEL_DPLL_USB, | |
590 | * CM_CLKSEL_DPLL_CORE_RESTORE, CM_CLKSEL_DPLL_ABE, CM_CLKSEL_DPLL_CORE, | |
591 | * CM_CLKSEL_DPLL_DDRPHY, CM_CLKSEL_DPLL_IVA, CM_CLKSEL_DPLL_MPU | |
592 | */ | |
593 | #define OMAP4430_DPLL_BYP_CLKSEL_SHIFT (1 << 23) | |
594 | #define OMAP4430_DPLL_BYP_CLKSEL_MASK BITFIELD(23, 23) | |
595 | ||
596 | /* Used by CM_CLKDCOLDO_DPLL_USB */ | |
597 | #define OMAP4430_DPLL_CLKDCOLDO_GATE_CTRL_SHIFT (1 << 8) | |
598 | #define OMAP4430_DPLL_CLKDCOLDO_GATE_CTRL_MASK BITFIELD(8, 8) | |
599 | ||
600 | /* Used by CM_CLKSEL_DPLL_CORE_RESTORE, CM_CLKSEL_DPLL_CORE */ | |
601 | #define OMAP4430_DPLL_CLKOUTHIF_CLKSEL_SHIFT (1 << 20) | |
602 | #define OMAP4430_DPLL_CLKOUTHIF_CLKSEL_MASK BITFIELD(20, 20) | |
603 | ||
604 | /* | |
605 | * Used by CM_DIV_M3_DPLL_PER, CM_DIV_M3_DPLL_CORE_RESTORE, CM_DIV_M3_DPLL_ABE, | |
606 | * CM_DIV_M3_DPLL_CORE | |
607 | */ | |
608 | #define OMAP4430_DPLL_CLKOUTHIF_DIV_SHIFT (1 << 0) | |
609 | #define OMAP4430_DPLL_CLKOUTHIF_DIV_MASK BITFIELD(0, 4) | |
610 | ||
611 | /* | |
612 | * Used by CM_DIV_M3_DPLL_PER, CM_DIV_M3_DPLL_CORE_RESTORE, CM_DIV_M3_DPLL_ABE, | |
613 | * CM_DIV_M3_DPLL_CORE | |
614 | */ | |
615 | #define OMAP4430_DPLL_CLKOUTHIF_DIVCHACK_SHIFT (1 << 5) | |
616 | #define OMAP4430_DPLL_CLKOUTHIF_DIVCHACK_MASK BITFIELD(5, 5) | |
617 | ||
618 | /* | |
619 | * Used by CM_DIV_M3_DPLL_PER, CM_DIV_M3_DPLL_CORE_RESTORE, CM_DIV_M3_DPLL_ABE, | |
620 | * CM_DIV_M3_DPLL_CORE | |
621 | */ | |
622 | #define OMAP4430_DPLL_CLKOUTHIF_GATE_CTRL_SHIFT (1 << 8) | |
623 | #define OMAP4430_DPLL_CLKOUTHIF_GATE_CTRL_MASK BITFIELD(8, 8) | |
624 | ||
625 | /* Used by CM_DIV_M2_DPLL_PER, CM_DIV_M2_DPLL_UNIPRO, CM_DIV_M2_DPLL_ABE */ | |
626 | #define OMAP4430_DPLL_CLKOUTX2_GATE_CTRL_SHIFT (1 << 10) | |
627 | #define OMAP4430_DPLL_CLKOUTX2_GATE_CTRL_MASK BITFIELD(10, 10) | |
628 | ||
629 | /* | |
630 | * Used by CM_DIV_M2_DPLL_PER, CM_DIV_M2_DPLL_UNIPRO, | |
631 | * CM_DIV_M2_DPLL_CORE_RESTORE, CM_DIV_M2_DPLL_ABE, CM_DIV_M2_DPLL_CORE, | |
632 | * CM_DIV_M2_DPLL_DDRPHY, CM_DIV_M2_DPLL_MPU | |
633 | */ | |
634 | #define OMAP4430_DPLL_CLKOUT_DIV_SHIFT (1 << 0) | |
635 | #define OMAP4430_DPLL_CLKOUT_DIV_MASK BITFIELD(0, 4) | |
636 | ||
637 | /* Renamed from DPLL_CLKOUT_DIV Used by CM_DIV_M2_DPLL_USB */ | |
638 | #define OMAP4430_DPLL_CLKOUT_DIV_0_6_SHIFT (1 << 0) | |
639 | #define OMAP4430_DPLL_CLKOUT_DIV_0_6_MASK BITFIELD(0, 6) | |
640 | ||
641 | /* | |
642 | * Used by CM_DIV_M2_DPLL_PER, CM_DIV_M2_DPLL_UNIPRO, | |
643 | * CM_DIV_M2_DPLL_CORE_RESTORE, CM_DIV_M2_DPLL_ABE, CM_DIV_M2_DPLL_CORE, | |
644 | * CM_DIV_M2_DPLL_DDRPHY, CM_DIV_M2_DPLL_MPU | |
645 | */ | |
646 | #define OMAP4430_DPLL_CLKOUT_DIVCHACK_SHIFT (1 << 5) | |
647 | #define OMAP4430_DPLL_CLKOUT_DIVCHACK_MASK BITFIELD(5, 5) | |
648 | ||
649 | /* Renamed from DPLL_CLKOUT_DIVCHACK Used by CM_DIV_M2_DPLL_USB */ | |
650 | #define OMAP4430_DPLL_CLKOUT_DIVCHACK_M2_USB_SHIFT (1 << 7) | |
651 | #define OMAP4430_DPLL_CLKOUT_DIVCHACK_M2_USB_MASK BITFIELD(7, 7) | |
652 | ||
653 | /* | |
654 | * Used by CM_DIV_M2_DPLL_PER, CM_DIV_M2_DPLL_USB, CM_DIV_M2_DPLL_CORE_RESTORE, | |
655 | * CM_DIV_M2_DPLL_ABE, CM_DIV_M2_DPLL_CORE, CM_DIV_M2_DPLL_DDRPHY, | |
656 | * CM_DIV_M2_DPLL_MPU | |
657 | */ | |
658 | #define OMAP4430_DPLL_CLKOUT_GATE_CTRL_SHIFT (1 << 8) | |
659 | #define OMAP4430_DPLL_CLKOUT_GATE_CTRL_MASK BITFIELD(8, 8) | |
660 | ||
661 | /* Used by CM_SHADOW_FREQ_CONFIG1_RESTORE, CM_SHADOW_FREQ_CONFIG1 */ | |
662 | #define OMAP4430_DPLL_CORE_DPLL_EN_SHIFT (1 << 8) | |
663 | #define OMAP4430_DPLL_CORE_DPLL_EN_MASK BITFIELD(8, 10) | |
664 | ||
665 | /* Used by CM_SHADOW_FREQ_CONFIG1_RESTORE, CM_SHADOW_FREQ_CONFIG1 */ | |
666 | #define OMAP4430_DPLL_CORE_M2_DIV_SHIFT (1 << 11) | |
667 | #define OMAP4430_DPLL_CORE_M2_DIV_MASK BITFIELD(11, 15) | |
668 | ||
669 | /* Used by CM_SHADOW_FREQ_CONFIG2 */ | |
670 | #define OMAP4430_DPLL_CORE_M5_DIV_SHIFT (1 << 3) | |
671 | #define OMAP4430_DPLL_CORE_M5_DIV_MASK BITFIELD(3, 7) | |
672 | ||
673 | /* Used by CM_SHADOW_FREQ_CONFIG1_RESTORE, CM_SHADOW_FREQ_CONFIG1 */ | |
674 | #define OMAP4430_DPLL_CORE_SYS_REF_CLKSEL_SHIFT (1 << 1) | |
675 | #define OMAP4430_DPLL_CORE_SYS_REF_CLKSEL_MASK BITFIELD(1, 1) | |
676 | ||
677 | /* | |
678 | * Used by CM_CLKSEL_DPLL_PER, CM_CLKSEL_DPLL_UNIPRO, | |
679 | * CM_CLKSEL_DPLL_CORE_RESTORE, CM_CLKSEL_DPLL_ABE, CM_CLKSEL_DPLL_CORE, | |
680 | * CM_CLKSEL_DPLL_DDRPHY, CM_CLKSEL_DPLL_IVA, CM_CLKSEL_DPLL_MPU | |
681 | */ | |
682 | #define OMAP4430_DPLL_DIV_SHIFT (1 << 0) | |
683 | #define OMAP4430_DPLL_DIV_MASK BITFIELD(0, 6) | |
684 | ||
685 | /* Renamed from DPLL_DIV Used by CM_CLKSEL_DPLL_USB */ | |
686 | #define OMAP4430_DPLL_DIV_0_7_SHIFT (1 << 0) | |
687 | #define OMAP4430_DPLL_DIV_0_7_MASK BITFIELD(0, 7) | |
688 | ||
689 | /* | |
690 | * Used by CM_CLKMODE_DPLL_PER, CM_CLKMODE_DPLL_USB, | |
691 | * CM_CLKMODE_DPLL_CORE_RESTORE, CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE, | |
692 | * CM_CLKMODE_DPLL_DDRPHY, CM_CLKMODE_DPLL_IVA, CM_CLKMODE_DPLL_MPU | |
693 | */ | |
694 | #define OMAP4430_DPLL_DRIFTGUARD_EN_SHIFT (1 << 8) | |
695 | #define OMAP4430_DPLL_DRIFTGUARD_EN_MASK BITFIELD(8, 8) | |
696 | ||
697 | /* Renamed from DPLL_DRIFTGUARD_EN Used by CM_CLKMODE_DPLL_UNIPRO */ | |
698 | #define OMAP4430_DPLL_DRIFTGUARD_EN_3_3_SHIFT (1 << 3) | |
699 | #define OMAP4430_DPLL_DRIFTGUARD_EN_3_3_MASK BITFIELD(3, 3) | |
700 | ||
701 | /* | |
702 | * Used by CM_CLKMODE_DPLL_PER, CM_CLKMODE_DPLL_UNIPRO, CM_CLKMODE_DPLL_USB, | |
703 | * CM_CLKMODE_DPLL_CORE_RESTORE, CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE, | |
704 | * CM_CLKMODE_DPLL_DDRPHY, CM_CLKMODE_DPLL_IVA, CM_CLKMODE_DPLL_MPU | |
705 | */ | |
706 | #define OMAP4430_DPLL_EN_SHIFT (1 << 0) | |
707 | #define OMAP4430_DPLL_EN_MASK BITFIELD(0, 2) | |
708 | ||
709 | /* | |
710 | * Used by CM_CLKMODE_DPLL_PER, CM_CLKMODE_DPLL_UNIPRO, | |
711 | * CM_CLKMODE_DPLL_CORE_RESTORE, CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE, | |
712 | * CM_CLKMODE_DPLL_DDRPHY, CM_CLKMODE_DPLL_IVA, CM_CLKMODE_DPLL_MPU | |
713 | */ | |
714 | #define OMAP4430_DPLL_LPMODE_EN_SHIFT (1 << 10) | |
715 | #define OMAP4430_DPLL_LPMODE_EN_MASK BITFIELD(10, 10) | |
716 | ||
717 | /* | |
718 | * Used by CM_CLKSEL_DPLL_PER, CM_CLKSEL_DPLL_UNIPRO, | |
719 | * CM_CLKSEL_DPLL_CORE_RESTORE, CM_CLKSEL_DPLL_ABE, CM_CLKSEL_DPLL_CORE, | |
720 | * CM_CLKSEL_DPLL_DDRPHY, CM_CLKSEL_DPLL_IVA, CM_CLKSEL_DPLL_MPU | |
721 | */ | |
722 | #define OMAP4430_DPLL_MULT_SHIFT (1 << 8) | |
723 | #define OMAP4430_DPLL_MULT_MASK BITFIELD(8, 18) | |
724 | ||
725 | /* Renamed from DPLL_MULT Used by CM_CLKSEL_DPLL_USB */ | |
726 | #define OMAP4430_DPLL_MULT_USB_SHIFT (1 << 8) | |
727 | #define OMAP4430_DPLL_MULT_USB_MASK BITFIELD(8, 19) | |
728 | ||
729 | /* | |
730 | * Used by CM_CLKMODE_DPLL_PER, CM_CLKMODE_DPLL_UNIPRO, | |
731 | * CM_CLKMODE_DPLL_CORE_RESTORE, CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE, | |
732 | * CM_CLKMODE_DPLL_DDRPHY, CM_CLKMODE_DPLL_IVA, CM_CLKMODE_DPLL_MPU | |
733 | */ | |
734 | #define OMAP4430_DPLL_REGM4XEN_SHIFT (1 << 11) | |
735 | #define OMAP4430_DPLL_REGM4XEN_MASK BITFIELD(11, 11) | |
736 | ||
737 | /* Used by CM_CLKSEL_DPLL_USB */ | |
738 | #define OMAP4430_DPLL_SD_DIV_SHIFT (1 << 24) | |
739 | #define OMAP4430_DPLL_SD_DIV_MASK BITFIELD(24, 31) | |
740 | ||
741 | /* | |
742 | * Used by CM_CLKMODE_DPLL_PER, CM_CLKMODE_DPLL_UNIPRO, CM_CLKMODE_DPLL_USB, | |
743 | * CM_CLKMODE_DPLL_CORE_RESTORE, CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE, | |
744 | * CM_CLKMODE_DPLL_DDRPHY, CM_CLKMODE_DPLL_IVA, CM_CLKMODE_DPLL_MPU | |
745 | */ | |
746 | #define OMAP4430_DPLL_SSC_ACK_SHIFT (1 << 13) | |
747 | #define OMAP4430_DPLL_SSC_ACK_MASK BITFIELD(13, 13) | |
748 | ||
749 | /* | |
750 | * Used by CM_CLKMODE_DPLL_PER, CM_CLKMODE_DPLL_UNIPRO, CM_CLKMODE_DPLL_USB, | |
751 | * CM_CLKMODE_DPLL_CORE_RESTORE, CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE, | |
752 | * CM_CLKMODE_DPLL_DDRPHY, CM_CLKMODE_DPLL_IVA, CM_CLKMODE_DPLL_MPU | |
753 | */ | |
754 | #define OMAP4430_DPLL_SSC_DOWNSPREAD_SHIFT (1 << 14) | |
755 | #define OMAP4430_DPLL_SSC_DOWNSPREAD_MASK BITFIELD(14, 14) | |
756 | ||
757 | /* | |
758 | * Used by CM_CLKMODE_DPLL_PER, CM_CLKMODE_DPLL_UNIPRO, CM_CLKMODE_DPLL_USB, | |
759 | * CM_CLKMODE_DPLL_CORE_RESTORE, CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE, | |
760 | * CM_CLKMODE_DPLL_DDRPHY, CM_CLKMODE_DPLL_IVA, CM_CLKMODE_DPLL_MPU | |
761 | */ | |
762 | #define OMAP4430_DPLL_SSC_EN_SHIFT (1 << 12) | |
763 | #define OMAP4430_DPLL_SSC_EN_MASK BITFIELD(12, 12) | |
764 | ||
765 | /* Used by CM_L3_2_DYNAMICDEP, CM_L4CFG_DYNAMICDEP, CM_L4PER_DYNAMICDEP */ | |
766 | #define OMAP4430_DSS_DYNDEP_SHIFT (1 << 8) | |
767 | #define OMAP4430_DSS_DYNDEP_MASK BITFIELD(8, 8) | |
768 | ||
769 | /* | |
770 | * Used by CM_DUCATI_STATICDEP, CM_SDMA_STATICDEP, CM_SDMA_STATICDEP_RESTORE, | |
771 | * CM_MPU_STATICDEP | |
772 | */ | |
773 | #define OMAP4430_DSS_STATDEP_SHIFT (1 << 8) | |
774 | #define OMAP4430_DSS_STATDEP_MASK BITFIELD(8, 8) | |
775 | ||
776 | /* Used by CM_L3_2_DYNAMICDEP */ | |
777 | #define OMAP4430_DUCATI_DYNDEP_SHIFT (1 << 0) | |
778 | #define OMAP4430_DUCATI_DYNDEP_MASK BITFIELD(0, 0) | |
779 | ||
780 | /* Used by CM_SDMA_STATICDEP, CM_SDMA_STATICDEP_RESTORE, CM_MPU_STATICDEP */ | |
781 | #define OMAP4430_DUCATI_STATDEP_SHIFT (1 << 0) | |
782 | #define OMAP4430_DUCATI_STATDEP_MASK BITFIELD(0, 0) | |
783 | ||
784 | /* Used by CM_SHADOW_FREQ_CONFIG1_RESTORE, CM_SHADOW_FREQ_CONFIG1 */ | |
785 | #define OMAP4430_FREQ_UPDATE_SHIFT (1 << 0) | |
786 | #define OMAP4430_FREQ_UPDATE_MASK BITFIELD(0, 0) | |
787 | ||
788 | /* Used by CM_L3_2_DYNAMICDEP */ | |
789 | #define OMAP4430_GFX_DYNDEP_SHIFT (1 << 10) | |
790 | #define OMAP4430_GFX_DYNDEP_MASK BITFIELD(10, 10) | |
791 | ||
792 | /* Used by CM_DUCATI_STATICDEP, CM_MPU_STATICDEP */ | |
793 | #define OMAP4430_GFX_STATDEP_SHIFT (1 << 10) | |
794 | #define OMAP4430_GFX_STATDEP_MASK BITFIELD(10, 10) | |
795 | ||
796 | /* Used by CM_SHADOW_FREQ_CONFIG2 */ | |
797 | #define OMAP4430_GPMC_FREQ_UPDATE_SHIFT (1 << 0) | |
798 | #define OMAP4430_GPMC_FREQ_UPDATE_MASK BITFIELD(0, 0) | |
799 | ||
800 | /* | |
801 | * Used by CM_DIV_M4_DPLL_PER, CM_DIV_M4_DPLL_CORE_RESTORE, | |
802 | * CM_DIV_M4_DPLL_CORE, CM_DIV_M4_DPLL_DDRPHY, CM_DIV_M4_DPLL_IVA | |
803 | */ | |
804 | #define OMAP4430_HSDIVIDER_CLKOUT1_DIV_SHIFT (1 << 0) | |
805 | #define OMAP4430_HSDIVIDER_CLKOUT1_DIV_MASK BITFIELD(0, 4) | |
806 | ||
807 | /* | |
808 | * Used by CM_DIV_M4_DPLL_PER, CM_DIV_M4_DPLL_CORE_RESTORE, | |
809 | * CM_DIV_M4_DPLL_CORE, CM_DIV_M4_DPLL_DDRPHY, CM_DIV_M4_DPLL_IVA | |
810 | */ | |
811 | #define OMAP4430_HSDIVIDER_CLKOUT1_DIVCHACK_SHIFT (1 << 5) | |
812 | #define OMAP4430_HSDIVIDER_CLKOUT1_DIVCHACK_MASK BITFIELD(5, 5) | |
813 | ||
814 | /* | |
815 | * Used by CM_DIV_M4_DPLL_PER, CM_DIV_M4_DPLL_CORE_RESTORE, | |
816 | * CM_DIV_M4_DPLL_CORE, CM_DIV_M4_DPLL_DDRPHY, CM_DIV_M4_DPLL_IVA | |
817 | */ | |
818 | #define OMAP4430_HSDIVIDER_CLKOUT1_GATE_CTRL_SHIFT (1 << 8) | |
819 | #define OMAP4430_HSDIVIDER_CLKOUT1_GATE_CTRL_MASK BITFIELD(8, 8) | |
820 | ||
821 | /* | |
822 | * Used by CM_DIV_M4_DPLL_PER, CM_DIV_M4_DPLL_CORE_RESTORE, | |
823 | * CM_DIV_M4_DPLL_CORE, CM_DIV_M4_DPLL_DDRPHY, CM_DIV_M4_DPLL_IVA | |
824 | */ | |
825 | #define OMAP4430_HSDIVIDER_CLKOUT1_PWDN_SHIFT (1 << 12) | |
826 | #define OMAP4430_HSDIVIDER_CLKOUT1_PWDN_MASK BITFIELD(12, 12) | |
827 | ||
828 | /* | |
829 | * Used by CM_DIV_M5_DPLL_PER, CM_DIV_M5_DPLL_CORE_RESTORE, | |
830 | * CM_DIV_M5_DPLL_CORE, CM_DIV_M5_DPLL_DDRPHY, CM_DIV_M5_DPLL_IVA | |
831 | */ | |
832 | #define OMAP4430_HSDIVIDER_CLKOUT2_DIV_SHIFT (1 << 0) | |
833 | #define OMAP4430_HSDIVIDER_CLKOUT2_DIV_MASK BITFIELD(0, 4) | |
834 | ||
835 | /* | |
836 | * Used by CM_DIV_M5_DPLL_PER, CM_DIV_M5_DPLL_CORE_RESTORE, | |
837 | * CM_DIV_M5_DPLL_CORE, CM_DIV_M5_DPLL_DDRPHY, CM_DIV_M5_DPLL_IVA | |
838 | */ | |
839 | #define OMAP4430_HSDIVIDER_CLKOUT2_DIVCHACK_SHIFT (1 << 5) | |
840 | #define OMAP4430_HSDIVIDER_CLKOUT2_DIVCHACK_MASK BITFIELD(5, 5) | |
841 | ||
842 | /* | |
843 | * Used by CM_DIV_M5_DPLL_PER, CM_DIV_M5_DPLL_CORE_RESTORE, | |
844 | * CM_DIV_M5_DPLL_CORE, CM_DIV_M5_DPLL_DDRPHY, CM_DIV_M5_DPLL_IVA | |
845 | */ | |
846 | #define OMAP4430_HSDIVIDER_CLKOUT2_GATE_CTRL_SHIFT (1 << 8) | |
847 | #define OMAP4430_HSDIVIDER_CLKOUT2_GATE_CTRL_MASK BITFIELD(8, 8) | |
848 | ||
849 | /* | |
850 | * Used by CM_DIV_M5_DPLL_PER, CM_DIV_M5_DPLL_CORE_RESTORE, | |
851 | * CM_DIV_M5_DPLL_CORE, CM_DIV_M5_DPLL_DDRPHY, CM_DIV_M5_DPLL_IVA | |
852 | */ | |
853 | #define OMAP4430_HSDIVIDER_CLKOUT2_PWDN_SHIFT (1 << 12) | |
854 | #define OMAP4430_HSDIVIDER_CLKOUT2_PWDN_MASK BITFIELD(12, 12) | |
855 | ||
856 | /* | |
857 | * Used by CM_DIV_M6_DPLL_PER, CM_DIV_M6_DPLL_CORE_RESTORE, | |
858 | * CM_DIV_M6_DPLL_CORE, CM_DIV_M6_DPLL_DDRPHY | |
859 | */ | |
860 | #define OMAP4430_HSDIVIDER_CLKOUT3_DIV_SHIFT (1 << 0) | |
861 | #define OMAP4430_HSDIVIDER_CLKOUT3_DIV_MASK BITFIELD(0, 4) | |
862 | ||
863 | /* | |
864 | * Used by CM_DIV_M6_DPLL_PER, CM_DIV_M6_DPLL_CORE_RESTORE, | |
865 | * CM_DIV_M6_DPLL_CORE, CM_DIV_M6_DPLL_DDRPHY | |
866 | */ | |
867 | #define OMAP4430_HSDIVIDER_CLKOUT3_DIVCHACK_SHIFT (1 << 5) | |
868 | #define OMAP4430_HSDIVIDER_CLKOUT3_DIVCHACK_MASK BITFIELD(5, 5) | |
869 | ||
870 | /* | |
871 | * Used by CM_DIV_M6_DPLL_PER, CM_DIV_M6_DPLL_CORE_RESTORE, | |
872 | * CM_DIV_M6_DPLL_CORE, CM_DIV_M6_DPLL_DDRPHY | |
873 | */ | |
874 | #define OMAP4430_HSDIVIDER_CLKOUT3_GATE_CTRL_SHIFT (1 << 8) | |
875 | #define OMAP4430_HSDIVIDER_CLKOUT3_GATE_CTRL_MASK BITFIELD(8, 8) | |
876 | ||
877 | /* | |
878 | * Used by CM_DIV_M6_DPLL_PER, CM_DIV_M6_DPLL_CORE_RESTORE, | |
879 | * CM_DIV_M6_DPLL_CORE, CM_DIV_M6_DPLL_DDRPHY | |
880 | */ | |
881 | #define OMAP4430_HSDIVIDER_CLKOUT3_PWDN_SHIFT (1 << 12) | |
882 | #define OMAP4430_HSDIVIDER_CLKOUT3_PWDN_MASK BITFIELD(12, 12) | |
883 | ||
884 | /* | |
885 | * Used by CM_DIV_M7_DPLL_PER, CM_DIV_M7_DPLL_CORE_RESTORE, | |
886 | * CM_DIV_M7_DPLL_CORE | |
887 | */ | |
888 | #define OMAP4430_HSDIVIDER_CLKOUT4_DIV_SHIFT (1 << 0) | |
889 | #define OMAP4430_HSDIVIDER_CLKOUT4_DIV_MASK BITFIELD(0, 4) | |
890 | ||
891 | /* | |
892 | * Used by CM_DIV_M7_DPLL_PER, CM_DIV_M7_DPLL_CORE_RESTORE, | |
893 | * CM_DIV_M7_DPLL_CORE | |
894 | */ | |
895 | #define OMAP4430_HSDIVIDER_CLKOUT4_DIVCHACK_SHIFT (1 << 5) | |
896 | #define OMAP4430_HSDIVIDER_CLKOUT4_DIVCHACK_MASK BITFIELD(5, 5) | |
897 | ||
898 | /* | |
899 | * Used by CM_DIV_M7_DPLL_PER, CM_DIV_M7_DPLL_CORE_RESTORE, | |
900 | * CM_DIV_M7_DPLL_CORE | |
901 | */ | |
902 | #define OMAP4430_HSDIVIDER_CLKOUT4_GATE_CTRL_SHIFT (1 << 8) | |
903 | #define OMAP4430_HSDIVIDER_CLKOUT4_GATE_CTRL_MASK BITFIELD(8, 8) | |
904 | ||
905 | /* | |
906 | * Used by CM_DIV_M7_DPLL_PER, CM_DIV_M7_DPLL_CORE_RESTORE, | |
907 | * CM_DIV_M7_DPLL_CORE | |
908 | */ | |
909 | #define OMAP4430_HSDIVIDER_CLKOUT4_PWDN_SHIFT (1 << 12) | |
910 | #define OMAP4430_HSDIVIDER_CLKOUT4_PWDN_MASK BITFIELD(12, 12) | |
911 | ||
912 | /* | |
913 | * Used by PRM_PRM_PROFILING_CLKCTRL, CM_WKUP_GPIO1_CLKCTRL, | |
914 | * CM_WKUP_KEYBOARD_CLKCTRL, CM_WKUP_L4WKUP_CLKCTRL, CM_WKUP_RTC_CLKCTRL, | |
915 | * CM_WKUP_SARRAM_CLKCTRL, CM_WKUP_SYNCTIMER_CLKCTRL, CM_WKUP_TIMER12_CLKCTRL, | |
916 | * CM_WKUP_TIMER1_CLKCTRL, CM_WKUP_USIM_CLKCTRL, CM_WKUP_WDT1_CLKCTRL, | |
917 | * CM_WKUP_WDT2_CLKCTRL, CM_EMU_DEBUGSS_CLKCTRL, CM_D2D_MODEM_ICR_CLKCTRL, | |
918 | * CM_D2D_SAD2D_CLKCTRL, CM_D2D_SAD2D_FW_CLKCTRL, CM_DUCATI_DUCATI_CLKCTRL, | |
919 | * CM_L3INSTR_L3_3_CLKCTRL, CM_L3INSTR_L3_INSTR_CLKCTRL, | |
920 | * CM_L3INSTR_OCP_WP1_CLKCTRL, CM_L3_1_L3_1_CLKCTRL, CM_L3_2_GPMC_CLKCTRL, | |
921 | * CM_L3_2_L3_2_CLKCTRL, CM_L3_2_OCMC_RAM_CLKCTRL, CM_L4CFG_HW_SEM_CLKCTRL, | |
922 | * CM_L4CFG_L4_CFG_CLKCTRL, CM_L4CFG_MAILBOX_CLKCTRL, CM_L4CFG_SAR_ROM_CLKCTRL, | |
923 | * CM_MEMIF_DMM_CLKCTRL, CM_MEMIF_EMIF_1_CLKCTRL, CM_MEMIF_EMIF_2_CLKCTRL, | |
924 | * CM_MEMIF_EMIF_FW_CLKCTRL, CM_MEMIF_EMIF_H1_CLKCTRL, | |
925 | * CM_MEMIF_EMIF_H2_CLKCTRL, CM_SDMA_SDMA_CLKCTRL, CM_GFX_GFX_CLKCTRL, | |
926 | * CM_L4PER_ADC_CLKCTRL, CM_L4PER_DMTIMER10_CLKCTRL, | |
927 | * CM_L4PER_DMTIMER11_CLKCTRL, CM_L4PER_DMTIMER2_CLKCTRL, | |
928 | * CM_L4PER_DMTIMER3_CLKCTRL, CM_L4PER_DMTIMER4_CLKCTRL, | |
929 | * CM_L4PER_DMTIMER9_CLKCTRL, CM_L4PER_ELM_CLKCTRL, CM_L4PER_GPIO2_CLKCTRL, | |
930 | * CM_L4PER_GPIO3_CLKCTRL, CM_L4PER_GPIO4_CLKCTRL, CM_L4PER_GPIO5_CLKCTRL, | |
931 | * CM_L4PER_GPIO6_CLKCTRL, CM_L4PER_HDQ1W_CLKCTRL, CM_L4PER_HECC1_CLKCTRL, | |
932 | * CM_L4PER_HECC2_CLKCTRL, CM_L4PER_I2C1_CLKCTRL, CM_L4PER_I2C2_CLKCTRL, | |
933 | * CM_L4PER_I2C3_CLKCTRL, CM_L4PER_I2C4_CLKCTRL, CM_L4PER_I2C5_CLKCTRL, | |
934 | * CM_L4PER_L4PER_CLKCTRL, CM_L4PER_MCASP2_CLKCTRL, CM_L4PER_MCASP3_CLKCTRL, | |
935 | * CM_L4PER_MCBSP4_CLKCTRL, CM_L4PER_MCSPI1_CLKCTRL, CM_L4PER_MCSPI2_CLKCTRL, | |
936 | * CM_L4PER_MCSPI3_CLKCTRL, CM_L4PER_MCSPI4_CLKCTRL, CM_L4PER_MGATE_CLKCTRL, | |
937 | * CM_L4PER_MMCSD3_CLKCTRL, CM_L4PER_MMCSD4_CLKCTRL, CM_L4PER_MMCSD5_CLKCTRL, | |
938 | * CM_L4PER_MSPROHG_CLKCTRL, CM_L4PER_SLIMBUS2_CLKCTRL, CM_L4PER_UART1_CLKCTRL, | |
939 | * CM_L4PER_UART2_CLKCTRL, CM_L4PER_UART3_CLKCTRL, CM_L4PER_UART4_CLKCTRL, | |
940 | * CM_L4SEC_AES1_CLKCTRL, CM_L4SEC_AES2_CLKCTRL, CM_L4SEC_CRYPTODMA_CLKCTRL, | |
941 | * CM_L4SEC_DES3DES_CLKCTRL, CM_L4SEC_PKAEIP29_CLKCTRL, CM_L4SEC_RNG_CLKCTRL, | |
942 | * CM_L4SEC_SHA2MD51_CLKCTRL, CM_L3INIT_CCPTX_CLKCTRL, CM_L3INIT_EMAC_CLKCTRL, | |
943 | * CM_L3INIT_HSI_CLKCTRL, CM_L3INIT_MMC1_CLKCTRL, CM_L3INIT_MMC2_CLKCTRL, | |
944 | * CM_L3INIT_MMC6_CLKCTRL, CM_L3INIT_P1500_CLKCTRL, CM_L3INIT_PCIESS_CLKCTRL, | |
945 | * CM_L3INIT_SATA_CLKCTRL, CM_L3INIT_TPPSS_CLKCTRL, CM_L3INIT_UNIPRO1_CLKCTRL, | |
946 | * CM_L3INIT_USBPHYOCP2SCP_CLKCTRL, CM_L3INIT_USB_HOST_CLKCTRL, | |
947 | * CM_L3INIT_USB_HOST_FS_CLKCTRL, CM_L3INIT_USB_OTG_CLKCTRL, | |
948 | * CM_L3INIT_USB_TLL_CLKCTRL, CM_L3INIT_XHPI_CLKCTRL, CM_CAM_FDIF_CLKCTRL, | |
949 | * CM_CAM_ISS_CLKCTRL, CM_CEFUSE_CEFUSE_CLKCTRL, | |
950 | * CM_L3INIT_USB_HOST_CLKCTRL_RESTORE, CM_L3INIT_USB_TLL_CLKCTRL_RESTORE, | |
951 | * CM_L3INSTR_L3_3_CLKCTRL_RESTORE, CM_L3INSTR_L3_INSTR_CLKCTRL_RESTORE, | |
952 | * CM_L3INSTR_OCP_WP1_CLKCTRL_RESTORE, CM_L4PER_GPIO2_CLKCTRL_RESTORE, | |
953 | * CM_L4PER_GPIO3_CLKCTRL_RESTORE, CM_L4PER_GPIO4_CLKCTRL_RESTORE, | |
954 | * CM_L4PER_GPIO5_CLKCTRL_RESTORE, CM_L4PER_GPIO6_CLKCTRL_RESTORE, | |
955 | * CM_ALWON_MDMINTC_CLKCTRL, CM_ALWON_SR_CORE_CLKCTRL, CM_ALWON_SR_IVA_CLKCTRL, | |
956 | * CM_ALWON_SR_MPU_CLKCTRL, CM_IVAHD_IVAHD_CLKCTRL, CM_IVAHD_SL2_CLKCTRL, | |
957 | * CM_DSS_DEISS_CLKCTRL, CM_DSS_DSS_CLKCTRL, CM_CM2_PROFILING_CLKCTRL, | |
958 | * CM_MPU_MPU_CLKCTRL, CM_TESLA_TESLA_CLKCTRL, CM1_ABE_AESS_CLKCTRL, | |
959 | * CM1_ABE_DMIC_CLKCTRL, CM1_ABE_L4ABE_CLKCTRL, CM1_ABE_MCASP_CLKCTRL, | |
960 | * CM1_ABE_MCBSP1_CLKCTRL, CM1_ABE_MCBSP2_CLKCTRL, CM1_ABE_MCBSP3_CLKCTRL, | |
961 | * CM1_ABE_PDM_CLKCTRL, CM1_ABE_SLIMBUS_CLKCTRL, CM1_ABE_TIMER5_CLKCTRL, | |
962 | * CM1_ABE_TIMER6_CLKCTRL, CM1_ABE_TIMER7_CLKCTRL, CM1_ABE_TIMER8_CLKCTRL, | |
963 | * CM1_ABE_WDT3_CLKCTRL, CM_CM1_PROFILING_CLKCTRL | |
964 | */ | |
965 | #define OMAP4430_IDLEST_SHIFT (1 << 16) | |
966 | #define OMAP4430_IDLEST_MASK BITFIELD(16, 17) | |
967 | ||
968 | /* Used by CM_DUCATI_DYNAMICDEP, CM_L3_2_DYNAMICDEP, CM_L4CFG_DYNAMICDEP */ | |
969 | #define OMAP4430_ISS_DYNDEP_SHIFT (1 << 9) | |
970 | #define OMAP4430_ISS_DYNDEP_MASK BITFIELD(9, 9) | |
971 | ||
972 | /* | |
973 | * Used by CM_DUCATI_STATICDEP, CM_SDMA_STATICDEP, CM_SDMA_STATICDEP_RESTORE, | |
974 | * CM_MPU_STATICDEP, CM_TESLA_STATICDEP | |
975 | */ | |
976 | #define OMAP4430_ISS_STATDEP_SHIFT (1 << 9) | |
977 | #define OMAP4430_ISS_STATDEP_MASK BITFIELD(9, 9) | |
978 | ||
979 | /* Used by CM_L3_2_DYNAMICDEP, CM_TESLA_DYNAMICDEP */ | |
980 | #define OMAP4430_IVAHD_DYNDEP_SHIFT (1 << 2) | |
981 | #define OMAP4430_IVAHD_DYNDEP_MASK BITFIELD(2, 2) | |
982 | ||
983 | /* | |
984 | * Used by CM_D2D_STATICDEP, CM_DUCATI_STATICDEP, CM_SDMA_STATICDEP, | |
985 | * CM_GFX_STATICDEP, CM_L3INIT_STATICDEP, CM_CAM_STATICDEP, | |
986 | * CM_SDMA_STATICDEP_RESTORE, CM_DSS_STATICDEP, CM_MPU_STATICDEP, | |
987 | * CM_TESLA_STATICDEP | |
988 | */ | |
989 | #define OMAP4430_IVAHD_STATDEP_SHIFT (1 << 2) | |
990 | #define OMAP4430_IVAHD_STATDEP_MASK BITFIELD(2, 2) | |
991 | ||
992 | /* Used by CM_L3_2_DYNAMICDEP, CM_L4CFG_DYNAMICDEP, CM_L4PER_DYNAMICDEP */ | |
993 | #define OMAP4430_L3INIT_DYNDEP_SHIFT (1 << 7) | |
994 | #define OMAP4430_L3INIT_DYNDEP_MASK BITFIELD(7, 7) | |
995 | ||
996 | /* | |
997 | * Used by CM_D2D_STATICDEP, CM_DUCATI_STATICDEP, CM_SDMA_STATICDEP, | |
998 | * CM_SDMA_STATICDEP_RESTORE, CM_MPU_STATICDEP, CM_TESLA_STATICDEP | |
999 | */ | |
1000 | #define OMAP4430_L3INIT_STATDEP_SHIFT (1 << 7) | |
1001 | #define OMAP4430_L3INIT_STATDEP_MASK BITFIELD(7, 7) | |
1002 | ||
1003 | /* | |
1004 | * Used by CM_L3_2_DYNAMICDEP, CM_L4CFG_DYNAMICDEP, CM_L3INIT_DYNAMICDEP, | |
1005 | * CM_DSS_DYNAMICDEP, CM_MPU_DYNAMICDEP, CM_TESLA_DYNAMICDEP | |
1006 | */ | |
1007 | #define OMAP4430_L3_1_DYNDEP_SHIFT (1 << 5) | |
1008 | #define OMAP4430_L3_1_DYNDEP_MASK BITFIELD(5, 5) | |
1009 | ||
1010 | /* | |
1011 | * Used by CM_D2D_STATICDEP, CM_DUCATI_STATICDEP, CM_SDMA_STATICDEP, | |
1012 | * CM_GFX_STATICDEP, CM_L4SEC_STATICDEP, CM_L3INIT_STATICDEP, CM_CAM_STATICDEP, | |
1013 | * CM_SDMA_STATICDEP_RESTORE, CM_IVAHD_STATICDEP, CM_DSS_STATICDEP, | |
1014 | * CM_MPU_STATICDEP, CM_TESLA_STATICDEP | |
1015 | */ | |
1016 | #define OMAP4430_L3_1_STATDEP_SHIFT (1 << 5) | |
1017 | #define OMAP4430_L3_1_STATDEP_MASK BITFIELD(5, 5) | |
1018 | ||
1019 | /* | |
1020 | * Used by CM_EMU_DYNAMICDEP, CM_D2D_DYNAMICDEP, CM_DUCATI_DYNAMICDEP, | |
1021 | * CM_L3_1_DYNAMICDEP, CM_L4CFG_DYNAMICDEP, CM_SDMA_DYNAMICDEP, | |
1022 | * CM_GFX_DYNAMICDEP, CM_L4SEC_DYNAMICDEP, CM_L3INIT_DYNAMICDEP, | |
1023 | * CM_CAM_DYNAMICDEP, CM_IVAHD_DYNAMICDEP | |
1024 | */ | |
1025 | #define OMAP4430_L3_2_DYNDEP_SHIFT (1 << 6) | |
1026 | #define OMAP4430_L3_2_DYNDEP_MASK BITFIELD(6, 6) | |
1027 | ||
1028 | /* | |
1029 | * Used by CM_D2D_STATICDEP, CM_DUCATI_STATICDEP, CM_SDMA_STATICDEP, | |
1030 | * CM_GFX_STATICDEP, CM_L4SEC_STATICDEP, CM_L3INIT_STATICDEP, CM_CAM_STATICDEP, | |
1031 | * CM_SDMA_STATICDEP_RESTORE, CM_IVAHD_STATICDEP, CM_DSS_STATICDEP, | |
1032 | * CM_MPU_STATICDEP, CM_TESLA_STATICDEP | |
1033 | */ | |
1034 | #define OMAP4430_L3_2_STATDEP_SHIFT (1 << 6) | |
1035 | #define OMAP4430_L3_2_STATDEP_MASK BITFIELD(6, 6) | |
1036 | ||
1037 | /* Used by CM_L3_1_DYNAMICDEP */ | |
1038 | #define OMAP4430_L4CFG_DYNDEP_SHIFT (1 << 12) | |
1039 | #define OMAP4430_L4CFG_DYNDEP_MASK BITFIELD(12, 12) | |
1040 | ||
1041 | /* | |
1042 | * Used by CM_D2D_STATICDEP, CM_DUCATI_STATICDEP, CM_SDMA_STATICDEP, | |
1043 | * CM_L3INIT_STATICDEP, CM_SDMA_STATICDEP_RESTORE, CM_MPU_STATICDEP, | |
1044 | * CM_TESLA_STATICDEP | |
1045 | */ | |
1046 | #define OMAP4430_L4CFG_STATDEP_SHIFT (1 << 12) | |
1047 | #define OMAP4430_L4CFG_STATDEP_MASK BITFIELD(12, 12) | |
1048 | ||
1049 | /* Used by CM_L3_2_DYNAMICDEP */ | |
1050 | #define OMAP4430_L4PER_DYNDEP_SHIFT (1 << 13) | |
1051 | #define OMAP4430_L4PER_DYNDEP_MASK BITFIELD(13, 13) | |
1052 | ||
1053 | /* | |
1054 | * Used by CM_D2D_STATICDEP, CM_DUCATI_STATICDEP, CM_SDMA_STATICDEP, | |
1055 | * CM_L4SEC_STATICDEP, CM_L3INIT_STATICDEP, CM_SDMA_STATICDEP_RESTORE, | |
1056 | * CM_MPU_STATICDEP, CM_TESLA_STATICDEP | |
1057 | */ | |
1058 | #define OMAP4430_L4PER_STATDEP_SHIFT (1 << 13) | |
1059 | #define OMAP4430_L4PER_STATDEP_MASK BITFIELD(13, 13) | |
1060 | ||
1061 | /* Used by CM_L3_2_DYNAMICDEP, CM_L4PER_DYNAMICDEP */ | |
1062 | #define OMAP4430_L4SEC_DYNDEP_SHIFT (1 << 14) | |
1063 | #define OMAP4430_L4SEC_DYNDEP_MASK BITFIELD(14, 14) | |
1064 | ||
1065 | /* | |
1066 | * Used by CM_DUCATI_STATICDEP, CM_SDMA_STATICDEP, CM_L3INIT_STATICDEP, | |
1067 | * CM_SDMA_STATICDEP_RESTORE, CM_MPU_STATICDEP | |
1068 | */ | |
1069 | #define OMAP4430_L4SEC_STATDEP_SHIFT (1 << 14) | |
1070 | #define OMAP4430_L4SEC_STATDEP_MASK BITFIELD(14, 14) | |
1071 | ||
1072 | /* Used by CM_L4CFG_DYNAMICDEP */ | |
1073 | #define OMAP4430_L4WKUP_DYNDEP_SHIFT (1 << 15) | |
1074 | #define OMAP4430_L4WKUP_DYNDEP_MASK BITFIELD(15, 15) | |
1075 | ||
1076 | /* | |
1077 | * Used by CM_DUCATI_STATICDEP, CM_SDMA_STATICDEP, CM_L3INIT_STATICDEP, | |
1078 | * CM_SDMA_STATICDEP_RESTORE, CM_MPU_STATICDEP, CM_TESLA_STATICDEP | |
1079 | */ | |
1080 | #define OMAP4430_L4WKUP_STATDEP_SHIFT (1 << 15) | |
1081 | #define OMAP4430_L4WKUP_STATDEP_MASK BITFIELD(15, 15) | |
1082 | ||
1083 | /* | |
1084 | * Used by CM_D2D_DYNAMICDEP, CM_L3_1_DYNAMICDEP, CM_L4CFG_DYNAMICDEP, | |
1085 | * CM_MPU_DYNAMICDEP | |
1086 | */ | |
1087 | #define OMAP4430_MEMIF_DYNDEP_SHIFT (1 << 4) | |
1088 | #define OMAP4430_MEMIF_DYNDEP_MASK BITFIELD(4, 4) | |
1089 | ||
1090 | /* | |
1091 | * Used by CM_D2D_STATICDEP, CM_DUCATI_STATICDEP, CM_SDMA_STATICDEP, | |
1092 | * CM_GFX_STATICDEP, CM_L4SEC_STATICDEP, CM_L3INIT_STATICDEP, CM_CAM_STATICDEP, | |
1093 | * CM_SDMA_STATICDEP_RESTORE, CM_IVAHD_STATICDEP, CM_DSS_STATICDEP, | |
1094 | * CM_MPU_STATICDEP, CM_TESLA_STATICDEP | |
1095 | */ | |
1096 | #define OMAP4430_MEMIF_STATDEP_SHIFT (1 << 4) | |
1097 | #define OMAP4430_MEMIF_STATDEP_MASK BITFIELD(4, 4) | |
1098 | ||
1099 | /* | |
1100 | * Used by CM_SSC_MODFREQDIV_DPLL_PER, CM_SSC_MODFREQDIV_DPLL_UNIPRO, | |
1101 | * CM_SSC_MODFREQDIV_DPLL_USB, CM_SSC_MODFREQDIV_DPLL_CORE_RESTORE, | |
1102 | * CM_SSC_MODFREQDIV_DPLL_ABE, CM_SSC_MODFREQDIV_DPLL_CORE, | |
1103 | * CM_SSC_MODFREQDIV_DPLL_DDRPHY, CM_SSC_MODFREQDIV_DPLL_IVA, | |
1104 | * CM_SSC_MODFREQDIV_DPLL_MPU | |
1105 | */ | |
1106 | #define OMAP4430_MODFREQDIV_EXPONENT_SHIFT (1 << 8) | |
1107 | #define OMAP4430_MODFREQDIV_EXPONENT_MASK BITFIELD(8, 10) | |
1108 | ||
1109 | /* | |
1110 | * Used by CM_SSC_MODFREQDIV_DPLL_PER, CM_SSC_MODFREQDIV_DPLL_UNIPRO, | |
1111 | * CM_SSC_MODFREQDIV_DPLL_USB, CM_SSC_MODFREQDIV_DPLL_CORE_RESTORE, | |
1112 | * CM_SSC_MODFREQDIV_DPLL_ABE, CM_SSC_MODFREQDIV_DPLL_CORE, | |
1113 | * CM_SSC_MODFREQDIV_DPLL_DDRPHY, CM_SSC_MODFREQDIV_DPLL_IVA, | |
1114 | * CM_SSC_MODFREQDIV_DPLL_MPU | |
1115 | */ | |
1116 | #define OMAP4430_MODFREQDIV_MANTISSA_SHIFT (1 << 0) | |
1117 | #define OMAP4430_MODFREQDIV_MANTISSA_MASK BITFIELD(0, 6) | |
1118 | ||
1119 | /* | |
1120 | * Used by PRM_PRM_PROFILING_CLKCTRL, CM_WKUP_GPIO1_CLKCTRL, | |
1121 | * CM_WKUP_KEYBOARD_CLKCTRL, CM_WKUP_L4WKUP_CLKCTRL, CM_WKUP_RTC_CLKCTRL, | |
1122 | * CM_WKUP_SARRAM_CLKCTRL, CM_WKUP_SYNCTIMER_CLKCTRL, CM_WKUP_TIMER12_CLKCTRL, | |
1123 | * CM_WKUP_TIMER1_CLKCTRL, CM_WKUP_USIM_CLKCTRL, CM_WKUP_WDT1_CLKCTRL, | |
1124 | * CM_WKUP_WDT2_CLKCTRL, CM_EMU_DEBUGSS_CLKCTRL, CM_D2D_MODEM_ICR_CLKCTRL, | |
1125 | * CM_D2D_SAD2D_CLKCTRL, CM_D2D_SAD2D_FW_CLKCTRL, CM_DUCATI_DUCATI_CLKCTRL, | |
1126 | * CM_L3INSTR_L3_3_CLKCTRL, CM_L3INSTR_L3_INSTR_CLKCTRL, | |
1127 | * CM_L3INSTR_OCP_WP1_CLKCTRL, CM_L3_1_L3_1_CLKCTRL, CM_L3_2_GPMC_CLKCTRL, | |
1128 | * CM_L3_2_L3_2_CLKCTRL, CM_L3_2_OCMC_RAM_CLKCTRL, CM_L4CFG_HW_SEM_CLKCTRL, | |
1129 | * CM_L4CFG_L4_CFG_CLKCTRL, CM_L4CFG_MAILBOX_CLKCTRL, CM_L4CFG_SAR_ROM_CLKCTRL, | |
1130 | * CM_MEMIF_DMM_CLKCTRL, CM_MEMIF_EMIF_1_CLKCTRL, CM_MEMIF_EMIF_2_CLKCTRL, | |
1131 | * CM_MEMIF_EMIF_FW_CLKCTRL, CM_MEMIF_EMIF_H1_CLKCTRL, | |
1132 | * CM_MEMIF_EMIF_H2_CLKCTRL, CM_SDMA_SDMA_CLKCTRL, CM_GFX_GFX_CLKCTRL, | |
1133 | * CM_L4PER_ADC_CLKCTRL, CM_L4PER_DMTIMER10_CLKCTRL, | |
1134 | * CM_L4PER_DMTIMER11_CLKCTRL, CM_L4PER_DMTIMER2_CLKCTRL, | |
1135 | * CM_L4PER_DMTIMER3_CLKCTRL, CM_L4PER_DMTIMER4_CLKCTRL, | |
1136 | * CM_L4PER_DMTIMER9_CLKCTRL, CM_L4PER_ELM_CLKCTRL, CM_L4PER_GPIO2_CLKCTRL, | |
1137 | * CM_L4PER_GPIO3_CLKCTRL, CM_L4PER_GPIO4_CLKCTRL, CM_L4PER_GPIO5_CLKCTRL, | |
1138 | * CM_L4PER_GPIO6_CLKCTRL, CM_L4PER_HDQ1W_CLKCTRL, CM_L4PER_HECC1_CLKCTRL, | |
1139 | * CM_L4PER_HECC2_CLKCTRL, CM_L4PER_I2C1_CLKCTRL, CM_L4PER_I2C2_CLKCTRL, | |
1140 | * CM_L4PER_I2C3_CLKCTRL, CM_L4PER_I2C4_CLKCTRL, CM_L4PER_I2C5_CLKCTRL, | |
1141 | * CM_L4PER_L4PER_CLKCTRL, CM_L4PER_MCASP2_CLKCTRL, CM_L4PER_MCASP3_CLKCTRL, | |
1142 | * CM_L4PER_MCBSP4_CLKCTRL, CM_L4PER_MCSPI1_CLKCTRL, CM_L4PER_MCSPI2_CLKCTRL, | |
1143 | * CM_L4PER_MCSPI3_CLKCTRL, CM_L4PER_MCSPI4_CLKCTRL, CM_L4PER_MGATE_CLKCTRL, | |
1144 | * CM_L4PER_MMCSD3_CLKCTRL, CM_L4PER_MMCSD4_CLKCTRL, CM_L4PER_MMCSD5_CLKCTRL, | |
1145 | * CM_L4PER_MSPROHG_CLKCTRL, CM_L4PER_SLIMBUS2_CLKCTRL, CM_L4PER_UART1_CLKCTRL, | |
1146 | * CM_L4PER_UART2_CLKCTRL, CM_L4PER_UART3_CLKCTRL, CM_L4PER_UART4_CLKCTRL, | |
1147 | * CM_L4SEC_AES1_CLKCTRL, CM_L4SEC_AES2_CLKCTRL, CM_L4SEC_CRYPTODMA_CLKCTRL, | |
1148 | * CM_L4SEC_DES3DES_CLKCTRL, CM_L4SEC_PKAEIP29_CLKCTRL, CM_L4SEC_RNG_CLKCTRL, | |
1149 | * CM_L4SEC_SHA2MD51_CLKCTRL, CM_L3INIT_CCPTX_CLKCTRL, CM_L3INIT_EMAC_CLKCTRL, | |
1150 | * CM_L3INIT_HSI_CLKCTRL, CM_L3INIT_MMC1_CLKCTRL, CM_L3INIT_MMC2_CLKCTRL, | |
1151 | * CM_L3INIT_MMC6_CLKCTRL, CM_L3INIT_P1500_CLKCTRL, CM_L3INIT_PCIESS_CLKCTRL, | |
1152 | * CM_L3INIT_SATA_CLKCTRL, CM_L3INIT_TPPSS_CLKCTRL, CM_L3INIT_UNIPRO1_CLKCTRL, | |
1153 | * CM_L3INIT_USBPHYOCP2SCP_CLKCTRL, CM_L3INIT_USB_HOST_CLKCTRL, | |
1154 | * CM_L3INIT_USB_HOST_FS_CLKCTRL, CM_L3INIT_USB_OTG_CLKCTRL, | |
1155 | * CM_L3INIT_USB_TLL_CLKCTRL, CM_L3INIT_XHPI_CLKCTRL, CM_CAM_FDIF_CLKCTRL, | |
1156 | * CM_CAM_ISS_CLKCTRL, CM_CEFUSE_CEFUSE_CLKCTRL, | |
1157 | * CM_L3INIT_USB_HOST_CLKCTRL_RESTORE, CM_L3INIT_USB_TLL_CLKCTRL_RESTORE, | |
1158 | * CM_L3INSTR_L3_3_CLKCTRL_RESTORE, CM_L3INSTR_L3_INSTR_CLKCTRL_RESTORE, | |
1159 | * CM_L3INSTR_OCP_WP1_CLKCTRL_RESTORE, CM_L4PER_GPIO2_CLKCTRL_RESTORE, | |
1160 | * CM_L4PER_GPIO3_CLKCTRL_RESTORE, CM_L4PER_GPIO4_CLKCTRL_RESTORE, | |
1161 | * CM_L4PER_GPIO5_CLKCTRL_RESTORE, CM_L4PER_GPIO6_CLKCTRL_RESTORE, | |
1162 | * CM_ALWON_MDMINTC_CLKCTRL, CM_ALWON_SR_CORE_CLKCTRL, CM_ALWON_SR_IVA_CLKCTRL, | |
1163 | * CM_ALWON_SR_MPU_CLKCTRL, CM_IVAHD_IVAHD_CLKCTRL, CM_IVAHD_SL2_CLKCTRL, | |
1164 | * CM_DSS_DEISS_CLKCTRL, CM_DSS_DSS_CLKCTRL, CM_CM2_PROFILING_CLKCTRL, | |
1165 | * CM_MPU_MPU_CLKCTRL, CM_TESLA_TESLA_CLKCTRL, CM1_ABE_AESS_CLKCTRL, | |
1166 | * CM1_ABE_DMIC_CLKCTRL, CM1_ABE_L4ABE_CLKCTRL, CM1_ABE_MCASP_CLKCTRL, | |
1167 | * CM1_ABE_MCBSP1_CLKCTRL, CM1_ABE_MCBSP2_CLKCTRL, CM1_ABE_MCBSP3_CLKCTRL, | |
1168 | * CM1_ABE_PDM_CLKCTRL, CM1_ABE_SLIMBUS_CLKCTRL, CM1_ABE_TIMER5_CLKCTRL, | |
1169 | * CM1_ABE_TIMER6_CLKCTRL, CM1_ABE_TIMER7_CLKCTRL, CM1_ABE_TIMER8_CLKCTRL, | |
1170 | * CM1_ABE_WDT3_CLKCTRL, CM_CM1_PROFILING_CLKCTRL | |
1171 | */ | |
1172 | #define OMAP4430_MODULEMODE_SHIFT (1 << 0) | |
1173 | #define OMAP4430_MODULEMODE_MASK BITFIELD(0, 1) | |
1174 | ||
1175 | /* Used by CM_DSS_DSS_CLKCTRL */ | |
1176 | #define OMAP4430_OPTFCLKEN_48MHZ_CLK_SHIFT (1 << 9) | |
1177 | #define OMAP4430_OPTFCLKEN_48MHZ_CLK_MASK BITFIELD(9, 9) | |
1178 | ||
1179 | /* Used by CM_WKUP_BANDGAP_CLKCTRL */ | |
1180 | #define OMAP4430_OPTFCLKEN_BGAP_32K_SHIFT (1 << 8) | |
1181 | #define OMAP4430_OPTFCLKEN_BGAP_32K_MASK BITFIELD(8, 8) | |
1182 | ||
1183 | /* Used by CM_L3INIT_USBPHYOCP2SCP_CLKCTRL */ | |
1184 | #define OMAP4430_OPTFCLKEN_CLK32K_SHIFT (1 << 9) | |
1185 | #define OMAP4430_OPTFCLKEN_CLK32K_MASK BITFIELD(9, 9) | |
1186 | ||
1187 | /* Used by CM_CAM_ISS_CLKCTRL */ | |
1188 | #define OMAP4430_OPTFCLKEN_CTRLCLK_SHIFT (1 << 8) | |
1189 | #define OMAP4430_OPTFCLKEN_CTRLCLK_MASK BITFIELD(8, 8) | |
1190 | ||
1191 | /* | |
1192 | * Used by CM_WKUP_GPIO1_CLKCTRL, CM_L4PER_GPIO2_CLKCTRL, | |
1193 | * CM_L4PER_GPIO3_CLKCTRL, CM_L4PER_GPIO4_CLKCTRL, CM_L4PER_GPIO5_CLKCTRL, | |
1194 | * CM_L4PER_GPIO6_CLKCTRL, CM_L4PER_GPIO2_CLKCTRL_RESTORE, | |
1195 | * CM_L4PER_GPIO3_CLKCTRL_RESTORE, CM_L4PER_GPIO4_CLKCTRL_RESTORE, | |
1196 | * CM_L4PER_GPIO5_CLKCTRL_RESTORE, CM_L4PER_GPIO6_CLKCTRL_RESTORE | |
1197 | */ | |
1198 | #define OMAP4430_OPTFCLKEN_DBCLK_SHIFT (1 << 8) | |
1199 | #define OMAP4430_OPTFCLKEN_DBCLK_MASK BITFIELD(8, 8) | |
1200 | ||
1201 | /* Used by CM_MEMIF_DLL_CLKCTRL, CM_MEMIF_DLL_H_CLKCTRL */ | |
1202 | #define OMAP4430_OPTFCLKEN_DLL_CLK_SHIFT (1 << 8) | |
1203 | #define OMAP4430_OPTFCLKEN_DLL_CLK_MASK BITFIELD(8, 8) | |
1204 | ||
1205 | /* Used by CM_DSS_DSS_CLKCTRL */ | |
1206 | #define OMAP4430_OPTFCLKEN_DSSCLK_SHIFT (1 << 8) | |
1207 | #define OMAP4430_OPTFCLKEN_DSSCLK_MASK BITFIELD(8, 8) | |
1208 | ||
1209 | /* Used by CM1_ABE_SLIMBUS_CLKCTRL */ | |
1210 | #define OMAP4430_OPTFCLKEN_FCLK0_SHIFT (1 << 8) | |
1211 | #define OMAP4430_OPTFCLKEN_FCLK0_MASK BITFIELD(8, 8) | |
1212 | ||
1213 | /* Used by CM1_ABE_SLIMBUS_CLKCTRL */ | |
1214 | #define OMAP4430_OPTFCLKEN_FCLK1_SHIFT (1 << 9) | |
1215 | #define OMAP4430_OPTFCLKEN_FCLK1_MASK BITFIELD(9, 9) | |
1216 | ||
1217 | /* Used by CM1_ABE_SLIMBUS_CLKCTRL */ | |
1218 | #define OMAP4430_OPTFCLKEN_FCLK2_SHIFT (1 << 10) | |
1219 | #define OMAP4430_OPTFCLKEN_FCLK2_MASK BITFIELD(10, 10) | |
1220 | ||
1221 | /* Used by CM_L3INIT_USB_HOST_CLKCTRL, CM_L3INIT_USB_HOST_CLKCTRL_RESTORE */ | |
1222 | #define OMAP4430_OPTFCLKEN_FUNC48MCLK_SHIFT (1 << 15) | |
1223 | #define OMAP4430_OPTFCLKEN_FUNC48MCLK_MASK BITFIELD(15, 15) | |
1224 | ||
1225 | /* Used by CM_L3INIT_USB_HOST_CLKCTRL, CM_L3INIT_USB_HOST_CLKCTRL_RESTORE */ | |
1226 | #define OMAP4430_OPTFCLKEN_HSIC480M_P1_CLK_SHIFT (1 << 13) | |
1227 | #define OMAP4430_OPTFCLKEN_HSIC480M_P1_CLK_MASK BITFIELD(13, 13) | |
1228 | ||
1229 | /* Used by CM_L3INIT_USB_HOST_CLKCTRL, CM_L3INIT_USB_HOST_CLKCTRL_RESTORE */ | |
1230 | #define OMAP4430_OPTFCLKEN_HSIC480M_P2_CLK_SHIFT (1 << 14) | |
1231 | #define OMAP4430_OPTFCLKEN_HSIC480M_P2_CLK_MASK BITFIELD(14, 14) | |
1232 | ||
1233 | /* Used by CM_L3INIT_USB_HOST_CLKCTRL, CM_L3INIT_USB_HOST_CLKCTRL_RESTORE */ | |
1234 | #define OMAP4430_OPTFCLKEN_HSIC60M_P1_CLK_SHIFT (1 << 11) | |
1235 | #define OMAP4430_OPTFCLKEN_HSIC60M_P1_CLK_MASK BITFIELD(11, 11) | |
1236 | ||
1237 | /* Used by CM_L3INIT_USB_HOST_CLKCTRL, CM_L3INIT_USB_HOST_CLKCTRL_RESTORE */ | |
1238 | #define OMAP4430_OPTFCLKEN_HSIC60M_P2_CLK_SHIFT (1 << 12) | |
1239 | #define OMAP4430_OPTFCLKEN_HSIC60M_P2_CLK_MASK BITFIELD(12, 12) | |
1240 | ||
1241 | /* Used by CM_L4PER_SLIMBUS2_CLKCTRL */ | |
1242 | #define OMAP4430_OPTFCLKEN_PER24MC_GFCLK_SHIFT (1 << 8) | |
1243 | #define OMAP4430_OPTFCLKEN_PER24MC_GFCLK_MASK BITFIELD(8, 8) | |
1244 | ||
1245 | /* Used by CM_L4PER_SLIMBUS2_CLKCTRL */ | |
1246 | #define OMAP4430_OPTFCLKEN_PERABE24M_GFCLK_SHIFT (1 << 9) | |
1247 | #define OMAP4430_OPTFCLKEN_PERABE24M_GFCLK_MASK BITFIELD(9, 9) | |
1248 | ||
1249 | /* Used by CM_L3INIT_USBPHYOCP2SCP_CLKCTRL */ | |
1250 | #define OMAP4430_OPTFCLKEN_PHY_48M_SHIFT (1 << 8) | |
1251 | #define OMAP4430_OPTFCLKEN_PHY_48M_MASK BITFIELD(8, 8) | |
1252 | ||
1253 | /* Used by CM_L4PER_SLIMBUS2_CLKCTRL */ | |
1254 | #define OMAP4430_OPTFCLKEN_SLIMBUS_CLK_SHIFT (1 << 10) | |
1255 | #define OMAP4430_OPTFCLKEN_SLIMBUS_CLK_MASK BITFIELD(10, 10) | |
1256 | ||
1257 | /* Renamed from OPTFCLKEN_SLIMBUS_CLK Used by CM1_ABE_SLIMBUS_CLKCTRL */ | |
1258 | #define OMAP4430_OPTFCLKEN_SLIMBUS_CLK_11_11_SHIFT (1 << 11) | |
1259 | #define OMAP4430_OPTFCLKEN_SLIMBUS_CLK_11_11_MASK BITFIELD(11, 11) | |
1260 | ||
1261 | /* Used by CM_DSS_DSS_CLKCTRL */ | |
1262 | #define OMAP4430_OPTFCLKEN_SYS_CLK_SHIFT (1 << 10) | |
1263 | #define OMAP4430_OPTFCLKEN_SYS_CLK_MASK BITFIELD(10, 10) | |
1264 | ||
1265 | /* Used by CM_DSS_DSS_CLKCTRL */ | |
1266 | #define OMAP4430_OPTFCLKEN_TV_CLK_SHIFT (1 << 11) | |
1267 | #define OMAP4430_OPTFCLKEN_TV_CLK_MASK BITFIELD(11, 11) | |
1268 | ||
1269 | /* Used by CM_L3INIT_UNIPRO1_CLKCTRL */ | |
1270 | #define OMAP4430_OPTFCLKEN_TXPHYCLK_SHIFT (1 << 8) | |
1271 | #define OMAP4430_OPTFCLKEN_TXPHYCLK_MASK BITFIELD(8, 8) | |
1272 | ||
1273 | /* Used by CM_L3INIT_USB_TLL_CLKCTRL, CM_L3INIT_USB_TLL_CLKCTRL_RESTORE */ | |
1274 | #define OMAP4430_OPTFCLKEN_USB_CH0_CLK_SHIFT (1 << 8) | |
1275 | #define OMAP4430_OPTFCLKEN_USB_CH0_CLK_MASK BITFIELD(8, 8) | |
1276 | ||
1277 | /* Used by CM_L3INIT_USB_TLL_CLKCTRL, CM_L3INIT_USB_TLL_CLKCTRL_RESTORE */ | |
1278 | #define OMAP4430_OPTFCLKEN_USB_CH1_CLK_SHIFT (1 << 9) | |
1279 | #define OMAP4430_OPTFCLKEN_USB_CH1_CLK_MASK BITFIELD(9, 9) | |
1280 | ||
1281 | /* Used by CM_L3INIT_USB_TLL_CLKCTRL, CM_L3INIT_USB_TLL_CLKCTRL_RESTORE */ | |
1282 | #define OMAP4430_OPTFCLKEN_USB_CH2_CLK_SHIFT (1 << 10) | |
1283 | #define OMAP4430_OPTFCLKEN_USB_CH2_CLK_MASK BITFIELD(10, 10) | |
1284 | ||
1285 | /* Used by CM_L3INIT_USB_HOST_CLKCTRL, CM_L3INIT_USB_HOST_CLKCTRL_RESTORE */ | |
1286 | #define OMAP4430_OPTFCLKEN_UTMI_P1_CLK_SHIFT (1 << 8) | |
1287 | #define OMAP4430_OPTFCLKEN_UTMI_P1_CLK_MASK BITFIELD(8, 8) | |
1288 | ||
1289 | /* Used by CM_L3INIT_USB_HOST_CLKCTRL, CM_L3INIT_USB_HOST_CLKCTRL_RESTORE */ | |
1290 | #define OMAP4430_OPTFCLKEN_UTMI_P2_CLK_SHIFT (1 << 9) | |
1291 | #define OMAP4430_OPTFCLKEN_UTMI_P2_CLK_MASK BITFIELD(9, 9) | |
1292 | ||
1293 | /* Used by CM_L3INIT_USB_HOST_CLKCTRL, CM_L3INIT_USB_HOST_CLKCTRL_RESTORE */ | |
1294 | #define OMAP4430_OPTFCLKEN_UTMI_P3_CLK_SHIFT (1 << 10) | |
1295 | #define OMAP4430_OPTFCLKEN_UTMI_P3_CLK_MASK BITFIELD(10, 10) | |
1296 | ||
1297 | /* Used by CM_L3INIT_USB_OTG_CLKCTRL */ | |
1298 | #define OMAP4430_OPTFCLKEN_XCLK_SHIFT (1 << 8) | |
1299 | #define OMAP4430_OPTFCLKEN_XCLK_MASK BITFIELD(8, 8) | |
1300 | ||
1301 | /* Used by CM_EMU_OVERRIDE_DPLL_PER, CM_EMU_OVERRIDE_DPLL_CORE */ | |
1302 | #define OMAP4430_OVERRIDE_ENABLE_SHIFT (1 << 19) | |
1303 | #define OMAP4430_OVERRIDE_ENABLE_MASK BITFIELD(19, 19) | |
1304 | ||
1305 | /* Used by CM_CLKSEL_ABE */ | |
1306 | #define OMAP4430_PAD_CLKS_GATE_SHIFT (1 << 8) | |
1307 | #define OMAP4430_PAD_CLKS_GATE_MASK BITFIELD(8, 8) | |
1308 | ||
1309 | /* Used by CM_CORE_DVFS_CURRENT, CM_IVA_DVFS_CURRENT */ | |
1310 | #define OMAP4430_PERF_CURRENT_SHIFT (1 << 0) | |
1311 | #define OMAP4430_PERF_CURRENT_MASK BITFIELD(0, 7) | |
1312 | ||
1313 | /* | |
1314 | * Used by CM_CORE_DVFS_PERF1, CM_CORE_DVFS_PERF2, CM_CORE_DVFS_PERF3, | |
1315 | * CM_CORE_DVFS_PERF4, CM_IVA_DVFS_PERF_ABE, CM_IVA_DVFS_PERF_IVAHD, | |
1316 | * CM_IVA_DVFS_PERF_TESLA | |
1317 | */ | |
1318 | #define OMAP4430_PERF_REQ_SHIFT (1 << 0) | |
1319 | #define OMAP4430_PERF_REQ_MASK BITFIELD(0, 7) | |
1320 | ||
1321 | /* Used by CM_EMU_OVERRIDE_DPLL_PER */ | |
1322 | #define OMAP4430_PER_DPLL_EMU_DIV_SHIFT (1 << 0) | |
1323 | #define OMAP4430_PER_DPLL_EMU_DIV_MASK BITFIELD(0, 6) | |
1324 | ||
1325 | /* Used by CM_EMU_OVERRIDE_DPLL_PER */ | |
1326 | #define OMAP4430_PER_DPLL_EMU_MULT_SHIFT (1 << 8) | |
1327 | #define OMAP4430_PER_DPLL_EMU_MULT_MASK BITFIELD(8, 18) | |
1328 | ||
1329 | /* Used by CM_RESTORE_ST */ | |
1330 | #define OMAP4430_PHASE1_COMPLETED_SHIFT (1 << 0) | |
1331 | #define OMAP4430_PHASE1_COMPLETED_MASK BITFIELD(0, 0) | |
1332 | ||
1333 | /* Used by CM_RESTORE_ST */ | |
1334 | #define OMAP4430_PHASE2A_COMPLETED_SHIFT (1 << 1) | |
1335 | #define OMAP4430_PHASE2A_COMPLETED_MASK BITFIELD(1, 1) | |
1336 | ||
1337 | /* Used by CM_RESTORE_ST */ | |
1338 | #define OMAP4430_PHASE2B_COMPLETED_SHIFT (1 << 2) | |
1339 | #define OMAP4430_PHASE2B_COMPLETED_MASK BITFIELD(2, 2) | |
1340 | ||
1341 | /* Used by CM_EMU_DEBUGSS_CLKCTRL */ | |
1342 | #define OMAP4430_PMD_STM_MUX_CTRL_SHIFT (1 << 20) | |
1343 | #define OMAP4430_PMD_STM_MUX_CTRL_MASK BITFIELD(20, 21) | |
1344 | ||
1345 | /* Used by CM_EMU_DEBUGSS_CLKCTRL */ | |
1346 | #define OMAP4430_PMD_TRACE_MUX_CTRL_SHIFT (1 << 22) | |
1347 | #define OMAP4430_PMD_TRACE_MUX_CTRL_MASK BITFIELD(22, 23) | |
1348 | ||
1349 | /* Used by CM_DYN_DEP_PRESCAL */ | |
1350 | #define OMAP4430_PRESCAL_SHIFT (1 << 0) | |
1351 | #define OMAP4430_PRESCAL_MASK BITFIELD(0, 5) | |
1352 | ||
1353 | /* Used by REVISION_CM2, REVISION_CM1 */ | |
1354 | #define OMAP4430_REV_SHIFT (1 << 0) | |
1355 | #define OMAP4430_REV_MASK BITFIELD(0, 7) | |
1356 | ||
1357 | /* | |
1358 | * Used by CM_L3INIT_USB_HOST_CLKCTRL, CM_L3INIT_USB_TLL_CLKCTRL, | |
1359 | * CM_L3INIT_USB_HOST_CLKCTRL_RESTORE, CM_L3INIT_USB_TLL_CLKCTRL_RESTORE | |
1360 | */ | |
1361 | #define OMAP4430_SAR_MODE_SHIFT (1 << 4) | |
1362 | #define OMAP4430_SAR_MODE_MASK BITFIELD(4, 4) | |
1363 | ||
1364 | /* Used by CM_SCALE_FCLK */ | |
1365 | #define OMAP4430_SCALE_FCLK_SHIFT (1 << 0) | |
1366 | #define OMAP4430_SCALE_FCLK_MASK BITFIELD(0, 0) | |
1367 | ||
1368 | /* Used by CM_L4CFG_DYNAMICDEP */ | |
1369 | #define OMAP4430_SDMA_DYNDEP_SHIFT (1 << 11) | |
1370 | #define OMAP4430_SDMA_DYNDEP_MASK BITFIELD(11, 11) | |
1371 | ||
1372 | /* Used by CM_DUCATI_STATICDEP, CM_MPU_STATICDEP */ | |
1373 | #define OMAP4430_SDMA_STATDEP_SHIFT (1 << 11) | |
1374 | #define OMAP4430_SDMA_STATDEP_MASK BITFIELD(11, 11) | |
1375 | ||
1376 | /* Used by CM_CLKSEL_ABE */ | |
1377 | #define OMAP4430_SLIMBUS_CLK_GATE_SHIFT (1 << 10) | |
1378 | #define OMAP4430_SLIMBUS_CLK_GATE_MASK BITFIELD(10, 10) | |
1379 | ||
1380 | /* | |
1381 | * Used by CM_EMU_DEBUGSS_CLKCTRL, CM_D2D_SAD2D_CLKCTRL, | |
1382 | * CM_DUCATI_DUCATI_CLKCTRL, CM_SDMA_SDMA_CLKCTRL, CM_GFX_GFX_CLKCTRL, | |
1383 | * CM_L4SEC_CRYPTODMA_CLKCTRL, CM_L3INIT_CCPTX_CLKCTRL, CM_L3INIT_EMAC_CLKCTRL, | |
1384 | * CM_L3INIT_HSI_CLKCTRL, CM_L3INIT_MMC1_CLKCTRL, CM_L3INIT_MMC2_CLKCTRL, | |
1385 | * CM_L3INIT_MMC6_CLKCTRL, CM_L3INIT_P1500_CLKCTRL, CM_L3INIT_PCIESS_CLKCTRL, | |
1386 | * CM_L3INIT_SATA_CLKCTRL, CM_L3INIT_TPPSS_CLKCTRL, CM_L3INIT_UNIPRO1_CLKCTRL, | |
1387 | * CM_L3INIT_USB_HOST_CLKCTRL, CM_L3INIT_USB_HOST_FS_CLKCTRL, | |
1388 | * CM_L3INIT_USB_OTG_CLKCTRL, CM_L3INIT_XHPI_CLKCTRL, CM_CAM_FDIF_CLKCTRL, | |
1389 | * CM_CAM_ISS_CLKCTRL, CM_L3INIT_USB_HOST_CLKCTRL_RESTORE, | |
1390 | * CM_IVAHD_IVAHD_CLKCTRL, CM_DSS_DEISS_CLKCTRL, CM_DSS_DSS_CLKCTRL, | |
1391 | * CM_MPU_MPU_CLKCTRL, CM_TESLA_TESLA_CLKCTRL, CM1_ABE_AESS_CLKCTRL | |
1392 | */ | |
1393 | #define OMAP4430_STBYST_SHIFT (1 << 18) | |
1394 | #define OMAP4430_STBYST_MASK BITFIELD(18, 18) | |
1395 | ||
1396 | /* | |
1397 | * Used by CM_IDLEST_DPLL_PER, CM_IDLEST_DPLL_UNIPRO, CM_IDLEST_DPLL_USB, | |
1398 | * CM_IDLEST_DPLL_ABE, CM_IDLEST_DPLL_CORE, CM_IDLEST_DPLL_DDRPHY, | |
1399 | * CM_IDLEST_DPLL_IVA, CM_IDLEST_DPLL_MPU | |
1400 | */ | |
1401 | #define OMAP4430_ST_DPLL_CLK_SHIFT (1 << 0) | |
1402 | #define OMAP4430_ST_DPLL_CLK_MASK BITFIELD(0, 0) | |
1403 | ||
1404 | /* Used by CM_CLKDCOLDO_DPLL_USB */ | |
1405 | #define OMAP4430_ST_DPLL_CLKDCOLDO_SHIFT (1 << 9) | |
1406 | #define OMAP4430_ST_DPLL_CLKDCOLDO_MASK BITFIELD(9, 9) | |
1407 | ||
1408 | /* | |
1409 | * Used by CM_DIV_M2_DPLL_PER, CM_DIV_M2_DPLL_USB, CM_DIV_M2_DPLL_CORE_RESTORE, | |
1410 | * CM_DIV_M2_DPLL_ABE, CM_DIV_M2_DPLL_CORE, CM_DIV_M2_DPLL_DDRPHY, | |
1411 | * CM_DIV_M2_DPLL_MPU | |
1412 | */ | |
1413 | #define OMAP4430_ST_DPLL_CLKOUT_SHIFT (1 << 9) | |
1414 | #define OMAP4430_ST_DPLL_CLKOUT_MASK BITFIELD(9, 9) | |
1415 | ||
1416 | /* | |
1417 | * Used by CM_DIV_M3_DPLL_PER, CM_DIV_M3_DPLL_CORE_RESTORE, CM_DIV_M3_DPLL_ABE, | |
1418 | * CM_DIV_M3_DPLL_CORE | |
1419 | */ | |
1420 | #define OMAP4430_ST_DPLL_CLKOUTHIF_SHIFT (1 << 9) | |
1421 | #define OMAP4430_ST_DPLL_CLKOUTHIF_MASK BITFIELD(9, 9) | |
1422 | ||
1423 | /* Used by CM_DIV_M2_DPLL_PER, CM_DIV_M2_DPLL_UNIPRO, CM_DIV_M2_DPLL_ABE */ | |
1424 | #define OMAP4430_ST_DPLL_CLKOUTX2_SHIFT (1 << 11) | |
1425 | #define OMAP4430_ST_DPLL_CLKOUTX2_MASK BITFIELD(11, 11) | |
1426 | ||
1427 | /* | |
1428 | * Used by CM_DIV_M4_DPLL_PER, CM_DIV_M4_DPLL_CORE_RESTORE, | |
1429 | * CM_DIV_M4_DPLL_CORE, CM_DIV_M4_DPLL_DDRPHY, CM_DIV_M4_DPLL_IVA | |
1430 | */ | |
1431 | #define OMAP4430_ST_HSDIVIDER_CLKOUT1_SHIFT (1 << 9) | |
1432 | #define OMAP4430_ST_HSDIVIDER_CLKOUT1_MASK BITFIELD(9, 9) | |
1433 | ||
1434 | /* | |
1435 | * Used by CM_DIV_M5_DPLL_PER, CM_DIV_M5_DPLL_CORE_RESTORE, | |
1436 | * CM_DIV_M5_DPLL_CORE, CM_DIV_M5_DPLL_DDRPHY, CM_DIV_M5_DPLL_IVA | |
1437 | */ | |
1438 | #define OMAP4430_ST_HSDIVIDER_CLKOUT2_SHIFT (1 << 9) | |
1439 | #define OMAP4430_ST_HSDIVIDER_CLKOUT2_MASK BITFIELD(9, 9) | |
1440 | ||
1441 | /* | |
1442 | * Used by CM_DIV_M6_DPLL_PER, CM_DIV_M6_DPLL_CORE_RESTORE, | |
1443 | * CM_DIV_M6_DPLL_CORE, CM_DIV_M6_DPLL_DDRPHY | |
1444 | */ | |
1445 | #define OMAP4430_ST_HSDIVIDER_CLKOUT3_SHIFT (1 << 9) | |
1446 | #define OMAP4430_ST_HSDIVIDER_CLKOUT3_MASK BITFIELD(9, 9) | |
1447 | ||
1448 | /* | |
1449 | * Used by CM_DIV_M7_DPLL_PER, CM_DIV_M7_DPLL_CORE_RESTORE, | |
1450 | * CM_DIV_M7_DPLL_CORE | |
1451 | */ | |
1452 | #define OMAP4430_ST_HSDIVIDER_CLKOUT4_SHIFT (1 << 9) | |
1453 | #define OMAP4430_ST_HSDIVIDER_CLKOUT4_MASK BITFIELD(9, 9) | |
1454 | ||
1455 | /* Used by CM_SYS_CLKSEL */ | |
1456 | #define OMAP4430_SYS_CLKSEL_SHIFT (1 << 0) | |
1457 | #define OMAP4430_SYS_CLKSEL_MASK BITFIELD(0, 2) | |
1458 | ||
1459 | /* Used by CM_L4CFG_DYNAMICDEP */ | |
1460 | #define OMAP4430_TESLA_DYNDEP_SHIFT (1 << 1) | |
1461 | #define OMAP4430_TESLA_DYNDEP_MASK BITFIELD(1, 1) | |
1462 | ||
1463 | /* Used by CM_DUCATI_STATICDEP, CM_MPU_STATICDEP */ | |
1464 | #define OMAP4430_TESLA_STATDEP_SHIFT (1 << 1) | |
1465 | #define OMAP4430_TESLA_STATDEP_MASK BITFIELD(1, 1) | |
1466 | ||
1467 | /* | |
1468 | * Used by CM_EMU_DYNAMICDEP, CM_D2D_DYNAMICDEP, CM_DUCATI_DYNAMICDEP, | |
1469 | * CM_L3_1_DYNAMICDEP, CM_L3_2_DYNAMICDEP, CM_L4CFG_DYNAMICDEP, | |
1470 | * CM_L4PER_DYNAMICDEP, CM_MPU_DYNAMICDEP, CM_TESLA_DYNAMICDEP | |
1471 | */ | |
1472 | #define OMAP4430_WINDOWSIZE_SHIFT (1 << 24) | |
1473 | #define OMAP4430_WINDOWSIZE_MASK BITFIELD(24, 27) | |
1474 | #endif |