ARM: OMAP2+: Prepare for irqs.h removal
[deliverable/linux.git] / arch / arm / mach-omap2 / devices.c
CommitLineData
1dbae815
TL
1/*
2 * linux/arch/arm/mach-omap2/devices.c
3 *
4 * OMAP2 platform device setup/initialization
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 */
2f8163ba 11#include <linux/gpio.h>
1dbae815
TL
12#include <linux/kernel.h>
13#include <linux/init.h>
14#include <linux/platform_device.h>
fced80c7 15#include <linux/io.h>
917fa280 16#include <linux/clk.h>
f2ce6231 17#include <linux/err.h>
1a5d8190 18#include <linux/slab.h>
ad8dfac6 19#include <linux/of.h>
0f1142a5 20#include <linux/platform_data/omap4-keypad.h>
1dbae815 21
a09e64fb 22#include <mach/hardware.h>
1dbae815
TL
23#include <asm/mach-types.h>
24#include <asm/mach/map.h>
88341334 25#include <asm/pmu.h>
1dbae815 26
ee0839c2 27#include "iomap.h"
ee5500c4 28#include <plat/dma.h>
f2ce6231
VC
29#include <plat/omap_hwmod.h>
30#include <plat/omap_device.h>
59556765 31#include <plat/omap4-keypad.h>
1dbae815 32
7d7e1eba
TL
33#include "soc.h"
34#include "common.h"
4896e394 35#include "mux.h"
4814ced5 36#include "control.h"
a11f6706 37#include "devices.h"
4896e394 38
0abcf618 39#define L3_MODULES_MAX_LEN 12
a4dc616a 40#define L3_MODULES 3
0abcf618 41
42static int __init omap3_l3_init(void)
43{
0abcf618 44 struct omap_hwmod *oh;
3528c58e 45 struct platform_device *pdev;
0abcf618 46 char oh_name[L3_MODULES_MAX_LEN];
47
48 /*
49 * To avoid code running on other OMAPs in
50 * multi-omap builds
51 */
52 if (!(cpu_is_omap34xx()))
53 return -ENODEV;
54
eeb3711b 55 snprintf(oh_name, L3_MODULES_MAX_LEN, "l3_main");
0abcf618 56
57 oh = omap_hwmod_lookup(oh_name);
58
59 if (!oh)
60 pr_err("could not look up %s\n", oh_name);
61
3528c58e 62 pdev = omap_device_build("omap_l3_smx", 0, oh, NULL, 0,
0abcf618 63 NULL, 0, 0);
64
3528c58e 65 WARN(IS_ERR(pdev), "could not build omap_device for %s\n", oh_name);
0abcf618 66
3528c58e 67 return IS_ERR(pdev) ? PTR_ERR(pdev) : 0;
0abcf618 68}
69postcore_initcall(omap3_l3_init);
70
a4dc616a 71static int __init omap4_l3_init(void)
72{
eeb3711b 73 int i;
a4dc616a 74 struct omap_hwmod *oh[3];
3528c58e 75 struct platform_device *pdev;
a4dc616a 76 char oh_name[L3_MODULES_MAX_LEN];
77
ad8dfac6
BC
78 /* If dtb is there, the devices will be created dynamically */
79 if (of_have_populated_dt())
80 return -ENODEV;
81
a4dc616a 82 /*
83 * To avoid code running on other OMAPs in
84 * multi-omap builds
85 */
e17933c2 86 if (!cpu_is_omap44xx() && !soc_is_omap54xx())
a4dc616a 87 return -ENODEV;
88
89 for (i = 0; i < L3_MODULES; i++) {
eeb3711b 90 snprintf(oh_name, L3_MODULES_MAX_LEN, "l3_main_%d", i+1);
a4dc616a 91
92 oh[i] = omap_hwmod_lookup(oh_name);
93 if (!(oh[i]))
94 pr_err("could not look up %s\n", oh_name);
95 }
96
3528c58e 97 pdev = omap_device_build_ss("omap_l3_noc", 0, oh, 3, NULL,
a4dc616a 98 0, NULL, 0, 0);
99
3528c58e 100 WARN(IS_ERR(pdev), "could not build omap_device for %s\n", oh_name);
a4dc616a 101
3528c58e 102 return IS_ERR(pdev) ? PTR_ERR(pdev) : 0;
a4dc616a 103}
104postcore_initcall(omap4_l3_init);
105
828c707e 106#if defined(CONFIG_VIDEO_OMAP2) || defined(CONFIG_VIDEO_OMAP2_MODULE)
c40fae95 107
cfe2cde6 108static struct resource omap2cam_resources[] = {
c40fae95 109 {
828c707e
TL
110 .start = OMAP24XX_CAMERA_BASE,
111 .end = OMAP24XX_CAMERA_BASE + 0xfff,
112 .flags = IORESOURCE_MEM,
113 },
114 {
7d7e1eba 115 .start = 24 + OMAP_INTC_START,
828c707e
TL
116 .flags = IORESOURCE_IRQ,
117 }
118};
119
cfe2cde6 120static struct platform_device omap2cam_device = {
828c707e
TL
121 .name = "omap24xxcam",
122 .id = -1,
cfe2cde6
SA
123 .num_resources = ARRAY_SIZE(omap2cam_resources),
124 .resource = omap2cam_resources,
828c707e 125};
a11f6706 126#endif
828c707e 127
1a51a0ce
OBC
128#if defined(CONFIG_IOMMU_API)
129
130#include <plat/iommu.h>
131
828c707e
TL
132static struct resource omap3isp_resources[] = {
133 {
134 .start = OMAP3430_ISP_BASE,
135 .end = OMAP3430_ISP_END,
136 .flags = IORESOURCE_MEM,
137 },
828c707e
TL
138 {
139 .start = OMAP3430_ISP_CCP2_BASE,
140 .end = OMAP3430_ISP_CCP2_END,
141 .flags = IORESOURCE_MEM,
142 },
143 {
144 .start = OMAP3430_ISP_CCDC_BASE,
145 .end = OMAP3430_ISP_CCDC_END,
146 .flags = IORESOURCE_MEM,
147 },
148 {
149 .start = OMAP3430_ISP_HIST_BASE,
150 .end = OMAP3430_ISP_HIST_END,
151 .flags = IORESOURCE_MEM,
152 },
153 {
154 .start = OMAP3430_ISP_H3A_BASE,
155 .end = OMAP3430_ISP_H3A_END,
156 .flags = IORESOURCE_MEM,
157 },
158 {
159 .start = OMAP3430_ISP_PREV_BASE,
160 .end = OMAP3430_ISP_PREV_END,
161 .flags = IORESOURCE_MEM,
162 },
163 {
164 .start = OMAP3430_ISP_RESZ_BASE,
165 .end = OMAP3430_ISP_RESZ_END,
166 .flags = IORESOURCE_MEM,
167 },
168 {
169 .start = OMAP3430_ISP_SBL_BASE,
170 .end = OMAP3430_ISP_SBL_END,
171 .flags = IORESOURCE_MEM,
172 },
173 {
6817a69a
TT
174 .start = OMAP3430_ISP_CSI2A_REGS1_BASE,
175 .end = OMAP3430_ISP_CSI2A_REGS1_END,
828c707e
TL
176 .flags = IORESOURCE_MEM,
177 },
178 {
6817a69a
TT
179 .start = OMAP3430_ISP_CSIPHY2_BASE,
180 .end = OMAP3430_ISP_CSIPHY2_END,
181 .flags = IORESOURCE_MEM,
182 },
183 {
184 .start = OMAP3630_ISP_CSI2A_REGS2_BASE,
185 .end = OMAP3630_ISP_CSI2A_REGS2_END,
828c707e
TL
186 .flags = IORESOURCE_MEM,
187 },
188 {
6817a69a
TT
189 .start = OMAP3630_ISP_CSI2C_REGS1_BASE,
190 .end = OMAP3630_ISP_CSI2C_REGS1_END,
191 .flags = IORESOURCE_MEM,
192 },
193 {
194 .start = OMAP3630_ISP_CSIPHY1_BASE,
195 .end = OMAP3630_ISP_CSIPHY1_END,
196 .flags = IORESOURCE_MEM,
197 },
198 {
199 .start = OMAP3630_ISP_CSI2C_REGS2_BASE,
200 .end = OMAP3630_ISP_CSI2C_REGS2_END,
828c707e
TL
201 .flags = IORESOURCE_MEM,
202 },
203 {
7d7e1eba 204 .start = 24 + OMAP_INTC_START,
828c707e
TL
205 .flags = IORESOURCE_IRQ,
206 }
207};
208
209static struct platform_device omap3isp_device = {
210 .name = "omap3isp",
211 .id = -1,
212 .num_resources = ARRAY_SIZE(omap3isp_resources),
213 .resource = omap3isp_resources,
214};
215
c8eaab3b
OBC
216static struct omap_iommu_arch_data omap3_isp_iommu = {
217 .name = "isp",
218};
219
a11f6706 220int omap3_init_camera(struct isp_platform_data *pdata)
828c707e 221{
a11f6706 222 omap3isp_device.dev.platform_data = pdata;
c8eaab3b
OBC
223 omap3isp_device.dev.archdata.iommu = &omap3_isp_iommu;
224
a11f6706 225 return platform_device_register(&omap3isp_device);
828c707e 226}
828c707e 227
1a51a0ce
OBC
228#else /* !CONFIG_IOMMU_API */
229
230int omap3_init_camera(struct isp_platform_data *pdata)
231{
232 return 0;
233}
234
235#endif
236
828c707e
TL
237static inline void omap_init_camera(void)
238{
cfe2cde6
SA
239#if defined(CONFIG_VIDEO_OMAP2) || defined(CONFIG_VIDEO_OMAP2_MODULE)
240 if (cpu_is_omap24xx())
241 platform_device_register(&omap2cam_device);
828c707e 242#endif
cfe2cde6 243}
828c707e 244
59556765 245int __init omap4_keyboard_init(struct omap4_keypad_platform_data
f67df6c6 246 *sdp4430_keypad_data, struct omap_board_data *bdata)
59556765 247{
3528c58e 248 struct platform_device *pdev;
59556765
SR
249 struct omap_hwmod *oh;
250 struct omap4_keypad_platform_data *keypad_data;
251 unsigned int id = -1;
252 char *oh_name = "kbd";
253 char *name = "omap4-keypad";
254
255 oh = omap_hwmod_lookup(oh_name);
256 if (!oh) {
257 pr_err("Could not look up %s\n", oh_name);
258 return -ENODEV;
259 }
260
261 keypad_data = sdp4430_keypad_data;
262
3528c58e 263 pdev = omap_device_build(name, id, oh, keypad_data,
f718e2c0 264 sizeof(struct omap4_keypad_platform_data), NULL, 0, 0);
59556765 265
3528c58e 266 if (IS_ERR(pdev)) {
25985edc 267 WARN(1, "Can't build omap_device for %s:%s.\n",
59556765 268 name, oh->name);
3528c58e 269 return PTR_ERR(pdev);
59556765 270 }
f67df6c6 271 oh->mux = omap_hwmod_mux_init(bdata->pads, bdata->pads_cnt);
59556765
SR
272
273 return 0;
274}
275
6c20a683 276#if defined(CONFIG_OMAP_MBOX_FWK) || defined(CONFIG_OMAP_MBOX_FWK_MODULE)
9cf793f9 277static inline void __init omap_init_mbox(void)
c40fae95 278{
69dbf857 279 struct omap_hwmod *oh;
3528c58e 280 struct platform_device *pdev;
69dbf857
FC
281
282 oh = omap_hwmod_lookup("mailbox");
283 if (!oh) {
284 pr_err("%s: unable to find hwmod\n", __func__);
6c20a683
HD
285 return;
286 }
69dbf857 287
f718e2c0 288 pdev = omap_device_build("omap-mailbox", -1, oh, NULL, 0, NULL, 0, 0);
3528c58e
KH
289 WARN(IS_ERR(pdev), "%s: could not build device, err %ld\n",
290 __func__, PTR_ERR(pdev));
c40fae95
TL
291}
292#else
293static inline void omap_init_mbox(void) { }
6c20a683 294#endif /* CONFIG_OMAP_MBOX_FWK */
c40fae95 295
9b6553cd 296static inline void omap_init_sti(void) {}
9b6553cd 297
f0fba2ad
LG
298#if defined(CONFIG_SND_SOC) || defined(CONFIG_SND_SOC_MODULE)
299
300static struct platform_device omap_pcm = {
301 .name = "omap-pcm-audio",
302 .id = -1,
303};
304
f0fba2ad
LG
305static void omap_init_audio(void)
306{
f0fba2ad
LG
307 platform_device_register(&omap_pcm);
308}
309
310#else
311static inline void omap_init_audio(void) {}
312#endif
313
d231f5cb
PU
314#if defined(CONFIG_SND_OMAP_SOC_MCPDM) || \
315 defined(CONFIG_SND_OMAP_SOC_MCPDM_MODULE)
316
9cf793f9 317static void __init omap_init_mcpdm(void)
d231f5cb
PU
318{
319 struct omap_hwmod *oh;
927dbbb2 320 struct platform_device *pdev;
d231f5cb
PU
321
322 oh = omap_hwmod_lookup("mcpdm");
323 if (!oh) {
324 printk(KERN_ERR "Could not look up mcpdm hw_mod\n");
325 return;
326 }
327
927dbbb2
PU
328 pdev = omap_device_build("omap-mcpdm", -1, oh, NULL, 0, NULL, 0, 0);
329 WARN(IS_ERR(pdev), "Can't build omap_device for omap-mcpdm.\n");
d231f5cb
PU
330}
331#else
332static inline void omap_init_mcpdm(void) {}
333#endif
334
de9eb097
PU
335#if defined(CONFIG_SND_OMAP_SOC_DMIC) || \
336 defined(CONFIG_SND_OMAP_SOC_DMIC_MODULE)
337
9cf793f9 338static void __init omap_init_dmic(void)
de9eb097
PU
339{
340 struct omap_hwmod *oh;
341 struct platform_device *pdev;
342
343 oh = omap_hwmod_lookup("dmic");
344 if (!oh) {
345 printk(KERN_ERR "Could not look up mcpdm hw_mod\n");
346 return;
347 }
348
349 pdev = omap_device_build("omap-dmic", -1, oh, NULL, 0, NULL, 0, 0);
350 WARN(IS_ERR(pdev), "Can't build omap_device for omap-dmic.\n");
351}
352#else
353static inline void omap_init_dmic(void) {}
354#endif
355
5eeec215
RN
356#if defined(CONFIG_SND_OMAP_SOC_OMAP_HDMI) || \
357 defined(CONFIG_SND_OMAP_SOC_OMAP_HDMI_MODULE)
358
359static struct platform_device omap_hdmi_audio = {
360 .name = "omap-hdmi-audio",
361 .id = -1,
362};
363
364static void __init omap_init_hdmi_audio(void)
365{
366 struct omap_hwmod *oh;
367 struct platform_device *pdev;
368
369 oh = omap_hwmod_lookup("dss_hdmi");
370 if (!oh) {
371 printk(KERN_ERR "Could not look up dss_hdmi hw_mod\n");
372 return;
373 }
374
375 pdev = omap_device_build("omap-hdmi-audio-dai",
376 -1, oh, NULL, 0, NULL, 0, 0);
377 WARN(IS_ERR(pdev),
378 "Can't build omap_device for omap-hdmi-audio-dai.\n");
379
380 platform_device_register(&omap_hdmi_audio);
381}
382#else
383static inline void omap_init_hdmi_audio(void) {}
384#endif
385
646e3ed1 386#if defined(CONFIG_SPI_OMAP24XX) || defined(CONFIG_SPI_OMAP24XX_MODULE)
ed7eb9d9 387
ce491cf8 388#include <plat/mcspi.h>
ed7eb9d9 389
9cf793f9 390static int __init omap_mcspi_init(struct omap_hwmod *oh, void *unused)
af41a12f 391{
3528c58e 392 struct platform_device *pdev;
1a5d8190
C
393 char *name = "omap2_mcspi";
394 struct omap2_mcspi_platform_config *pdata;
395 static int spi_num;
396 struct omap2_mcspi_dev_attr *mcspi_attrib = oh->dev_attr;
397
398 pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
399 if (!pdata) {
400 pr_err("Memory allocation for McSPI device failed\n");
401 return -ENOMEM;
402 }
af41a12f 403
1a5d8190
C
404 pdata->num_cs = mcspi_attrib->num_chipselect;
405 switch (oh->class->rev) {
406 case OMAP2_MCSPI_REV:
407 case OMAP3_MCSPI_REV:
408 pdata->regs_offset = 0;
409 break;
410 case OMAP4_MCSPI_REV:
411 pdata->regs_offset = OMAP4_MCSPI_REG_OFFSET;
412 break;
413 default:
414 pr_err("Invalid McSPI Revision value\n");
e0feca89 415 kfree(pdata);
1a5d8190
C
416 return -EINVAL;
417 }
af41a12f 418
1a5d8190 419 spi_num++;
3528c58e 420 pdev = omap_device_build(name, spi_num, oh, pdata,
f718e2c0 421 sizeof(*pdata), NULL, 0, 0);
3528c58e 422 WARN(IS_ERR(pdev), "Can't build omap_device for %s:%s\n",
1a5d8190
C
423 name, oh->name);
424 kfree(pdata);
425 return 0;
af41a12f 426}
af41a12f
TL
427
428static void omap_init_mcspi(void)
429{
1a5d8190 430 omap_hwmod_for_each_by_class("mcspi", omap_mcspi_init, NULL);
ed7eb9d9
JY
431}
432
433#else
434static inline void omap_init_mcspi(void) {}
435#endif
436
88341334 437static struct resource omap2_pmu_resource = {
7d7e1eba 438 .start = 3 + OMAP_INTC_START,
88341334
WD
439 .flags = IORESOURCE_IRQ,
440};
441
442static struct resource omap3_pmu_resource = {
7d7e1eba 443 .start = 3 + OMAP_INTC_START,
88341334
WD
444 .flags = IORESOURCE_IRQ,
445};
446
447static struct platform_device omap_pmu_device = {
448 .name = "arm-pmu",
449 .id = ARM_PMU_DEVICE_CPU,
450 .num_resources = 1,
451};
452
453static void omap_init_pmu(void)
454{
455 if (cpu_is_omap24xx())
456 omap_pmu_device.resource = &omap2_pmu_resource;
457 else if (cpu_is_omap34xx())
458 omap_pmu_device.resource = &omap3_pmu_resource;
459 else
460 return;
461
462 platform_device_register(&omap_pmu_device);
463}
464
465
ee5500c4
DK
466#if defined(CONFIG_CRYPTO_DEV_OMAP_SHAM) || defined(CONFIG_CRYPTO_DEV_OMAP_SHAM_MODULE)
467
edc774ed 468#ifdef CONFIG_ARCH_OMAP2
ee5500c4 469static struct resource omap2_sham_resources[] = {
646e3ed1
TL
470 {
471 .start = OMAP24XX_SEC_SHA1MD5_BASE,
472 .end = OMAP24XX_SEC_SHA1MD5_BASE + 0x64,
473 .flags = IORESOURCE_MEM,
474 },
475 {
7d7e1eba 476 .start = 51 + OMAP_INTC_START,
646e3ed1
TL
477 .flags = IORESOURCE_IRQ,
478 }
479};
ee5500c4
DK
480static int omap2_sham_resources_sz = ARRAY_SIZE(omap2_sham_resources);
481#else
482#define omap2_sham_resources NULL
483#define omap2_sham_resources_sz 0
484#endif
646e3ed1 485
edc774ed 486#ifdef CONFIG_ARCH_OMAP3
ee5500c4
DK
487static struct resource omap3_sham_resources[] = {
488 {
489 .start = OMAP34XX_SEC_SHA1MD5_BASE,
490 .end = OMAP34XX_SEC_SHA1MD5_BASE + 0x64,
491 .flags = IORESOURCE_MEM,
492 },
493 {
7d7e1eba 494 .start = 49 + OMAP_INTC_START,
ee5500c4
DK
495 .flags = IORESOURCE_IRQ,
496 },
497 {
498 .start = OMAP34XX_DMA_SHA1MD5_RX,
499 .flags = IORESOURCE_DMA,
500 }
501};
502static int omap3_sham_resources_sz = ARRAY_SIZE(omap3_sham_resources);
503#else
504#define omap3_sham_resources NULL
505#define omap3_sham_resources_sz 0
506#endif
507
508static struct platform_device sham_device = {
509 .name = "omap-sham",
646e3ed1 510 .id = -1,
646e3ed1
TL
511};
512
ee5500c4 513static void omap_init_sham(void)
646e3ed1 514{
ee5500c4
DK
515 if (cpu_is_omap24xx()) {
516 sham_device.resource = omap2_sham_resources;
517 sham_device.num_resources = omap2_sham_resources_sz;
518 } else if (cpu_is_omap34xx()) {
519 sham_device.resource = omap3_sham_resources;
520 sham_device.num_resources = omap3_sham_resources_sz;
521 } else {
522 pr_err("%s: platform not supported\n", __func__);
523 return;
524 }
525 platform_device_register(&sham_device);
646e3ed1
TL
526}
527#else
ee5500c4 528static inline void omap_init_sham(void) { }
646e3ed1
TL
529#endif
530
b744c679
DK
531#if defined(CONFIG_CRYPTO_DEV_OMAP_AES) || defined(CONFIG_CRYPTO_DEV_OMAP_AES_MODULE)
532
82a0c149 533#ifdef CONFIG_ARCH_OMAP2
b744c679
DK
534static struct resource omap2_aes_resources[] = {
535 {
536 .start = OMAP24XX_SEC_AES_BASE,
537 .end = OMAP24XX_SEC_AES_BASE + 0x4C,
538 .flags = IORESOURCE_MEM,
539 },
540 {
541 .start = OMAP24XX_DMA_AES_TX,
542 .flags = IORESOURCE_DMA,
543 },
544 {
545 .start = OMAP24XX_DMA_AES_RX,
546 .flags = IORESOURCE_DMA,
547 }
548};
549static int omap2_aes_resources_sz = ARRAY_SIZE(omap2_aes_resources);
550#else
551#define omap2_aes_resources NULL
552#define omap2_aes_resources_sz 0
553#endif
554
82a0c149 555#ifdef CONFIG_ARCH_OMAP3
b744c679
DK
556static struct resource omap3_aes_resources[] = {
557 {
558 .start = OMAP34XX_SEC_AES_BASE,
559 .end = OMAP34XX_SEC_AES_BASE + 0x4C,
560 .flags = IORESOURCE_MEM,
561 },
562 {
563 .start = OMAP34XX_DMA_AES2_TX,
564 .flags = IORESOURCE_DMA,
565 },
566 {
567 .start = OMAP34XX_DMA_AES2_RX,
568 .flags = IORESOURCE_DMA,
569 }
570};
571static int omap3_aes_resources_sz = ARRAY_SIZE(omap3_aes_resources);
572#else
573#define omap3_aes_resources NULL
574#define omap3_aes_resources_sz 0
575#endif
576
577static struct platform_device aes_device = {
578 .name = "omap-aes",
579 .id = -1,
580};
581
582static void omap_init_aes(void)
583{
584 if (cpu_is_omap24xx()) {
585 aes_device.resource = omap2_aes_resources;
586 aes_device.num_resources = omap2_aes_resources_sz;
587 } else if (cpu_is_omap34xx()) {
588 aes_device.resource = omap3_aes_resources;
589 aes_device.num_resources = omap3_aes_resources_sz;
590 } else {
591 pr_err("%s: platform not supported\n", __func__);
592 return;
593 }
594 platform_device_register(&aes_device);
595}
596
597#else
598static inline void omap_init_aes(void) { }
599#endif
600
d8874665
TL
601/*-------------------------------------------------------------------------*/
602
b227358d
VH
603#if defined(CONFIG_VIDEO_OMAP2_VOUT) || \
604 defined(CONFIG_VIDEO_OMAP2_VOUT_MODULE)
605#if defined(CONFIG_FB_OMAP2) || defined(CONFIG_FB_OMAP2_MODULE)
606static struct resource omap_vout_resource[3 - CONFIG_FB_OMAP2_NUM_FBS] = {
607};
608#else
609static struct resource omap_vout_resource[2] = {
610};
611#endif
612
613static struct platform_device omap_vout_device = {
614 .name = "omap_vout",
615 .num_resources = ARRAY_SIZE(omap_vout_resource),
616 .resource = &omap_vout_resource[0],
617 .id = -1,
618};
619static void omap_init_vout(void)
620{
621 if (platform_device_register(&omap_vout_device) < 0)
622 printk(KERN_ERR "Unable to register OMAP-VOUT device\n");
623}
624#else
625static inline void omap_init_vout(void) {}
626#endif
627
1dbae815
TL
628/*-------------------------------------------------------------------------*/
629
630static int __init omap2_init_devices(void)
631{
81fbc5ef
PW
632 /*
633 * please keep these calls, and their implementations above,
1dbae815
TL
634 * in alphabetical order so they're easier to sort through.
635 */
f0fba2ad 636 omap_init_audio();
828c707e 637 omap_init_camera();
5eeec215 638 omap_init_hdmi_audio();
c40fae95 639 omap_init_mbox();
efcf1e50 640 /* If dtb is there, the devices will be created dynamically */
259bd6ce
PU
641 if (!of_have_populated_dt()) {
642 omap_init_dmic();
4b21ffcf 643 omap_init_mcpdm();
efcf1e50 644 omap_init_mcspi();
259bd6ce 645 }
88341334 646 omap_init_pmu();
9b6553cd 647 omap_init_sti();
ee5500c4 648 omap_init_sham();
b744c679 649 omap_init_aes();
b227358d 650 omap_init_vout();
1dbae815
TL
651
652 return 0;
653}
654arch_initcall(omap2_init_devices);
f2ce6231
VC
655
656#if defined(CONFIG_OMAP_WATCHDOG) || defined(CONFIG_OMAP_WATCHDOG_MODULE)
f2ce6231
VC
657static int __init omap_init_wdt(void)
658{
659 int id = -1;
3528c58e 660 struct platform_device *pdev;
f2ce6231
VC
661 struct omap_hwmod *oh;
662 char *oh_name = "wd_timer2";
663 char *dev_name = "omap_wdt";
664
6e152231 665 if (!cpu_class_is_omap2() || of_have_populated_dt())
f2ce6231
VC
666 return 0;
667
668 oh = omap_hwmod_lookup(oh_name);
669 if (!oh) {
670 pr_err("Could not look up wd_timer%d hwmod\n", id);
671 return -EINVAL;
672 }
673
f718e2c0 674 pdev = omap_device_build(dev_name, id, oh, NULL, 0, NULL, 0, 0);
3528c58e 675 WARN(IS_ERR(pdev), "Can't build omap_device for %s:%s.\n",
f2ce6231
VC
676 dev_name, oh->name);
677 return 0;
678}
679subsys_initcall(omap_init_wdt);
680#endif
This page took 0.562834 seconds and 5 git commands to generate.