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arm/dts: add wdt node for omap3 and omap4
[deliverable/linux.git] / arch / arm / mach-omap2 / devices.c
CommitLineData
1dbae815
TL		 1/*
2 * linux/arch/arm/mach-omap2/devices.c
3 *
4 * OMAP2 platform device setup/initialization
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 */
2f8163ba 11#include <linux/gpio.h>
1dbae815
TL		 12#include <linux/kernel.h>
13#include <linux/init.h>
14#include <linux/platform_device.h>
fced80c7 15#include <linux/io.h>
917fa280 16#include <linux/clk.h>
f2ce6231 17#include <linux/err.h>
1a5d8190 18#include <linux/slab.h>
ad8dfac6 19#include <linux/of.h>
0f1142a5 20#include <linux/platform_data/omap4-keypad.h>
1dbae815 21
a09e64fb 22#include <mach/hardware.h>
88341334 23#include <mach/irqs.h>
1dbae815
TL		 24#include <asm/mach-types.h>
25#include <asm/mach/map.h>
88341334 26#include <asm/pmu.h>
1dbae815 27
ee0839c2 28#include "iomap.h"
ce491cf8 29#include <plat/board.h>
ce491cf8 30#include <plat/mmc.h>
ee5500c4 31#include <plat/dma.h>
f2ce6231
VC		 32#include <plat/omap_hwmod.h>
33#include <plat/omap_device.h>
59556765 34#include <plat/omap4-keypad.h>
1dbae815 35
4896e394 36#include "mux.h"
4814ced5 37#include "control.h"
a11f6706 38#include "devices.h"
4896e394 39
0abcf618 40#define L3_MODULES_MAX_LEN 12
a4dc616a 41#define L3_MODULES 3
0abcf618 42
43static int __init omap3_l3_init(void)
44{
0abcf618 45 struct omap_hwmod *oh;
3528c58e 46 struct platform_device *pdev;
0abcf618 47 char oh_name[L3_MODULES_MAX_LEN];
48
49 /*
50 * To avoid code running on other OMAPs in
51 * multi-omap builds
52 */
53 if (!(cpu_is_omap34xx()))
54 return -ENODEV;
55
eeb3711b 56 snprintf(oh_name, L3_MODULES_MAX_LEN, "l3_main");
0abcf618 57
58 oh = omap_hwmod_lookup(oh_name);
59
60 if (!oh)
61 pr_err("could not look up %s\n", oh_name);
62
3528c58e 63 pdev = omap_device_build("omap_l3_smx", 0, oh, NULL, 0,
0abcf618 64 NULL, 0, 0);
65
3528c58e 66 WARN(IS_ERR(pdev), "could not build omap_device for %s\n", oh_name);
0abcf618 67
3528c58e 68 return IS_ERR(pdev) ? PTR_ERR(pdev) : 0;
0abcf618 69}
70postcore_initcall(omap3_l3_init);
71
a4dc616a 72static int __init omap4_l3_init(void)
73{
eeb3711b 74 int i;
a4dc616a 75 struct omap_hwmod *oh[3];
3528c58e 76 struct platform_device *pdev;
a4dc616a 77 char oh_name[L3_MODULES_MAX_LEN];
78
ad8dfac6
BC		 79 /* If dtb is there, the devices will be created dynamically */
80 if (of_have_populated_dt())
81 return -ENODEV;
82
a4dc616a 83 /*
84 * To avoid code running on other OMAPs in
85 * multi-omap builds
86 */
87 if (!(cpu_is_omap44xx()))
88 return -ENODEV;
89
90 for (i = 0; i < L3_MODULES; i++) {
eeb3711b 91 snprintf(oh_name, L3_MODULES_MAX_LEN, "l3_main_%d", i+1);
a4dc616a 92
93 oh[i] = omap_hwmod_lookup(oh_name);
94 if (!(oh[i]))
95 pr_err("could not look up %s\n", oh_name);
96 }
97
3528c58e 98 pdev = omap_device_build_ss("omap_l3_noc", 0, oh, 3, NULL,
a4dc616a 99 0, NULL, 0, 0);
100
3528c58e 101 WARN(IS_ERR(pdev), "could not build omap_device for %s\n", oh_name);
a4dc616a 102
3528c58e 103 return IS_ERR(pdev) ? PTR_ERR(pdev) : 0;
a4dc616a 104}
105postcore_initcall(omap4_l3_init);
106
828c707e 107#if defined(CONFIG_VIDEO_OMAP2) || defined(CONFIG_VIDEO_OMAP2_MODULE)
c40fae95 108
cfe2cde6 109static struct resource omap2cam_resources[] = {
c40fae95 110 {
828c707e
TL		 111 .start = OMAP24XX_CAMERA_BASE,
112 .end = OMAP24XX_CAMERA_BASE + 0xfff,
113 .flags = IORESOURCE_MEM,
114 },
115 {
116 .start = INT_24XX_CAM_IRQ,
117 .flags = IORESOURCE_IRQ,
118 }
119};
120
cfe2cde6 121static struct platform_device omap2cam_device = {
828c707e
TL		 122 .name = "omap24xxcam",
123 .id = -1,
cfe2cde6
SA		 124 .num_resources = ARRAY_SIZE(omap2cam_resources),
125 .resource = omap2cam_resources,
828c707e 126};
a11f6706 127#endif
828c707e 128
1a51a0ce
OBC		 129#if defined(CONFIG_IOMMU_API)
130
131#include <plat/iommu.h>
132
828c707e
TL		 133static struct resource omap3isp_resources[] = {
134 {
135 .start = OMAP3430_ISP_BASE,
136 .end = OMAP3430_ISP_END,
137 .flags = IORESOURCE_MEM,
138 },
828c707e
TL		 139 {
140 .start = OMAP3430_ISP_CCP2_BASE,
141 .end = OMAP3430_ISP_CCP2_END,
142 .flags = IORESOURCE_MEM,
143 },
144 {
145 .start = OMAP3430_ISP_CCDC_BASE,
146 .end = OMAP3430_ISP_CCDC_END,
147 .flags = IORESOURCE_MEM,
148 },
149 {
150 .start = OMAP3430_ISP_HIST_BASE,
151 .end = OMAP3430_ISP_HIST_END,
152 .flags = IORESOURCE_MEM,
153 },
154 {
155 .start = OMAP3430_ISP_H3A_BASE,
156 .end = OMAP3430_ISP_H3A_END,
157 .flags = IORESOURCE_MEM,
158 },
159 {
160 .start = OMAP3430_ISP_PREV_BASE,
161 .end = OMAP3430_ISP_PREV_END,
162 .flags = IORESOURCE_MEM,
163 },
164 {
165 .start = OMAP3430_ISP_RESZ_BASE,
166 .end = OMAP3430_ISP_RESZ_END,
167 .flags = IORESOURCE_MEM,
168 },
169 {
170 .start = OMAP3430_ISP_SBL_BASE,
171 .end = OMAP3430_ISP_SBL_END,
172 .flags = IORESOURCE_MEM,
173 },
174 {
6817a69a
TT		 175 .start = OMAP3430_ISP_CSI2A_REGS1_BASE,
176 .end = OMAP3430_ISP_CSI2A_REGS1_END,
828c707e
TL		 177 .flags = IORESOURCE_MEM,
178 },
179 {
6817a69a
TT		 180 .start = OMAP3430_ISP_CSIPHY2_BASE,
181 .end = OMAP3430_ISP_CSIPHY2_END,
182 .flags = IORESOURCE_MEM,
183 },
184 {
185 .start = OMAP3630_ISP_CSI2A_REGS2_BASE,
186 .end = OMAP3630_ISP_CSI2A_REGS2_END,
828c707e
TL		 187 .flags = IORESOURCE_MEM,
188 },
189 {
6817a69a
TT		 190 .start = OMAP3630_ISP_CSI2C_REGS1_BASE,
191 .end = OMAP3630_ISP_CSI2C_REGS1_END,
192 .flags = IORESOURCE_MEM,
193 },
194 {
195 .start = OMAP3630_ISP_CSIPHY1_BASE,
196 .end = OMAP3630_ISP_CSIPHY1_END,
197 .flags = IORESOURCE_MEM,
198 },
199 {
200 .start = OMAP3630_ISP_CSI2C_REGS2_BASE,
201 .end = OMAP3630_ISP_CSI2C_REGS2_END,
828c707e
TL		 202 .flags = IORESOURCE_MEM,
203 },
204 {
205 .start = INT_34XX_CAM_IRQ,
206 .flags = IORESOURCE_IRQ,
207 }
208};
209
210static struct platform_device omap3isp_device = {
211 .name = "omap3isp",
212 .id = -1,
213 .num_resources = ARRAY_SIZE(omap3isp_resources),
214 .resource = omap3isp_resources,
215};
216
c8eaab3b
OBC		 217static struct omap_iommu_arch_data omap3_isp_iommu = {
218 .name = "isp",
219};
220
a11f6706 221int omap3_init_camera(struct isp_platform_data *pdata)
828c707e 222{
a11f6706 223 omap3isp_device.dev.platform_data = pdata;
c8eaab3b
OBC		 224 omap3isp_device.dev.archdata.iommu = &omap3_isp_iommu;
225
a11f6706 226 return platform_device_register(&omap3isp_device);
828c707e 227}
828c707e 228
1a51a0ce
OBC		 229#else /* !CONFIG_IOMMU_API */
230
231int omap3_init_camera(struct isp_platform_data *pdata)
232{
233 return 0;
234}
235
236#endif
237
828c707e
TL		 238static inline void omap_init_camera(void)
239{
cfe2cde6
SA		 240#if defined(CONFIG_VIDEO_OMAP2) || defined(CONFIG_VIDEO_OMAP2_MODULE)
241 if (cpu_is_omap24xx())
242 platform_device_register(&omap2cam_device);
828c707e 243#endif
cfe2cde6 244}
828c707e 245
59556765 246int __init omap4_keyboard_init(struct omap4_keypad_platform_data
f67df6c6 247 *sdp4430_keypad_data, struct omap_board_data *bdata)
59556765 248{
3528c58e 249 struct platform_device *pdev;
59556765
SR		 250 struct omap_hwmod *oh;
251 struct omap4_keypad_platform_data *keypad_data;
252 unsigned int id = -1;
253 char *oh_name = "kbd";
254 char *name = "omap4-keypad";
255
256 oh = omap_hwmod_lookup(oh_name);
257 if (!oh) {
258 pr_err("Could not look up %s\n", oh_name);
259 return -ENODEV;
260 }
261
262 keypad_data = sdp4430_keypad_data;
263
3528c58e 264 pdev = omap_device_build(name, id, oh, keypad_data,
f718e2c0 265 sizeof(struct omap4_keypad_platform_data), NULL, 0, 0);
59556765 266
3528c58e 267 if (IS_ERR(pdev)) {
25985edc 268 WARN(1, "Can't build omap_device for %s:%s.\n",
59556765 269 name, oh->name);
3528c58e 270 return PTR_ERR(pdev);
59556765 271 }
f67df6c6 272 oh->mux = omap_hwmod_mux_init(bdata->pads, bdata->pads_cnt);
59556765
SR		 273
274 return 0;
275}
276
6c20a683 277#if defined(CONFIG_OMAP_MBOX_FWK) || defined(CONFIG_OMAP_MBOX_FWK_MODULE)
9cf793f9 278static inline void __init omap_init_mbox(void)
c40fae95 279{
69dbf857 280 struct omap_hwmod *oh;
3528c58e 281 struct platform_device *pdev;
69dbf857
FC		 282
283 oh = omap_hwmod_lookup("mailbox");
284 if (!oh) {
285 pr_err("%s: unable to find hwmod\n", __func__);
6c20a683
HD		 286 return;
287 }
69dbf857 288
f718e2c0 289 pdev = omap_device_build("omap-mailbox", -1, oh, NULL, 0, NULL, 0, 0);
3528c58e
KH		 290 WARN(IS_ERR(pdev), "%s: could not build device, err %ld\n",
291 __func__, PTR_ERR(pdev));
c40fae95
TL		 292}
293#else
294static inline void omap_init_mbox(void) { }
6c20a683 295#endif /* CONFIG_OMAP_MBOX_FWK */
c40fae95 296
9b6553cd 297static inline void omap_init_sti(void) {}
9b6553cd 298
f0fba2ad
LG		 299#if defined(CONFIG_SND_SOC) || defined(CONFIG_SND_SOC_MODULE)
300
301static struct platform_device omap_pcm = {
302 .name = "omap-pcm-audio",
303 .id = -1,
304};
305
f0fba2ad
LG		 306static void omap_init_audio(void)
307{
f0fba2ad
LG		 308 platform_device_register(&omap_pcm);
309}
310
311#else
312static inline void omap_init_audio(void) {}
313#endif
314
d231f5cb
PU		 315#if defined(CONFIG_SND_OMAP_SOC_MCPDM) || \
316 defined(CONFIG_SND_OMAP_SOC_MCPDM_MODULE)
317
9cf793f9 318static void __init omap_init_mcpdm(void)
d231f5cb
PU		 319{
320 struct omap_hwmod *oh;
927dbbb2 321 struct platform_device *pdev;
d231f5cb
PU		 322
323 oh = omap_hwmod_lookup("mcpdm");
324 if (!oh) {
325 printk(KERN_ERR "Could not look up mcpdm hw_mod\n");
326 return;
327 }
328
927dbbb2
PU		 329 pdev = omap_device_build("omap-mcpdm", -1, oh, NULL, 0, NULL, 0, 0);
330 WARN(IS_ERR(pdev), "Can't build omap_device for omap-mcpdm.\n");
d231f5cb
PU		 331}
332#else
333static inline void omap_init_mcpdm(void) {}
334#endif
335
de9eb097
PU		 336#if defined(CONFIG_SND_OMAP_SOC_DMIC) || \
337 defined(CONFIG_SND_OMAP_SOC_DMIC_MODULE)
338
9cf793f9 339static void __init omap_init_dmic(void)
de9eb097
PU		 340{
341 struct omap_hwmod *oh;
342 struct platform_device *pdev;
343
344 oh = omap_hwmod_lookup("dmic");
345 if (!oh) {
346 printk(KERN_ERR "Could not look up mcpdm hw_mod\n");
347 return;
348 }
349
350 pdev = omap_device_build("omap-dmic", -1, oh, NULL, 0, NULL, 0, 0);
351 WARN(IS_ERR(pdev), "Can't build omap_device for omap-dmic.\n");
352}
353#else
354static inline void omap_init_dmic(void) {}
355#endif
356
5eeec215
RN		 357#if defined(CONFIG_SND_OMAP_SOC_OMAP_HDMI) || \
358 defined(CONFIG_SND_OMAP_SOC_OMAP_HDMI_MODULE)
359
360static struct platform_device omap_hdmi_audio = {
361 .name = "omap-hdmi-audio",
362 .id = -1,
363};
364
365static void __init omap_init_hdmi_audio(void)
366{
367 struct omap_hwmod *oh;
368 struct platform_device *pdev;
369
370 oh = omap_hwmod_lookup("dss_hdmi");
371 if (!oh) {
372 printk(KERN_ERR "Could not look up dss_hdmi hw_mod\n");
373 return;
374 }
375
376 pdev = omap_device_build("omap-hdmi-audio-dai",
377 -1, oh, NULL, 0, NULL, 0, 0);
378 WARN(IS_ERR(pdev),
379 "Can't build omap_device for omap-hdmi-audio-dai.\n");
380
381 platform_device_register(&omap_hdmi_audio);
382}
383#else
384static inline void omap_init_hdmi_audio(void) {}
385#endif
386
646e3ed1 387#if defined(CONFIG_SPI_OMAP24XX) || defined(CONFIG_SPI_OMAP24XX_MODULE)
ed7eb9d9 388
ce491cf8 389#include <plat/mcspi.h>
ed7eb9d9 390
9cf793f9 391static int __init omap_mcspi_init(struct omap_hwmod *oh, void *unused)
af41a12f 392{
3528c58e 393 struct platform_device *pdev;
1a5d8190
C		 394 char *name = "omap2_mcspi";
395 struct omap2_mcspi_platform_config *pdata;
396 static int spi_num;
397 struct omap2_mcspi_dev_attr *mcspi_attrib = oh->dev_attr;
398
399 pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
400 if (!pdata) {
401 pr_err("Memory allocation for McSPI device failed\n");
402 return -ENOMEM;
403 }
af41a12f 404
1a5d8190
C		 405 pdata->num_cs = mcspi_attrib->num_chipselect;
406 switch (oh->class->rev) {
407 case OMAP2_MCSPI_REV:
408 case OMAP3_MCSPI_REV:
409 pdata->regs_offset = 0;
410 break;
411 case OMAP4_MCSPI_REV:
412 pdata->regs_offset = OMAP4_MCSPI_REG_OFFSET;
413 break;
414 default:
415 pr_err("Invalid McSPI Revision value\n");
e0feca89 416 kfree(pdata);
1a5d8190
C		 417 return -EINVAL;
418 }
af41a12f 419
1a5d8190 420 spi_num++;
3528c58e 421 pdev = omap_device_build(name, spi_num, oh, pdata,
f718e2c0 422 sizeof(*pdata), NULL, 0, 0);
3528c58e 423 WARN(IS_ERR(pdev), "Can't build omap_device for %s:%s\n",
1a5d8190
C		 424 name, oh->name);
425 kfree(pdata);
426 return 0;
af41a12f 427}
af41a12f
TL		 428
429static void omap_init_mcspi(void)
430{
1a5d8190 431 omap_hwmod_for_each_by_class("mcspi", omap_mcspi_init, NULL);
ed7eb9d9
JY		 432}
433
434#else
435static inline void omap_init_mcspi(void) {}
436#endif
437
88341334
WD		 438static struct resource omap2_pmu_resource = {
439 .start = 3,
440 .end = 3,
441 .flags = IORESOURCE_IRQ,
442};
443
444static struct resource omap3_pmu_resource = {
445 .start = INT_34XX_BENCH_MPU_EMUL,
446 .end = INT_34XX_BENCH_MPU_EMUL,
447 .flags = IORESOURCE_IRQ,
448};
449
450static struct platform_device omap_pmu_device = {
451 .name = "arm-pmu",
452 .id = ARM_PMU_DEVICE_CPU,
453 .num_resources = 1,
454};
455
456static void omap_init_pmu(void)
457{
458 if (cpu_is_omap24xx())
459 omap_pmu_device.resource = &omap2_pmu_resource;
460 else if (cpu_is_omap34xx())
461 omap_pmu_device.resource = &omap3_pmu_resource;
462 else
463 return;
464
465 platform_device_register(&omap_pmu_device);
466}
467
468
ee5500c4
DK		 469#if defined(CONFIG_CRYPTO_DEV_OMAP_SHAM) || defined(CONFIG_CRYPTO_DEV_OMAP_SHAM_MODULE)
470
edc774ed 471#ifdef CONFIG_ARCH_OMAP2
ee5500c4 472static struct resource omap2_sham_resources[] = {
646e3ed1
TL		 473 {
474 .start = OMAP24XX_SEC_SHA1MD5_BASE,
475 .end = OMAP24XX_SEC_SHA1MD5_BASE + 0x64,
476 .flags = IORESOURCE_MEM,
477 },
478 {
479 .start = INT_24XX_SHA1MD5,
480 .flags = IORESOURCE_IRQ,
481 }
482};
ee5500c4
DK		 483static int omap2_sham_resources_sz = ARRAY_SIZE(omap2_sham_resources);
484#else
485#define omap2_sham_resources NULL
486#define omap2_sham_resources_sz 0
487#endif
646e3ed1 488
edc774ed 489#ifdef CONFIG_ARCH_OMAP3
ee5500c4
DK		 490static struct resource omap3_sham_resources[] = {
491 {
492 .start = OMAP34XX_SEC_SHA1MD5_BASE,
493 .end = OMAP34XX_SEC_SHA1MD5_BASE + 0x64,
494 .flags = IORESOURCE_MEM,
495 },
496 {
497 .start = INT_34XX_SHA1MD52_IRQ,
498 .flags = IORESOURCE_IRQ,
499 },
500 {
501 .start = OMAP34XX_DMA_SHA1MD5_RX,
502 .flags = IORESOURCE_DMA,
503 }
504};
505static int omap3_sham_resources_sz = ARRAY_SIZE(omap3_sham_resources);
506#else
507#define omap3_sham_resources NULL
508#define omap3_sham_resources_sz 0
509#endif
510
511static struct platform_device sham_device = {
512 .name = "omap-sham",
646e3ed1 513 .id = -1,
646e3ed1
TL		 514};
515
ee5500c4 516static void omap_init_sham(void)
646e3ed1 517{
ee5500c4
DK		 518 if (cpu_is_omap24xx()) {
519 sham_device.resource = omap2_sham_resources;
520 sham_device.num_resources = omap2_sham_resources_sz;
521 } else if (cpu_is_omap34xx()) {
522 sham_device.resource = omap3_sham_resources;
523 sham_device.num_resources = omap3_sham_resources_sz;
524 } else {
525 pr_err("%s: platform not supported\n", __func__);
526 return;
527 }
528 platform_device_register(&sham_device);
646e3ed1
TL		 529}
530#else
ee5500c4 531static inline void omap_init_sham(void) { }
646e3ed1
TL		 532#endif
533
b744c679
DK		 534#if defined(CONFIG_CRYPTO_DEV_OMAP_AES) || defined(CONFIG_CRYPTO_DEV_OMAP_AES_MODULE)
535
82a0c149 536#ifdef CONFIG_ARCH_OMAP2
b744c679
DK		 537static struct resource omap2_aes_resources[] = {
538 {
539 .start = OMAP24XX_SEC_AES_BASE,
540 .end = OMAP24XX_SEC_AES_BASE + 0x4C,
541 .flags = IORESOURCE_MEM,
542 },
543 {
544 .start = OMAP24XX_DMA_AES_TX,
545 .flags = IORESOURCE_DMA,
546 },
547 {
548 .start = OMAP24XX_DMA_AES_RX,
549 .flags = IORESOURCE_DMA,
550 }
551};
552static int omap2_aes_resources_sz = ARRAY_SIZE(omap2_aes_resources);
553#else
554#define omap2_aes_resources NULL
555#define omap2_aes_resources_sz 0
556#endif
557
82a0c149 558#ifdef CONFIG_ARCH_OMAP3
b744c679
DK		 559static struct resource omap3_aes_resources[] = {
560 {
561 .start = OMAP34XX_SEC_AES_BASE,
562 .end = OMAP34XX_SEC_AES_BASE + 0x4C,
563 .flags = IORESOURCE_MEM,
564 },
565 {
566 .start = OMAP34XX_DMA_AES2_TX,
567 .flags = IORESOURCE_DMA,
568 },
569 {
570 .start = OMAP34XX_DMA_AES2_RX,
571 .flags = IORESOURCE_DMA,
572 }
573};
574static int omap3_aes_resources_sz = ARRAY_SIZE(omap3_aes_resources);
575#else
576#define omap3_aes_resources NULL
577#define omap3_aes_resources_sz 0
578#endif
579
580static struct platform_device aes_device = {
581 .name = "omap-aes",
582 .id = -1,
583};
584
585static void omap_init_aes(void)
586{
587 if (cpu_is_omap24xx()) {
588 aes_device.resource = omap2_aes_resources;
589 aes_device.num_resources = omap2_aes_resources_sz;
590 } else if (cpu_is_omap34xx()) {
591 aes_device.resource = omap3_aes_resources;
592 aes_device.num_resources = omap3_aes_resources_sz;
593 } else {
594 pr_err("%s: platform not supported\n", __func__);
595 return;
596 }
597 platform_device_register(&aes_device);
598}
599
600#else
601static inline void omap_init_aes(void) { }
602#endif
603
d8874665
TL		 604/*-------------------------------------------------------------------------*/
605
e08016d0 606#if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE)
917fa280 607
e08016d0
AG		 608static inline void omap242x_mmc_mux(struct omap_mmc_platform_data
609 *mmc_controller)
d8874665 610{
ed8303fc 611 if ((mmc_controller->slots[0].switch_pin > 0) && \
612 (mmc_controller->slots[0].switch_pin < OMAP_MAX_GPIO_LINES))
613 omap_mux_init_gpio(mmc_controller->slots[0].switch_pin,
614 OMAP_PIN_INPUT_PULLUP);
615 if ((mmc_controller->slots[0].gpio_wp > 0) && \
616 (mmc_controller->slots[0].gpio_wp < OMAP_MAX_GPIO_LINES))
617 omap_mux_init_gpio(mmc_controller->slots[0].gpio_wp,
618 OMAP_PIN_INPUT_PULLUP);
619
e08016d0
AG		 620 omap_mux_init_signal("sdmmc_cmd", 0);
621 omap_mux_init_signal("sdmmc_clki", 0);
622 omap_mux_init_signal("sdmmc_clko", 0);
623 omap_mux_init_signal("sdmmc_dat0", 0);
624 omap_mux_init_signal("sdmmc_dat_dir0", 0);
625 omap_mux_init_signal("sdmmc_cmd_dir", 0);
626 if (mmc_controller->slots[0].caps & MMC_CAP_4_BIT_DATA) {
627 omap_mux_init_signal("sdmmc_dat1", 0);
628 omap_mux_init_signal("sdmmc_dat2", 0);
629 omap_mux_init_signal("sdmmc_dat3", 0);
630 omap_mux_init_signal("sdmmc_dat_dir1", 0);
631 omap_mux_init_signal("sdmmc_dat_dir2", 0);
632 omap_mux_init_signal("sdmmc_dat_dir3", 0);
d8874665 633 }
57b9daa0 634
e08016d0
AG		 635 /*
636 * Use internal loop-back in MMC/SDIO Module Input Clock
637 * selection
638 */
639 if (mmc_controller->slots[0].internal_clock) {
640 u32 v = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
641 v |= (1 << 24);
642 omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0);
57b9daa0 643 }
d8874665
TL		 644}
645
e08016d0 646void __init omap242x_init_mmc(struct omap_mmc_platform_data **mmc_data)
d8874665 647{
2fdad5c9
TL		 648 struct platform_device *pdev;
649 struct omap_hwmod *oh;
650 int id = 0;
651 char *oh_name = "msdi1";
652 char *dev_name = "mmci-omap";
d8874665 653
e08016d0
AG		 654 if (!mmc_data[0]) {
655 pr_err("%s fails: Incomplete platform data\n", __func__);
656 return;
657 }
d8874665 658
e08016d0 659 omap242x_mmc_mux(mmc_data[0]);
2fdad5c9
TL		 660
661 oh = omap_hwmod_lookup(oh_name);
662 if (!oh) {
663 pr_err("Could not look up %s\n", oh_name);
664 return;
665 }
666 pdev = omap_device_build(dev_name, id, oh, mmc_data[0],
667 sizeof(struct omap_mmc_platform_data), NULL, 0, 0);
668 if (IS_ERR(pdev))
669 WARN(1, "Can'd build omap_device for %s:%s.\n",
670 dev_name, oh->name);
d8874665
TL		 671}
672
673#endif
674
675/*-------------------------------------------------------------------------*/
676
646e3ed1 677#if defined(CONFIG_HDQ_MASTER_OMAP) || defined(CONFIG_HDQ_MASTER_OMAP_MODULE)
646e3ed1 678#define OMAP_HDQ_BASE 0x480B2000
646e3ed1
TL		 679static struct resource omap_hdq_resources[] = {
680 {
681 .start = OMAP_HDQ_BASE,
682 .end = OMAP_HDQ_BASE + 0x1C,
683 .flags = IORESOURCE_MEM,
684 },
685 {
686 .start = INT_24XX_HDQ_IRQ,
687 .flags = IORESOURCE_IRQ,
688 },
689};
690static struct platform_device omap_hdq_dev = {
691 .name = "omap_hdq",
692 .id = 0,
693 .dev = {
694 .platform_data = NULL,
695 },
696 .num_resources = ARRAY_SIZE(omap_hdq_resources),
697 .resource = omap_hdq_resources,
698};
699static inline void omap_hdq_init(void)
700{
e3a98fe1
TL		 701 if (cpu_is_omap2420())
702 return;
703
704 platform_device_register(&omap_hdq_dev);
646e3ed1
TL		 705}
706#else
707static inline void omap_hdq_init(void) {}
708#endif
709
b227358d
VH		 710/*---------------------------------------------------------------------------*/
711
712#if defined(CONFIG_VIDEO_OMAP2_VOUT) || \
713 defined(CONFIG_VIDEO_OMAP2_VOUT_MODULE)
714#if defined(CONFIG_FB_OMAP2) || defined(CONFIG_FB_OMAP2_MODULE)
715static struct resource omap_vout_resource[3 - CONFIG_FB_OMAP2_NUM_FBS] = {
716};
717#else
718static struct resource omap_vout_resource[2] = {
719};
720#endif
721
722static struct platform_device omap_vout_device = {
723 .name = "omap_vout",
724 .num_resources = ARRAY_SIZE(omap_vout_resource),
725 .resource = &omap_vout_resource[0],
726 .id = -1,
727};
728static void omap_init_vout(void)
729{
730 if (platform_device_register(&omap_vout_device) < 0)
731 printk(KERN_ERR "Unable to register OMAP-VOUT device\n");
732}
733#else
734static inline void omap_init_vout(void) {}
735#endif
736
1dbae815
TL		 737/*-------------------------------------------------------------------------*/
738
739static int __init omap2_init_devices(void)
740{
81fbc5ef
PW		 741 /*
742 * please keep these calls, and their implementations above,
1dbae815
TL		 743 * in alphabetical order so they're easier to sort through.
744 */
f0fba2ad 745 omap_init_audio();
828c707e 746 omap_init_camera();
5eeec215 747 omap_init_hdmi_audio();
c40fae95 748 omap_init_mbox();
efcf1e50 749 /* If dtb is there, the devices will be created dynamically */
259bd6ce
PU		 750 if (!of_have_populated_dt()) {
751 omap_init_dmic();
4b21ffcf 752 omap_init_mcpdm();
efcf1e50 753 omap_init_mcspi();
259bd6ce 754 }
88341334 755 omap_init_pmu();
646e3ed1 756 omap_hdq_init();
9b6553cd 757 omap_init_sti();
ee5500c4 758 omap_init_sham();
b744c679 759 omap_init_aes();
b227358d 760 omap_init_vout();
1dbae815
TL		 761
762 return 0;
763}
764arch_initcall(omap2_init_devices);
f2ce6231
VC		 765
766#if defined(CONFIG_OMAP_WATCHDOG) || defined(CONFIG_OMAP_WATCHDOG_MODULE)
f2ce6231
VC		 767static int __init omap_init_wdt(void)
768{
769 int id = -1;
3528c58e 770 struct platform_device *pdev;
f2ce6231
VC		 771 struct omap_hwmod *oh;
772 char *oh_name = "wd_timer2";
773 char *dev_name = "omap_wdt";
774
775 if (!cpu_class_is_omap2())
776 return 0;
777
778 oh = omap_hwmod_lookup(oh_name);
779 if (!oh) {
780 pr_err("Could not look up wd_timer%d hwmod\n", id);
781 return -EINVAL;
782 }
783
f718e2c0 784 pdev = omap_device_build(dev_name, id, oh, NULL, 0, NULL, 0, 0);
3528c58e 785 WARN(IS_ERR(pdev), "Can't build omap_device for %s:%s.\n",
f2ce6231
VC		 786 dev_name, oh->name);
787 return 0;
788}
789subsys_initcall(omap_init_wdt);
790#endif
Linux kernel - Deliverables
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