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78673bc8 EV |
1 | /* |
2 | * linux/arch/arm/mach-omap2/mcbsp.c | |
3 | * | |
4 | * Copyright (C) 2008 Instituto Nokia de Tecnologia | |
5 | * Contact: Eduardo Valentin <eduardo.valentin@indt.org.br> | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License version 2 as | |
9 | * published by the Free Software Foundation. | |
10 | * | |
11 | * Multichannel mode not supported. | |
12 | */ | |
13 | #include <linux/module.h> | |
14 | #include <linux/init.h> | |
15 | #include <linux/clk.h> | |
16 | #include <linux/err.h> | |
17 | #include <linux/io.h> | |
18 | #include <linux/platform_device.h> | |
5a0e3ad6 | 19 | #include <linux/slab.h> |
78673bc8 | 20 | |
dd7667aa | 21 | #include <mach/irqs.h> |
ce491cf8 | 22 | #include <plat/dma.h> |
ce491cf8 TL |
23 | #include <plat/cpu.h> |
24 | #include <plat/mcbsp.h> | |
64bcbd33 | 25 | #include <plat/omap_device.h> |
e95496d4 | 26 | #include <linux/pm_runtime.h> |
4814ced5 PW |
27 | |
28 | #include "control.h" | |
29 | ||
1743d14f JN |
30 | /* |
31 | * FIXME: Find a mechanism to enable/disable runtime the McBSP ICLK autoidle. | |
32 | * Sidetone needs non-gated ICLK and sidetone autoidle is broken. | |
33 | */ | |
34 | #include "cm2xxx_3xxx.h" | |
35 | #include "cm-regbits-34xx.h" | |
36 | ||
7bc0c4ba JN |
37 | /* McBSP internal signal muxing function */ |
38 | static int omap2_mcbsp1_mux_rx_clk(struct device *dev, const char *signal, | |
39 | const char *src) | |
cf4c87ab PW |
40 | { |
41 | u32 v; | |
42 | ||
43 | v = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0); | |
cf4c87ab | 44 | |
7bc0c4ba JN |
45 | if (!strcmp(signal, "clkr")) { |
46 | if (!strcmp(src, "clkr")) | |
47 | v &= ~OMAP2_MCBSP1_CLKR_MASK; | |
48 | else if (!strcmp(src, "clkx")) | |
49 | v |= OMAP2_MCBSP1_CLKR_MASK; | |
50 | else | |
51 | return -EINVAL; | |
52 | } else if (!strcmp(signal, "fsr")) { | |
53 | if (!strcmp(src, "fsr")) | |
54 | v &= ~OMAP2_MCBSP1_FSR_MASK; | |
55 | else if (!strcmp(src, "fsx")) | |
56 | v |= OMAP2_MCBSP1_FSR_MASK; | |
57 | else | |
58 | return -EINVAL; | |
59 | } else { | |
60 | return -EINVAL; | |
61 | } | |
cf4c87ab | 62 | |
cf4c87ab | 63 | omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0); |
7bc0c4ba JN |
64 | |
65 | return 0; | |
cf4c87ab | 66 | } |
cf4c87ab | 67 | |
d1358657 | 68 | /* McBSP CLKS source switching function */ |
09d28d2c JN |
69 | static int omap2_mcbsp_set_clk_src(struct device *dev, struct clk *clk, |
70 | const char *src) | |
d1358657 | 71 | { |
d1358657 PW |
72 | struct clk *fck_src; |
73 | char *fck_src_name; | |
74 | int r; | |
75 | ||
09d28d2c | 76 | if (!strcmp(src, "clks_ext")) |
d1358657 | 77 | fck_src_name = "pad_fck"; |
09d28d2c | 78 | else if (!strcmp(src, "clks_fclk")) |
d1358657 PW |
79 | fck_src_name = "prcm_fck"; |
80 | else | |
81 | return -EINVAL; | |
82 | ||
09d28d2c | 83 | fck_src = clk_get(dev, fck_src_name); |
d1358657 PW |
84 | if (IS_ERR_OR_NULL(fck_src)) { |
85 | pr_err("omap-mcbsp: %s: could not clk_get() %s\n", "clks", | |
86 | fck_src_name); | |
87 | return -EINVAL; | |
88 | } | |
89 | ||
09d28d2c | 90 | pm_runtime_put_sync(dev); |
d1358657 | 91 | |
09d28d2c | 92 | r = clk_set_parent(clk, fck_src); |
d1358657 PW |
93 | if (IS_ERR_VALUE(r)) { |
94 | pr_err("omap-mcbsp: %s: could not clk_set_parent() to %s\n", | |
95 | "clks", fck_src_name); | |
96 | clk_put(fck_src); | |
97 | return -EINVAL; | |
98 | } | |
99 | ||
09d28d2c | 100 | pm_runtime_get_sync(dev); |
d1358657 PW |
101 | |
102 | clk_put(fck_src); | |
103 | ||
104 | return 0; | |
105 | } | |
d1358657 | 106 | |
1743d14f JN |
107 | static int omap3_enable_st_clock(unsigned int id, bool enable) |
108 | { | |
109 | unsigned int w; | |
110 | ||
111 | /* | |
112 | * Sidetone uses McBSP ICLK - which must not idle when sidetones | |
113 | * are enabled or sidetones start sounding ugly. | |
114 | */ | |
115 | w = omap2_cm_read_mod_reg(OMAP3430_PER_MOD, CM_AUTOIDLE); | |
116 | if (enable) | |
117 | w &= ~(1 << (id - 2)); | |
118 | else | |
119 | w |= 1 << (id - 2); | |
120 | omap2_cm_write_mod_reg(w, OMAP3430_PER_MOD, CM_AUTOIDLE); | |
121 | ||
122 | return 0; | |
123 | } | |
124 | ||
64bcbd33 KVA |
125 | static int omap_init_mcbsp(struct omap_hwmod *oh, void *unused) |
126 | { | |
127 | int id, count = 1; | |
128 | char *name = "omap-mcbsp"; | |
129 | struct omap_hwmod *oh_device[2]; | |
130 | struct omap_mcbsp_platform_data *pdata = NULL; | |
3528c58e | 131 | struct platform_device *pdev; |
3cf32bba | 132 | |
64bcbd33 | 133 | sscanf(oh->name, "mcbsp%d", &id); |
78673bc8 | 134 | |
64bcbd33 KVA |
135 | pdata = kzalloc(sizeof(struct omap_mcbsp_platform_data), GFP_KERNEL); |
136 | if (!pdata) { | |
137 | pr_err("%s: No memory for mcbsp\n", __func__); | |
138 | return -ENOMEM; | |
139 | } | |
3cf32bba | 140 | |
cdc71514 | 141 | pdata->reg_step = 4; |
88408230 | 142 | if (oh->class->rev < MCBSP_CONFIG_TYPE2) { |
cdc71514 | 143 | pdata->reg_size = 2; |
88408230 | 144 | } else { |
cdc71514 | 145 | pdata->reg_size = 4; |
88408230 JN |
146 | pdata->has_ccr = true; |
147 | } | |
9504ba64 | 148 | |
64bcbd33 KVA |
149 | if (oh->class->rev == MCBSP_CONFIG_TYPE3) { |
150 | if (id == 2) | |
151 | /* The FIFO has 1024 + 256 locations */ | |
152 | pdata->buffer_size = 0x500; | |
153 | else | |
154 | /* The FIFO has 128 locations */ | |
155 | pdata->buffer_size = 0x80; | |
156 | } | |
3cf32bba | 157 | |
1a645884 JN |
158 | if (oh->class->rev >= MCBSP_CONFIG_TYPE3) |
159 | pdata->has_wakeup = true; | |
160 | ||
64bcbd33 | 161 | oh_device[0] = oh; |
78673bc8 | 162 | |
64bcbd33 KVA |
163 | if (oh->dev_attr) { |
164 | oh_device[1] = omap_hwmod_lookup(( | |
165 | (struct omap_mcbsp_dev_attr *)(oh->dev_attr))->sidetone); | |
1743d14f | 166 | pdata->enable_st_clock = omap3_enable_st_clock; |
64bcbd33 KVA |
167 | count++; |
168 | } | |
3528c58e | 169 | pdev = omap_device_build_ss(name, id, oh_device, count, pdata, |
f718e2c0 | 170 | sizeof(*pdata), NULL, 0, false); |
64bcbd33 | 171 | kfree(pdata); |
3528c58e | 172 | if (IS_ERR(pdev)) { |
25985edc | 173 | pr_err("%s: Can't build omap_device for %s:%s.\n", __func__, |
64bcbd33 | 174 | name, oh->name); |
3528c58e | 175 | return PTR_ERR(pdev); |
64bcbd33 | 176 | } |
09d28d2c | 177 | pdata->set_clk_src = omap2_mcbsp_set_clk_src; |
7bc0c4ba JN |
178 | if (id == 1) |
179 | pdata->mux_signal = omap2_mcbsp1_mux_rx_clk; | |
64bcbd33 KVA |
180 | omap_mcbsp_count++; |
181 | return 0; | |
182 | } | |
a5b92cc3 | 183 | |
b4b58f58 | 184 | static int __init omap2_mcbsp_init(void) |
78673bc8 | 185 | { |
64bcbd33 | 186 | omap_hwmod_for_each_by_class("mcbsp", omap_init_mcbsp, NULL); |
b4b58f58 CS |
187 | |
188 | mcbsp_ptr = kzalloc(omap_mcbsp_count * sizeof(struct omap_mcbsp *), | |
189 | GFP_KERNEL); | |
190 | if (!mcbsp_ptr) | |
191 | return -ENOMEM; | |
192 | ||
78673bc8 EV |
193 | return omap_mcbsp_init(); |
194 | } | |
195 | arch_initcall(omap2_mcbsp_init); |