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1dbae815 TL |
1 | /* |
2 | * linux/arch/arm/mach-omap2/mux.c | |
3 | * | |
112485e9 | 4 | * OMAP2, OMAP3 and OMAP4 pin multiplexing configurations |
1dbae815 | 5 | * |
112485e9 | 6 | * Copyright (C) 2004 - 2010 Texas Instruments Inc. |
9330899e | 7 | * Copyright (C) 2003 - 2008 Nokia Corporation |
1dbae815 | 8 | * |
9330899e | 9 | * Written by Tony Lindgren |
1dbae815 TL |
10 | * |
11 | * This program is free software; you can redistribute it and/or modify | |
12 | * it under the terms of the GNU General Public License as published by | |
13 | * the Free Software Foundation; either version 2 of the License, or | |
14 | * (at your option) any later version. | |
15 | * | |
16 | * This program is distributed in the hope that it will be useful, | |
17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
19 | * GNU General Public License for more details. | |
20 | * | |
21 | * You should have received a copy of the GNU General Public License | |
22 | * along with this program; if not, write to the Free Software | |
23 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
24 | * | |
25 | */ | |
4814ced5 | 26 | #include <linux/kernel.h> |
1dbae815 | 27 | #include <linux/init.h> |
fced80c7 | 28 | #include <linux/io.h> |
15ac7afe | 29 | #include <linux/list.h> |
4814ced5 | 30 | #include <linux/slab.h> |
4b715efc TL |
31 | #include <linux/ctype.h> |
32 | #include <linux/debugfs.h> | |
33 | #include <linux/seq_file.h> | |
34 | #include <linux/uaccess.h> | |
13a3fe52 TK |
35 | #include <linux/irq.h> |
36 | #include <linux/interrupt.h> | |
1dbae815 | 37 | |
fced80c7 | 38 | |
2a296c8f | 39 | #include "omap_hwmod.h" |
9796b323 | 40 | |
e4c060db | 41 | #include "soc.h" |
4814ced5 | 42 | #include "control.h" |
15ac7afe | 43 | #include "mux.h" |
13a3fe52 | 44 | #include "prm.h" |
65e25976 | 45 | #include "common.h" |
1dbae815 | 46 | |
92c9f501 MR |
47 | #define OMAP_MUX_BASE_OFFSET 0x30 /* Offset from CTRL_BASE */ |
48 | #define OMAP_MUX_BASE_SZ 0x5ca | |
49 | ||
15ac7afe TL |
50 | struct omap_mux_entry { |
51 | struct omap_mux mux; | |
52 | struct list_head node; | |
53 | }; | |
54 | ||
112485e9 BC |
55 | static LIST_HEAD(mux_partitions); |
56 | static DEFINE_MUTEX(muxmode_mutex); | |
57 | ||
58 | struct omap_mux_partition *omap_mux_get(const char *name) | |
59 | { | |
60 | struct omap_mux_partition *partition; | |
61 | ||
62 | list_for_each_entry(partition, &mux_partitions, node) { | |
63 | if (!strcmp(name, partition->name)) | |
64 | return partition; | |
65 | } | |
92c9f501 | 66 | |
112485e9 BC |
67 | return NULL; |
68 | } | |
69 | ||
70 | u16 omap_mux_read(struct omap_mux_partition *partition, u16 reg) | |
92c9f501 | 71 | { |
112485e9 BC |
72 | if (partition->flags & OMAP_MUX_REG_8BIT) |
73 | return __raw_readb(partition->base + reg); | |
92c9f501 | 74 | else |
112485e9 | 75 | return __raw_readw(partition->base + reg); |
92c9f501 MR |
76 | } |
77 | ||
112485e9 BC |
78 | void omap_mux_write(struct omap_mux_partition *partition, u16 val, |
79 | u16 reg) | |
92c9f501 | 80 | { |
112485e9 BC |
81 | if (partition->flags & OMAP_MUX_REG_8BIT) |
82 | __raw_writeb(val, partition->base + reg); | |
92c9f501 | 83 | else |
112485e9 | 84 | __raw_writew(val, partition->base + reg); |
92c9f501 | 85 | } |
7d7f665d | 86 | |
112485e9 BC |
87 | void omap_mux_write_array(struct omap_mux_partition *partition, |
88 | struct omap_board_mux *board_mux) | |
d4bb72e5 | 89 | { |
d4ff6121 CC |
90 | if (!board_mux) |
91 | return; | |
92 | ||
112485e9 BC |
93 | while (board_mux->reg_offset != OMAP_MUX_TERMINATOR) { |
94 | omap_mux_write(partition, board_mux->value, | |
95 | board_mux->reg_offset); | |
d4bb72e5 TL |
96 | board_mux++; |
97 | } | |
98 | } | |
99 | ||
15ac7afe TL |
100 | #ifdef CONFIG_OMAP_MUX |
101 | ||
102 | static char *omap_mux_options; | |
103 | ||
d1589f09 TL |
104 | static int __init _omap_mux_init_gpio(struct omap_mux_partition *partition, |
105 | int gpio, int val) | |
15ac7afe TL |
106 | { |
107 | struct omap_mux_entry *e; | |
ca828760 | 108 | struct omap_mux *gpio_mux = NULL; |
8a6f7e14 GI |
109 | u16 old_mode; |
110 | u16 mux_mode; | |
15ac7afe | 111 | int found = 0; |
112485e9 | 112 | struct list_head *muxmodes = &partition->muxmodes; |
15ac7afe TL |
113 | |
114 | if (!gpio) | |
115 | return -EINVAL; | |
116 | ||
112485e9 | 117 | list_for_each_entry(e, muxmodes, node) { |
15ac7afe TL |
118 | struct omap_mux *m = &e->mux; |
119 | if (gpio == m->gpio) { | |
8a6f7e14 | 120 | gpio_mux = m; |
15ac7afe TL |
121 | found++; |
122 | } | |
123 | } | |
124 | ||
8a6f7e14 | 125 | if (found == 0) { |
032a6424 | 126 | pr_err("%s: Could not set gpio%i\n", __func__, gpio); |
8a6f7e14 GI |
127 | return -ENODEV; |
128 | } | |
15ac7afe TL |
129 | |
130 | if (found > 1) { | |
032a6424 | 131 | pr_info("%s: Multiple gpio paths (%d) for gpio%i\n", __func__, |
1cbb3a9a | 132 | found, gpio); |
15ac7afe TL |
133 | return -EINVAL; |
134 | } | |
135 | ||
112485e9 | 136 | old_mode = omap_mux_read(partition, gpio_mux->reg_offset); |
8a6f7e14 | 137 | mux_mode = val & ~(OMAP_MUX_NR_MODES - 1); |
112485e9 | 138 | if (partition->flags & OMAP_MUX_GPIO_IN_MODE3) |
8a6f7e14 GI |
139 | mux_mode |= OMAP_MUX_MODE3; |
140 | else | |
141 | mux_mode |= OMAP_MUX_MODE4; | |
032a6424 | 142 | pr_debug("%s: Setting signal %s.gpio%i 0x%04x -> 0x%04x\n", __func__, |
1cbb3a9a | 143 | gpio_mux->muxnames[0], gpio, old_mode, mux_mode); |
112485e9 | 144 | omap_mux_write(partition, mux_mode, gpio_mux->reg_offset); |
15ac7afe | 145 | |
8a6f7e14 | 146 | return 0; |
15ac7afe TL |
147 | } |
148 | ||
d1589f09 | 149 | int __init omap_mux_init_gpio(int gpio, int val) |
112485e9 BC |
150 | { |
151 | struct omap_mux_partition *partition; | |
152 | int ret; | |
153 | ||
154 | list_for_each_entry(partition, &mux_partitions, node) { | |
155 | ret = _omap_mux_init_gpio(partition, gpio, val); | |
156 | if (!ret) | |
157 | return ret; | |
158 | } | |
159 | ||
160 | return -ENODEV; | |
161 | } | |
162 | ||
d1589f09 TL |
163 | static int __init _omap_mux_get_by_name(struct omap_mux_partition *partition, |
164 | const char *muxname, | |
165 | struct omap_mux **found_mux) | |
15ac7afe | 166 | { |
8419fdba | 167 | struct omap_mux *mux = NULL; |
15ac7afe | 168 | struct omap_mux_entry *e; |
5a3b2f7a | 169 | const char *mode_name; |
afb7d709 | 170 | int found = 0, found_mode = 0, mode0_len = 0; |
112485e9 | 171 | struct list_head *muxmodes = &partition->muxmodes; |
15ac7afe TL |
172 | |
173 | mode_name = strchr(muxname, '.'); | |
174 | if (mode_name) { | |
5a3b2f7a | 175 | mode0_len = strlen(muxname) - strlen(mode_name); |
15ac7afe | 176 | mode_name++; |
15ac7afe TL |
177 | } else { |
178 | mode_name = muxname; | |
179 | } | |
180 | ||
112485e9 | 181 | list_for_each_entry(e, muxmodes, node) { |
8419fdba | 182 | char *m0_entry; |
15ac7afe TL |
183 | int i; |
184 | ||
8419fdba TL |
185 | mux = &e->mux; |
186 | m0_entry = mux->muxnames[0]; | |
187 | ||
5a3b2f7a TL |
188 | /* First check for full name in mode0.muxmode format */ |
189 | if (mode0_len && strncmp(muxname, m0_entry, mode0_len)) | |
15ac7afe TL |
190 | continue; |
191 | ||
5a3b2f7a | 192 | /* Then check for muxmode only */ |
15ac7afe | 193 | for (i = 0; i < OMAP_MUX_NR_MODES; i++) { |
8419fdba | 194 | char *mode_cur = mux->muxnames[i]; |
15ac7afe TL |
195 | |
196 | if (!mode_cur) | |
197 | continue; | |
198 | ||
199 | if (!strcmp(mode_name, mode_cur)) { | |
8419fdba | 200 | *found_mux = mux; |
15ac7afe | 201 | found++; |
8419fdba | 202 | found_mode = i; |
15ac7afe TL |
203 | } |
204 | } | |
205 | } | |
206 | ||
8419fdba TL |
207 | if (found == 1) { |
208 | return found_mode; | |
209 | } | |
15ac7afe TL |
210 | |
211 | if (found > 1) { | |
032a6424 | 212 | pr_err("%s: Multiple signal paths (%i) for %s\n", __func__, |
1cbb3a9a | 213 | found, muxname); |
15ac7afe TL |
214 | return -EINVAL; |
215 | } | |
216 | ||
8419fdba | 217 | pr_err("%s: Could not find signal %s\n", __func__, muxname); |
15ac7afe TL |
218 | |
219 | return -ENODEV; | |
220 | } | |
221 | ||
91930652 | 222 | int __init omap_mux_get_by_name(const char *muxname, |
8419fdba TL |
223 | struct omap_mux_partition **found_partition, |
224 | struct omap_mux **found_mux) | |
112485e9 BC |
225 | { |
226 | struct omap_mux_partition *partition; | |
112485e9 BC |
227 | |
228 | list_for_each_entry(partition, &mux_partitions, node) { | |
8419fdba TL |
229 | struct omap_mux *mux = NULL; |
230 | int mux_mode = _omap_mux_get_by_name(partition, muxname, &mux); | |
231 | if (mux_mode < 0) | |
232 | continue; | |
233 | ||
234 | *found_partition = partition; | |
235 | *found_mux = mux; | |
236 | ||
237 | return mux_mode; | |
112485e9 BC |
238 | } |
239 | ||
240 | return -ENODEV; | |
8419fdba | 241 | } |
112485e9 | 242 | |
d1589f09 | 243 | int __init omap_mux_init_signal(const char *muxname, int val) |
8419fdba TL |
244 | { |
245 | struct omap_mux_partition *partition = NULL; | |
246 | struct omap_mux *mux = NULL; | |
247 | u16 old_mode; | |
248 | int mux_mode; | |
249 | ||
250 | mux_mode = omap_mux_get_by_name(muxname, &partition, &mux); | |
eeb3711b | 251 | if (mux_mode < 0 || !mux) |
8419fdba TL |
252 | return mux_mode; |
253 | ||
254 | old_mode = omap_mux_read(partition, mux->reg_offset); | |
255 | mux_mode |= val; | |
256 | pr_debug("%s: Setting signal %s 0x%04x -> 0x%04x\n", | |
257 | __func__, muxname, old_mode, mux_mode); | |
258 | omap_mux_write(partition, mux_mode, mux->reg_offset); | |
259 | ||
260 | return 0; | |
112485e9 BC |
261 | } |
262 | ||
9796b323 TL |
263 | struct omap_hwmod_mux_info * __init |
264 | omap_hwmod_mux_init(struct omap_device_pad *bpads, int nr_pads) | |
265 | { | |
266 | struct omap_hwmod_mux_info *hmux; | |
029268e4 | 267 | int i, nr_pads_dynamic = 0; |
9796b323 TL |
268 | |
269 | if (!bpads || nr_pads < 1) | |
270 | return NULL; | |
271 | ||
272 | hmux = kzalloc(sizeof(struct omap_hwmod_mux_info), GFP_KERNEL); | |
273 | if (!hmux) | |
274 | goto err1; | |
275 | ||
276 | hmux->nr_pads = nr_pads; | |
277 | ||
278 | hmux->pads = kzalloc(sizeof(struct omap_device_pad) * | |
279 | nr_pads, GFP_KERNEL); | |
280 | if (!hmux->pads) | |
281 | goto err2; | |
282 | ||
283 | for (i = 0; i < hmux->nr_pads; i++) { | |
284 | struct omap_mux_partition *partition; | |
285 | struct omap_device_pad *bpad = &bpads[i], *pad = &hmux->pads[i]; | |
286 | struct omap_mux *mux; | |
287 | int mux_mode; | |
288 | ||
289 | mux_mode = omap_mux_get_by_name(bpad->name, &partition, &mux); | |
290 | if (mux_mode < 0) | |
291 | goto err3; | |
292 | if (!pad->partition) | |
293 | pad->partition = partition; | |
294 | if (!pad->mux) | |
295 | pad->mux = mux; | |
296 | ||
297 | pad->name = kzalloc(strlen(bpad->name) + 1, GFP_KERNEL); | |
298 | if (!pad->name) { | |
299 | int j; | |
300 | ||
301 | for (j = i - 1; j >= 0; j--) | |
302 | kfree(hmux->pads[j].name); | |
303 | goto err3; | |
304 | } | |
305 | strcpy(pad->name, bpad->name); | |
306 | ||
307 | pad->flags = bpad->flags; | |
308 | pad->enable = bpad->enable; | |
309 | pad->idle = bpad->idle; | |
310 | pad->off = bpad->off; | |
029268e4 | 311 | |
96dc19fd PW |
312 | if (pad->flags & |
313 | (OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP)) | |
029268e4 TL |
314 | nr_pads_dynamic++; |
315 | ||
9796b323 TL |
316 | pr_debug("%s: Initialized %s\n", __func__, pad->name); |
317 | } | |
318 | ||
029268e4 TL |
319 | if (!nr_pads_dynamic) |
320 | return hmux; | |
321 | ||
322 | /* | |
323 | * Add pads that need dynamic muxing into a separate list | |
324 | */ | |
325 | ||
326 | hmux->nr_pads_dynamic = nr_pads_dynamic; | |
327 | hmux->pads_dynamic = kzalloc(sizeof(struct omap_device_pad *) * | |
328 | nr_pads_dynamic, GFP_KERNEL); | |
329 | if (!hmux->pads_dynamic) { | |
330 | pr_err("%s: Could not allocate dynamic pads\n", __func__); | |
331 | return hmux; | |
332 | } | |
333 | ||
334 | nr_pads_dynamic = 0; | |
335 | for (i = 0; i < hmux->nr_pads; i++) { | |
336 | struct omap_device_pad *pad = &hmux->pads[i]; | |
337 | ||
96dc19fd PW |
338 | if (pad->flags & |
339 | (OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP)) { | |
029268e4 TL |
340 | pr_debug("%s: pad %s tagged dynamic\n", |
341 | __func__, pad->name); | |
342 | hmux->pads_dynamic[nr_pads_dynamic] = pad; | |
343 | nr_pads_dynamic++; | |
344 | } | |
345 | } | |
346 | ||
9796b323 TL |
347 | return hmux; |
348 | ||
349 | err3: | |
350 | kfree(hmux->pads); | |
351 | err2: | |
352 | kfree(hmux); | |
353 | err1: | |
354 | pr_err("%s: Could not allocate device mux entry\n", __func__); | |
355 | ||
356 | return NULL; | |
357 | } | |
358 | ||
13a3fe52 TK |
359 | /** |
360 | * omap_hwmod_mux_scan_wakeups - omap hwmod scan wakeup pads | |
361 | * @hmux: Pads for a hwmod | |
362 | * @mpu_irqs: MPU irq array for a hwmod | |
363 | * | |
364 | * Scans the wakeup status of pads for a single hwmod. If an irq | |
365 | * array is defined for this mux, the parser will call the registered | |
366 | * ISRs for corresponding pads, otherwise the parser will stop at the | |
367 | * first wakeup active pad and return. Returns true if there is a | |
368 | * pending and non-served wakeup event for the mux, otherwise false. | |
369 | */ | |
370 | static bool omap_hwmod_mux_scan_wakeups(struct omap_hwmod_mux_info *hmux, | |
371 | struct omap_hwmod_irq_info *mpu_irqs) | |
372 | { | |
373 | int i, irq; | |
374 | unsigned int val; | |
375 | u32 handled_irqs = 0; | |
376 | ||
377 | for (i = 0; i < hmux->nr_pads_dynamic; i++) { | |
378 | struct omap_device_pad *pad = hmux->pads_dynamic[i]; | |
379 | ||
380 | if (!(pad->flags & OMAP_DEVICE_PAD_WAKEUP) || | |
381 | !(pad->idle & OMAP_WAKEUP_EN)) | |
382 | continue; | |
383 | ||
384 | val = omap_mux_read(pad->partition, pad->mux->reg_offset); | |
385 | if (!(val & OMAP_WAKEUP_EVENT)) | |
386 | continue; | |
387 | ||
388 | if (!hmux->irqs) | |
389 | return true; | |
390 | ||
391 | irq = hmux->irqs[i]; | |
392 | /* make sure we only handle each irq once */ | |
393 | if (handled_irqs & 1 << irq) | |
394 | continue; | |
395 | ||
396 | handled_irqs |= 1 << irq; | |
397 | ||
398 | generic_handle_irq(mpu_irqs[irq].irq); | |
399 | } | |
400 | ||
401 | return false; | |
402 | } | |
403 | ||
404 | /** | |
405 | * _omap_hwmod_mux_handle_irq - Process wakeup events for a single hwmod | |
406 | * | |
407 | * Checks a single hwmod for every wakeup capable pad to see if there is an | |
408 | * active wakeup event. If this is the case, call the corresponding ISR. | |
409 | */ | |
410 | static int _omap_hwmod_mux_handle_irq(struct omap_hwmod *oh, void *data) | |
411 | { | |
412 | if (!oh->mux || !oh->mux->enabled) | |
413 | return 0; | |
414 | if (omap_hwmod_mux_scan_wakeups(oh->mux, oh->mpu_irqs)) | |
415 | generic_handle_irq(oh->mpu_irqs[0].irq); | |
416 | return 0; | |
417 | } | |
418 | ||
419 | /** | |
420 | * omap_hwmod_mux_handle_irq - Process pad wakeup irqs. | |
421 | * | |
422 | * Calls a function for each registered omap_hwmod to check | |
423 | * pad wakeup statuses. | |
424 | */ | |
425 | static irqreturn_t omap_hwmod_mux_handle_irq(int irq, void *unused) | |
426 | { | |
427 | omap_hwmod_for_each(_omap_hwmod_mux_handle_irq, NULL); | |
428 | return IRQ_HANDLED; | |
429 | } | |
430 | ||
8d9af88f TL |
431 | /* Assumes the calling function takes care of locking */ |
432 | void omap_hwmod_mux(struct omap_hwmod_mux_info *hmux, u8 state) | |
433 | { | |
434 | int i; | |
435 | ||
029268e4 TL |
436 | /* Runtime idling of dynamic pads */ |
437 | if (state == _HWMOD_STATE_IDLE && hmux->enabled) { | |
438 | for (i = 0; i < hmux->nr_pads_dynamic; i++) { | |
439 | struct omap_device_pad *pad = hmux->pads_dynamic[i]; | |
440 | int val = -EINVAL; | |
441 | ||
029268e4 TL |
442 | val = pad->idle; |
443 | omap_mux_write(pad->partition, val, | |
444 | pad->mux->reg_offset); | |
445 | } | |
446 | ||
447 | return; | |
448 | } | |
449 | ||
450 | /* Runtime enabling of dynamic pads */ | |
86c79bf4 S |
451 | if ((state == _HWMOD_STATE_ENABLED) && hmux->pads_dynamic |
452 | && hmux->enabled) { | |
029268e4 TL |
453 | for (i = 0; i < hmux->nr_pads_dynamic; i++) { |
454 | struct omap_device_pad *pad = hmux->pads_dynamic[i]; | |
455 | int val = -EINVAL; | |
456 | ||
029268e4 TL |
457 | val = pad->enable; |
458 | omap_mux_write(pad->partition, val, | |
459 | pad->mux->reg_offset); | |
029268e4 TL |
460 | } |
461 | ||
86c79bf4 | 462 | return; |
029268e4 TL |
463 | } |
464 | ||
465 | /* Enabling or disabling of all pads */ | |
8d9af88f TL |
466 | for (i = 0; i < hmux->nr_pads; i++) { |
467 | struct omap_device_pad *pad = &hmux->pads[i]; | |
468 | int flags, val = -EINVAL; | |
469 | ||
470 | flags = pad->flags; | |
471 | ||
472 | switch (state) { | |
473 | case _HWMOD_STATE_ENABLED: | |
8d9af88f TL |
474 | val = pad->enable; |
475 | pr_debug("%s: Enabling %s %x\n", __func__, | |
476 | pad->name, val); | |
477 | break; | |
8d9af88f | 478 | case _HWMOD_STATE_DISABLED: |
8d9af88f TL |
479 | /* Use safe mode unless OMAP_DEVICE_PAD_REMUX */ |
480 | if (flags & OMAP_DEVICE_PAD_REMUX) | |
481 | val = pad->off; | |
482 | else | |
483 | val = OMAP_MUX_MODE7; | |
8d9af88f TL |
484 | pr_debug("%s: Disabling %s %x\n", __func__, |
485 | pad->name, val); | |
86c79bf4 S |
486 | break; |
487 | default: | |
488 | /* Nothing to be done */ | |
489 | break; | |
c09fcc43 | 490 | } |
8d9af88f TL |
491 | |
492 | if (val >= 0) { | |
493 | omap_mux_write(pad->partition, val, | |
494 | pad->mux->reg_offset); | |
495 | pad->flags = flags; | |
496 | } | |
497 | } | |
029268e4 TL |
498 | |
499 | if (state == _HWMOD_STATE_ENABLED) | |
500 | hmux->enabled = true; | |
501 | else | |
502 | hmux->enabled = false; | |
8d9af88f TL |
503 | } |
504 | ||
4b715efc TL |
505 | #ifdef CONFIG_DEBUG_FS |
506 | ||
507 | #define OMAP_MUX_MAX_NR_FLAGS 10 | |
508 | #define OMAP_MUX_TEST_FLAG(val, mask) \ | |
509 | if (((val) & (mask)) == (mask)) { \ | |
510 | i++; \ | |
511 | flags[i] = #mask; \ | |
512 | } | |
513 | ||
514 | /* REVISIT: Add checking for non-optimal mux settings */ | |
515 | static inline void omap_mux_decode(struct seq_file *s, u16 val) | |
516 | { | |
517 | char *flags[OMAP_MUX_MAX_NR_FLAGS]; | |
78737ae1 | 518 | char mode[sizeof("OMAP_MUX_MODE") + 1]; |
4b715efc TL |
519 | int i = -1; |
520 | ||
521 | sprintf(mode, "OMAP_MUX_MODE%d", val & 0x7); | |
522 | i++; | |
523 | flags[i] = mode; | |
524 | ||
525 | OMAP_MUX_TEST_FLAG(val, OMAP_PIN_OFF_WAKEUPENABLE); | |
526 | if (val & OMAP_OFF_EN) { | |
527 | if (!(val & OMAP_OFFOUT_EN)) { | |
528 | if (!(val & OMAP_OFF_PULL_UP)) { | |
529 | OMAP_MUX_TEST_FLAG(val, | |
530 | OMAP_PIN_OFF_INPUT_PULLDOWN); | |
531 | } else { | |
532 | OMAP_MUX_TEST_FLAG(val, | |
533 | OMAP_PIN_OFF_INPUT_PULLUP); | |
534 | } | |
535 | } else { | |
536 | if (!(val & OMAP_OFFOUT_VAL)) { | |
537 | OMAP_MUX_TEST_FLAG(val, | |
538 | OMAP_PIN_OFF_OUTPUT_LOW); | |
539 | } else { | |
540 | OMAP_MUX_TEST_FLAG(val, | |
541 | OMAP_PIN_OFF_OUTPUT_HIGH); | |
542 | } | |
543 | } | |
544 | } | |
545 | ||
546 | if (val & OMAP_INPUT_EN) { | |
547 | if (val & OMAP_PULL_ENA) { | |
548 | if (!(val & OMAP_PULL_UP)) { | |
549 | OMAP_MUX_TEST_FLAG(val, | |
550 | OMAP_PIN_INPUT_PULLDOWN); | |
551 | } else { | |
552 | OMAP_MUX_TEST_FLAG(val, OMAP_PIN_INPUT_PULLUP); | |
553 | } | |
554 | } else { | |
555 | OMAP_MUX_TEST_FLAG(val, OMAP_PIN_INPUT); | |
556 | } | |
557 | } else { | |
558 | i++; | |
559 | flags[i] = "OMAP_PIN_OUTPUT"; | |
560 | } | |
561 | ||
562 | do { | |
563 | seq_printf(s, "%s", flags[i]); | |
564 | if (i > 0) | |
565 | seq_printf(s, " | "); | |
566 | } while (i-- > 0); | |
567 | } | |
568 | ||
112485e9 | 569 | #define OMAP_MUX_DEFNAME_LEN 32 |
4b715efc TL |
570 | |
571 | static int omap_mux_dbg_board_show(struct seq_file *s, void *unused) | |
572 | { | |
112485e9 | 573 | struct omap_mux_partition *partition = s->private; |
4b715efc | 574 | struct omap_mux_entry *e; |
112485e9 | 575 | u8 omap_gen = omap_rev() >> 28; |
4b715efc | 576 | |
112485e9 | 577 | list_for_each_entry(e, &partition->muxmodes, node) { |
4b715efc TL |
578 | struct omap_mux *m = &e->mux; |
579 | char m0_def[OMAP_MUX_DEFNAME_LEN]; | |
580 | char *m0_name = m->muxnames[0]; | |
581 | u16 val; | |
582 | int i, mode; | |
583 | ||
584 | if (!m0_name) | |
585 | continue; | |
586 | ||
78737ae1 | 587 | /* REVISIT: Needs to be updated if mode0 names get longer */ |
4b715efc TL |
588 | for (i = 0; i < OMAP_MUX_DEFNAME_LEN; i++) { |
589 | if (m0_name[i] == '\0') { | |
590 | m0_def[i] = m0_name[i]; | |
591 | break; | |
592 | } | |
593 | m0_def[i] = toupper(m0_name[i]); | |
594 | } | |
112485e9 | 595 | val = omap_mux_read(partition, m->reg_offset); |
4b715efc | 596 | mode = val & OMAP_MUX_MODE7; |
112485e9 BC |
597 | if (mode != 0) |
598 | seq_printf(s, "/* %s */\n", m->muxnames[mode]); | |
599 | ||
600 | /* | |
25985edc | 601 | * XXX: Might be revisited to support differences across |
112485e9 BC |
602 | * same OMAP generation. |
603 | */ | |
604 | seq_printf(s, "OMAP%d_MUX(%s, ", omap_gen, m0_def); | |
4b715efc TL |
605 | omap_mux_decode(s, val); |
606 | seq_printf(s, "),\n"); | |
607 | } | |
608 | ||
609 | return 0; | |
610 | } | |
611 | ||
612 | static int omap_mux_dbg_board_open(struct inode *inode, struct file *file) | |
613 | { | |
112485e9 | 614 | return single_open(file, omap_mux_dbg_board_show, inode->i_private); |
4b715efc TL |
615 | } |
616 | ||
617 | static const struct file_operations omap_mux_dbg_board_fops = { | |
618 | .open = omap_mux_dbg_board_open, | |
619 | .read = seq_read, | |
620 | .llseek = seq_lseek, | |
621 | .release = single_release, | |
622 | }; | |
623 | ||
112485e9 BC |
624 | static struct omap_mux_partition *omap_mux_get_partition(struct omap_mux *mux) |
625 | { | |
626 | struct omap_mux_partition *partition; | |
627 | ||
628 | list_for_each_entry(partition, &mux_partitions, node) { | |
629 | struct list_head *muxmodes = &partition->muxmodes; | |
630 | struct omap_mux_entry *e; | |
631 | ||
632 | list_for_each_entry(e, muxmodes, node) { | |
633 | struct omap_mux *m = &e->mux; | |
634 | ||
635 | if (m == mux) | |
636 | return partition; | |
637 | } | |
638 | } | |
639 | ||
640 | return NULL; | |
641 | } | |
642 | ||
4b715efc TL |
643 | static int omap_mux_dbg_signal_show(struct seq_file *s, void *unused) |
644 | { | |
645 | struct omap_mux *m = s->private; | |
112485e9 | 646 | struct omap_mux_partition *partition; |
4b715efc TL |
647 | const char *none = "NA"; |
648 | u16 val; | |
649 | int mode; | |
650 | ||
112485e9 BC |
651 | partition = omap_mux_get_partition(m); |
652 | if (!partition) | |
653 | return 0; | |
654 | ||
655 | val = omap_mux_read(partition, m->reg_offset); | |
4b715efc TL |
656 | mode = val & OMAP_MUX_MODE7; |
657 | ||
112485e9 | 658 | seq_printf(s, "name: %s.%s (0x%08x/0x%03x = 0x%04x), b %s, t %s\n", |
4b715efc | 659 | m->muxnames[0], m->muxnames[mode], |
112485e9 | 660 | partition->phys + m->reg_offset, m->reg_offset, val, |
4b715efc TL |
661 | m->balls[0] ? m->balls[0] : none, |
662 | m->balls[1] ? m->balls[1] : none); | |
663 | seq_printf(s, "mode: "); | |
664 | omap_mux_decode(s, val); | |
665 | seq_printf(s, "\n"); | |
666 | seq_printf(s, "signals: %s | %s | %s | %s | %s | %s | %s | %s\n", | |
667 | m->muxnames[0] ? m->muxnames[0] : none, | |
668 | m->muxnames[1] ? m->muxnames[1] : none, | |
669 | m->muxnames[2] ? m->muxnames[2] : none, | |
670 | m->muxnames[3] ? m->muxnames[3] : none, | |
671 | m->muxnames[4] ? m->muxnames[4] : none, | |
672 | m->muxnames[5] ? m->muxnames[5] : none, | |
673 | m->muxnames[6] ? m->muxnames[6] : none, | |
674 | m->muxnames[7] ? m->muxnames[7] : none); | |
675 | ||
676 | return 0; | |
677 | } | |
678 | ||
679 | #define OMAP_MUX_MAX_ARG_CHAR 7 | |
680 | ||
681 | static ssize_t omap_mux_dbg_signal_write(struct file *file, | |
112485e9 BC |
682 | const char __user *user_buf, |
683 | size_t count, loff_t *ppos) | |
4b715efc TL |
684 | { |
685 | char buf[OMAP_MUX_MAX_ARG_CHAR]; | |
686 | struct seq_file *seqf; | |
687 | struct omap_mux *m; | |
688 | unsigned long val; | |
689 | int buf_size, ret; | |
112485e9 | 690 | struct omap_mux_partition *partition; |
4b715efc TL |
691 | |
692 | if (count > OMAP_MUX_MAX_ARG_CHAR) | |
693 | return -EINVAL; | |
694 | ||
695 | memset(buf, 0, sizeof(buf)); | |
696 | buf_size = min(count, sizeof(buf) - 1); | |
697 | ||
698 | if (copy_from_user(buf, user_buf, buf_size)) | |
699 | return -EFAULT; | |
700 | ||
701 | ret = strict_strtoul(buf, 0x10, &val); | |
702 | if (ret < 0) | |
703 | return ret; | |
704 | ||
705 | if (val > 0xffff) | |
706 | return -EINVAL; | |
707 | ||
708 | seqf = file->private_data; | |
709 | m = seqf->private; | |
710 | ||
112485e9 BC |
711 | partition = omap_mux_get_partition(m); |
712 | if (!partition) | |
713 | return -ENODEV; | |
714 | ||
715 | omap_mux_write(partition, (u16)val, m->reg_offset); | |
4b715efc TL |
716 | *ppos += count; |
717 | ||
718 | return count; | |
719 | } | |
720 | ||
721 | static int omap_mux_dbg_signal_open(struct inode *inode, struct file *file) | |
722 | { | |
723 | return single_open(file, omap_mux_dbg_signal_show, inode->i_private); | |
724 | } | |
725 | ||
726 | static const struct file_operations omap_mux_dbg_signal_fops = { | |
727 | .open = omap_mux_dbg_signal_open, | |
728 | .read = seq_read, | |
729 | .write = omap_mux_dbg_signal_write, | |
730 | .llseek = seq_lseek, | |
731 | .release = single_release, | |
732 | }; | |
733 | ||
734 | static struct dentry *mux_dbg_dir; | |
735 | ||
112485e9 BC |
736 | static void __init omap_mux_dbg_create_entry( |
737 | struct omap_mux_partition *partition, | |
738 | struct dentry *mux_dbg_dir) | |
4b715efc TL |
739 | { |
740 | struct omap_mux_entry *e; | |
741 | ||
112485e9 BC |
742 | list_for_each_entry(e, &partition->muxmodes, node) { |
743 | struct omap_mux *m = &e->mux; | |
744 | ||
9b12771a | 745 | (void)debugfs_create_file(m->muxnames[0], S_IWUSR, mux_dbg_dir, |
112485e9 BC |
746 | m, &omap_mux_dbg_signal_fops); |
747 | } | |
748 | } | |
749 | ||
750 | static void __init omap_mux_dbg_init(void) | |
751 | { | |
752 | struct omap_mux_partition *partition; | |
753 | static struct dentry *mux_dbg_board_dir; | |
754 | ||
4b715efc TL |
755 | mux_dbg_dir = debugfs_create_dir("omap_mux", NULL); |
756 | if (!mux_dbg_dir) | |
757 | return; | |
758 | ||
112485e9 BC |
759 | mux_dbg_board_dir = debugfs_create_dir("board", mux_dbg_dir); |
760 | if (!mux_dbg_board_dir) | |
761 | return; | |
4b715efc | 762 | |
112485e9 BC |
763 | list_for_each_entry(partition, &mux_partitions, node) { |
764 | omap_mux_dbg_create_entry(partition, mux_dbg_dir); | |
765 | (void)debugfs_create_file(partition->name, S_IRUGO, | |
766 | mux_dbg_board_dir, partition, | |
767 | &omap_mux_dbg_board_fops); | |
4b715efc TL |
768 | } |
769 | } | |
770 | ||
771 | #else | |
772 | static inline void omap_mux_dbg_init(void) | |
773 | { | |
774 | } | |
775 | #endif /* CONFIG_DEBUG_FS */ | |
776 | ||
15ac7afe TL |
777 | static void __init omap_mux_free_names(struct omap_mux *m) |
778 | { | |
779 | int i; | |
780 | ||
781 | for (i = 0; i < OMAP_MUX_NR_MODES; i++) | |
782 | kfree(m->muxnames[i]); | |
783 | ||
784 | #ifdef CONFIG_DEBUG_FS | |
785 | for (i = 0; i < OMAP_MUX_NR_SIDES; i++) | |
786 | kfree(m->balls[i]); | |
787 | #endif | |
788 | ||
789 | } | |
790 | ||
791 | /* Free all data except for GPIO pins unless CONFIG_DEBUG_FS is set */ | |
bbd707ac | 792 | int __init omap_mux_late_init(void) |
15ac7afe | 793 | { |
112485e9 | 794 | struct omap_mux_partition *partition; |
13a3fe52 | 795 | int ret; |
15ac7afe | 796 | |
112485e9 BC |
797 | list_for_each_entry(partition, &mux_partitions, node) { |
798 | struct omap_mux_entry *e, *tmp; | |
799 | list_for_each_entry_safe(e, tmp, &partition->muxmodes, node) { | |
800 | struct omap_mux *m = &e->mux; | |
801 | u16 mode = omap_mux_read(partition, m->reg_offset); | |
15ac7afe | 802 | |
112485e9 BC |
803 | if (OMAP_MODE_GPIO(mode)) |
804 | continue; | |
15ac7afe TL |
805 | |
806 | #ifndef CONFIG_DEBUG_FS | |
112485e9 BC |
807 | mutex_lock(&muxmode_mutex); |
808 | list_del(&e->node); | |
809 | mutex_unlock(&muxmode_mutex); | |
810 | omap_mux_free_names(m); | |
811 | kfree(m); | |
1dbae815 | 812 | #endif |
112485e9 | 813 | } |
15ac7afe TL |
814 | } |
815 | ||
13a3fe52 TK |
816 | ret = request_irq(omap_prcm_event_to_irq("io"), |
817 | omap_hwmod_mux_handle_irq, IRQF_SHARED | IRQF_NO_SUSPEND, | |
818 | "hwmod_io", omap_mux_late_init); | |
819 | ||
820 | if (ret) | |
821 | pr_warning("mux: Failed to setup hwmod io irq %d\n", ret); | |
822 | ||
4b715efc TL |
823 | omap_mux_dbg_init(); |
824 | ||
15ac7afe TL |
825 | return 0; |
826 | } | |
15ac7afe TL |
827 | |
828 | static void __init omap_mux_package_fixup(struct omap_mux *p, | |
829 | struct omap_mux *superset) | |
830 | { | |
831 | while (p->reg_offset != OMAP_MUX_TERMINATOR) { | |
832 | struct omap_mux *s = superset; | |
833 | int found = 0; | |
834 | ||
835 | while (s->reg_offset != OMAP_MUX_TERMINATOR) { | |
836 | if (s->reg_offset == p->reg_offset) { | |
837 | *s = *p; | |
838 | found++; | |
839 | break; | |
840 | } | |
841 | s++; | |
842 | } | |
843 | if (!found) | |
032a6424 | 844 | pr_err("%s: Unknown entry offset 0x%x\n", __func__, |
1cbb3a9a | 845 | p->reg_offset); |
15ac7afe TL |
846 | p++; |
847 | } | |
848 | } | |
849 | ||
850 | #ifdef CONFIG_DEBUG_FS | |
851 | ||
852 | static void __init omap_mux_package_init_balls(struct omap_ball *b, | |
853 | struct omap_mux *superset) | |
854 | { | |
855 | while (b->reg_offset != OMAP_MUX_TERMINATOR) { | |
856 | struct omap_mux *s = superset; | |
857 | int found = 0; | |
858 | ||
859 | while (s->reg_offset != OMAP_MUX_TERMINATOR) { | |
860 | if (s->reg_offset == b->reg_offset) { | |
861 | s->balls[0] = b->balls[0]; | |
862 | s->balls[1] = b->balls[1]; | |
863 | found++; | |
864 | break; | |
865 | } | |
866 | s++; | |
867 | } | |
868 | if (!found) | |
032a6424 | 869 | pr_err("%s: Unknown ball offset 0x%x\n", __func__, |
1cbb3a9a | 870 | b->reg_offset); |
15ac7afe TL |
871 | b++; |
872 | } | |
873 | } | |
874 | ||
875 | #else /* CONFIG_DEBUG_FS */ | |
876 | ||
877 | static inline void omap_mux_package_init_balls(struct omap_ball *b, | |
878 | struct omap_mux *superset) | |
879 | { | |
880 | } | |
881 | ||
882 | #endif /* CONFIG_DEBUG_FS */ | |
883 | ||
884 | static int __init omap_mux_setup(char *options) | |
885 | { | |
886 | if (!options) | |
887 | return 0; | |
888 | ||
889 | omap_mux_options = options; | |
890 | ||
891 | return 1; | |
892 | } | |
893 | __setup("omap_mux=", omap_mux_setup); | |
894 | ||
895 | /* | |
896 | * Note that the omap_mux=some.signal1=0x1234,some.signal2=0x1234 | |
897 | * cmdline options only override the bootloader values. | |
898 | * During development, please enable CONFIG_DEBUG_FS, and use the | |
899 | * signal specific entries under debugfs. | |
900 | */ | |
901 | static void __init omap_mux_set_cmdline_signals(void) | |
902 | { | |
903 | char *options, *next_opt, *token; | |
904 | ||
905 | if (!omap_mux_options) | |
906 | return; | |
907 | ||
dccb3b0e | 908 | options = kstrdup(omap_mux_options, GFP_KERNEL); |
15ac7afe TL |
909 | if (!options) |
910 | return; | |
911 | ||
15ac7afe TL |
912 | next_opt = options; |
913 | ||
914 | while ((token = strsep(&next_opt, ",")) != NULL) { | |
915 | char *keyval, *name; | |
916 | unsigned long val; | |
917 | ||
918 | keyval = token; | |
919 | name = strsep(&keyval, "="); | |
920 | if (name) { | |
921 | int res; | |
922 | ||
923 | res = strict_strtoul(keyval, 0x10, &val); | |
924 | if (res < 0) | |
925 | continue; | |
926 | ||
927 | omap_mux_init_signal(name, (u16)val); | |
928 | } | |
929 | } | |
930 | ||
931 | kfree(options); | |
932 | } | |
933 | ||
15ac7afe | 934 | static int __init omap_mux_copy_names(struct omap_mux *src, |
112485e9 | 935 | struct omap_mux *dst) |
15ac7afe TL |
936 | { |
937 | int i; | |
938 | ||
939 | for (i = 0; i < OMAP_MUX_NR_MODES; i++) { | |
940 | if (src->muxnames[i]) { | |
dccb3b0e TM |
941 | dst->muxnames[i] = kstrdup(src->muxnames[i], |
942 | GFP_KERNEL); | |
15ac7afe TL |
943 | if (!dst->muxnames[i]) |
944 | goto free; | |
15ac7afe TL |
945 | } |
946 | } | |
947 | ||
948 | #ifdef CONFIG_DEBUG_FS | |
949 | for (i = 0; i < OMAP_MUX_NR_SIDES; i++) { | |
950 | if (src->balls[i]) { | |
dccb3b0e | 951 | dst->balls[i] = kstrdup(src->balls[i], GFP_KERNEL); |
15ac7afe TL |
952 | if (!dst->balls[i]) |
953 | goto free; | |
15ac7afe TL |
954 | } |
955 | } | |
956 | #endif | |
957 | ||
958 | return 0; | |
959 | ||
960 | free: | |
961 | omap_mux_free_names(dst); | |
962 | return -ENOMEM; | |
963 | ||
964 | } | |
965 | ||
966 | #endif /* CONFIG_OMAP_MUX */ | |
967 | ||
112485e9 BC |
968 | static struct omap_mux *omap_mux_get_by_gpio( |
969 | struct omap_mux_partition *partition, | |
970 | int gpio) | |
15ac7afe TL |
971 | { |
972 | struct omap_mux_entry *e; | |
112485e9 | 973 | struct omap_mux *ret = NULL; |
15ac7afe | 974 | |
112485e9 | 975 | list_for_each_entry(e, &partition->muxmodes, node) { |
15ac7afe TL |
976 | struct omap_mux *m = &e->mux; |
977 | if (m->gpio == gpio) { | |
112485e9 | 978 | ret = m; |
15ac7afe TL |
979 | break; |
980 | } | |
981 | } | |
982 | ||
112485e9 | 983 | return ret; |
15ac7afe TL |
984 | } |
985 | ||
986 | /* Needed for dynamic muxing of GPIO pins for off-idle */ | |
987 | u16 omap_mux_get_gpio(int gpio) | |
988 | { | |
112485e9 | 989 | struct omap_mux_partition *partition; |
30ebad9d | 990 | struct omap_mux *m = NULL; |
15ac7afe | 991 | |
112485e9 BC |
992 | list_for_each_entry(partition, &mux_partitions, node) { |
993 | m = omap_mux_get_by_gpio(partition, gpio); | |
994 | if (m) | |
995 | return omap_mux_read(partition, m->reg_offset); | |
15ac7afe TL |
996 | } |
997 | ||
112485e9 | 998 | if (!m || m->reg_offset == OMAP_MUX_TERMINATOR) |
032a6424 | 999 | pr_err("%s: Could not get gpio%i\n", __func__, gpio); |
112485e9 BC |
1000 | |
1001 | return OMAP_MUX_TERMINATOR; | |
15ac7afe TL |
1002 | } |
1003 | ||
1004 | /* Needed for dynamic muxing of GPIO pins for off-idle */ | |
1005 | void omap_mux_set_gpio(u16 val, int gpio) | |
1006 | { | |
112485e9 BC |
1007 | struct omap_mux_partition *partition; |
1008 | struct omap_mux *m = NULL; | |
15ac7afe | 1009 | |
112485e9 BC |
1010 | list_for_each_entry(partition, &mux_partitions, node) { |
1011 | m = omap_mux_get_by_gpio(partition, gpio); | |
1012 | if (m) { | |
1013 | omap_mux_write(partition, val, m->reg_offset); | |
1014 | return; | |
1015 | } | |
15ac7afe TL |
1016 | } |
1017 | ||
112485e9 | 1018 | if (!m || m->reg_offset == OMAP_MUX_TERMINATOR) |
032a6424 | 1019 | pr_err("%s: Could not set gpio%i\n", __func__, gpio); |
15ac7afe TL |
1020 | } |
1021 | ||
112485e9 BC |
1022 | static struct omap_mux * __init omap_mux_list_add( |
1023 | struct omap_mux_partition *partition, | |
1024 | struct omap_mux *src) | |
15ac7afe TL |
1025 | { |
1026 | struct omap_mux_entry *entry; | |
1027 | struct omap_mux *m; | |
1028 | ||
1029 | entry = kzalloc(sizeof(struct omap_mux_entry), GFP_KERNEL); | |
1030 | if (!entry) | |
1031 | return NULL; | |
1032 | ||
1033 | m = &entry->mux; | |
30833142 | 1034 | entry->mux = *src; |
15ac7afe TL |
1035 | |
1036 | #ifdef CONFIG_OMAP_MUX | |
1037 | if (omap_mux_copy_names(src, m)) { | |
1038 | kfree(entry); | |
1039 | return NULL; | |
1040 | } | |
1041 | #endif | |
1042 | ||
1043 | mutex_lock(&muxmode_mutex); | |
112485e9 | 1044 | list_add_tail(&entry->node, &partition->muxmodes); |
15ac7afe TL |
1045 | mutex_unlock(&muxmode_mutex); |
1046 | ||
1047 | return m; | |
1048 | } | |
1049 | ||
1050 | /* | |
1051 | * Note if CONFIG_OMAP_MUX is not selected, we will only initialize | |
1052 | * the GPIO to mux offset mapping that is needed for dynamic muxing | |
1053 | * of GPIO pins for off-idle. | |
1054 | */ | |
112485e9 BC |
1055 | static void __init omap_mux_init_list(struct omap_mux_partition *partition, |
1056 | struct omap_mux *superset) | |
15ac7afe TL |
1057 | { |
1058 | while (superset->reg_offset != OMAP_MUX_TERMINATOR) { | |
1059 | struct omap_mux *entry; | |
1060 | ||
b72c7d54 RL |
1061 | #ifdef CONFIG_OMAP_MUX |
1062 | if (!superset->muxnames || !superset->muxnames[0]) { | |
15ac7afe TL |
1063 | superset++; |
1064 | continue; | |
1065 | } | |
b72c7d54 RL |
1066 | #else |
1067 | /* Skip pins that are not muxed as GPIO by bootloader */ | |
112485e9 BC |
1068 | if (!OMAP_MODE_GPIO(omap_mux_read(partition, |
1069 | superset->reg_offset))) { | |
9ecef433 TL |
1070 | superset++; |
1071 | continue; | |
1072 | } | |
1073 | #endif | |
1074 | ||
112485e9 | 1075 | entry = omap_mux_list_add(partition, superset); |
15ac7afe | 1076 | if (!entry) { |
032a6424 | 1077 | pr_err("%s: Could not add entry\n", __func__); |
15ac7afe TL |
1078 | return; |
1079 | } | |
1080 | superset++; | |
1081 | } | |
1082 | } | |
1083 | ||
321cfc85 TL |
1084 | #ifdef CONFIG_OMAP_MUX |
1085 | ||
1086 | static void omap_mux_init_package(struct omap_mux *superset, | |
1087 | struct omap_mux *package_subset, | |
1088 | struct omap_ball *package_balls) | |
1089 | { | |
1090 | if (package_subset) | |
1091 | omap_mux_package_fixup(package_subset, superset); | |
1092 | if (package_balls) | |
1093 | omap_mux_package_init_balls(package_balls, superset); | |
1094 | } | |
1095 | ||
27d8d3bf RK |
1096 | static void __init omap_mux_init_signals(struct omap_mux_partition *partition, |
1097 | struct omap_board_mux *board_mux) | |
321cfc85 TL |
1098 | { |
1099 | omap_mux_set_cmdline_signals(); | |
112485e9 | 1100 | omap_mux_write_array(partition, board_mux); |
321cfc85 TL |
1101 | } |
1102 | ||
1103 | #else | |
1104 | ||
1105 | static void omap_mux_init_package(struct omap_mux *superset, | |
1106 | struct omap_mux *package_subset, | |
1107 | struct omap_ball *package_balls) | |
1108 | { | |
1109 | } | |
1110 | ||
27d8d3bf RK |
1111 | static void __init omap_mux_init_signals(struct omap_mux_partition *partition, |
1112 | struct omap_board_mux *board_mux) | |
321cfc85 TL |
1113 | { |
1114 | } | |
1115 | ||
1116 | #endif | |
1117 | ||
112485e9 | 1118 | static u32 mux_partitions_cnt; |
15ac7afe | 1119 | |
112485e9 BC |
1120 | int __init omap_mux_init(const char *name, u32 flags, |
1121 | u32 mux_pbase, u32 mux_size, | |
1122 | struct omap_mux *superset, | |
1123 | struct omap_mux *package_subset, | |
1124 | struct omap_board_mux *board_mux, | |
1125 | struct omap_ball *package_balls) | |
1126 | { | |
1127 | struct omap_mux_partition *partition; | |
1128 | ||
1129 | partition = kzalloc(sizeof(struct omap_mux_partition), GFP_KERNEL); | |
1130 | if (!partition) | |
1131 | return -ENOMEM; | |
1132 | ||
1133 | partition->name = name; | |
1134 | partition->flags = flags; | |
1135 | partition->size = mux_size; | |
1136 | partition->phys = mux_pbase; | |
1137 | partition->base = ioremap(mux_pbase, mux_size); | |
1138 | if (!partition->base) { | |
032a6424 DM |
1139 | pr_err("%s: Could not ioremap mux partition at 0x%08x\n", |
1140 | __func__, partition->phys); | |
9d47e309 | 1141 | kfree(partition); |
15ac7afe TL |
1142 | return -ENODEV; |
1143 | } | |
1144 | ||
112485e9 BC |
1145 | INIT_LIST_HEAD(&partition->muxmodes); |
1146 | ||
1147 | list_add_tail(&partition->node, &mux_partitions); | |
1148 | mux_partitions_cnt++; | |
032a6424 | 1149 | pr_info("%s: Add partition: #%d: %s, flags: %x\n", __func__, |
112485e9 | 1150 | mux_partitions_cnt, partition->name, partition->flags); |
d5425be6 | 1151 | |
321cfc85 | 1152 | omap_mux_init_package(superset, package_subset, package_balls); |
112485e9 BC |
1153 | omap_mux_init_list(partition, superset); |
1154 | omap_mux_init_signals(partition, board_mux); | |
2cb0c54f | 1155 | |
15ac7afe TL |
1156 | return 0; |
1157 | } | |
1158 |