[deliverable/linux.git] / arch / arm / mach-omap2 / omap_l3_noc.c

/*
  * OMAP4XXX L3 Interconnect error handling driver
  *
  * Copyright (C) 2011 Texas Corporation
  *	Santosh Shilimkar <santosh.shilimkar@ti.com>
  *	Sricharan <r.sricharan@ti.com>
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
  * (at your option) any later version.
  *
  * This program is distributed in the hope that it will be useful,
  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  * GNU General Public License for more details.
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
  * USA
  */
#include <linux/init.h>
#include <linux/io.h>
#include <linux/platform_device.h>
#include <linux/interrupt.h>
#include <linux/kernel.h>
#include <linux/slab.h>

#include "omap_l3_noc.h"

/*
 * Interrupt Handler for L3 error detection.
 *	1) Identify the L3 clockdomain partition to which the error belongs to.
 *	2) Identify the slave where the error information is logged
 *	3) Print the logged information.
 *	4) Add dump stack to provide kernel trace.
 *
 * Two Types of errors :
 *	1) Custom errors in L3 :
 *		Target like DMM/FW/EMIF generates SRESP=ERR error
 *	2) Standard L3 error:
 *		- Unsupported CMD.
 *			L3 tries to access target while it is idle
 *		- OCP disconnect.
 *		- Address hole error:
 *			If DSS/ISS/FDIF/USBHOSTFS access a target where they
 *			do not have connectivity, the error is logged in
 *			their default target which is DMM2.
 *
 *	On High Secure devices, firewall errors are possible and those
 *	can be trapped as well. But the trapping is implemented as part
 *	secure software and hence need not be implemented here.
 */
static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
{

	struct omap4_l3		*l3 = _l3;
	int inttype, i;
	int err_src = 0;
	u32 std_err_main, err_reg, clear, base, l3_targ_base;
	char *source_name;

	/* Get the Type of interrupt */
	inttype = irq == l3->app_irq ? L3_APPLICATION_ERROR : L3_DEBUG_ERROR;

	for (i = 0; i < L3_MODULES; i++) {
		/*
		 * Read the regerr register of the clock domain
		 * to determine the source
		 */
		base = (u32)l3->l3_base[i];
		err_reg = readl(base + l3_flagmux[i] +
					+ L3_FLAGMUX_REGERR0 + (inttype << 3));

		/* Get the corresponding error and analyse */
		if (err_reg) {
			/* Identify the source from control status register */
			err_src = __ffs(err_reg);

			/* Read the stderrlog_main_source from clk domain */
			l3_targ_base = base + *(l3_targ[i] + err_src);
			std_err_main =  readl(l3_targ_base +
					L3_TARG_STDERRLOG_MAIN);

			switch (std_err_main & CUSTOM_ERROR) {
			case STANDARD_ERROR:
				source_name =
					l3_targ_inst_name[i][err_src];
				WARN(true, "L3 standard error: SOURCE:%s at address 0x%x\n",
					source_name,
					readl(l3_targ_base +
						L3_TARG_STDERRLOG_SLVOFSLSB));
				/* clear the std error log*/
				clear = std_err_main | CLEAR_STDERR_LOG;
				writel(clear, l3_targ_base +
					L3_TARG_STDERRLOG_MAIN);
				break;

			case CUSTOM_ERROR:
				source_name =
					l3_targ_inst_name[i][err_src];

				WARN(true, "L3 custom error: SOURCE:%s\n",
					source_name);
				/* clear the std error log*/
				clear = std_err_main | CLEAR_STDERR_LOG;
				writel(clear, l3_targ_base +
					L3_TARG_STDERRLOG_MAIN);
				break;

			default:
				/* Nothing to be handled here as of now */
				break;
			}
		/* Error found so break the for loop */
		break;
		}
	}
	return IRQ_HANDLED;
}

static int __init omap4_l3_probe(struct platform_device *pdev)
{
	static struct omap4_l3		*l3;
	struct resource	*res;
	int ret, irq;

	l3 = kzalloc(sizeof(*l3), GFP_KERNEL);
	if (!l3)
		return -ENOMEM;

	platform_set_drvdata(pdev, l3);
	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	if (!res) {
		dev_err(&pdev->dev, "couldn't find resource 0\n");
		ret = -ENODEV;
		goto err0;
	}

	l3->l3_base[0] = ioremap(res->start, resource_size(res));
	if (!l3->l3_base[0]) {
		dev_err(&pdev->dev, "ioremap failed\n");
		ret = -ENOMEM;
		goto err0;
	}

	res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
	if (!res) {
		dev_err(&pdev->dev, "couldn't find resource 1\n");
		ret = -ENODEV;
		goto err1;
	}

	l3->l3_base[1] = ioremap(res->start, resource_size(res));
	if (!l3->l3_base[1]) {
		dev_err(&pdev->dev, "ioremap failed\n");
		ret = -ENOMEM;
		goto err1;
	}

	res = platform_get_resource(pdev, IORESOURCE_MEM, 2);
	if (!res) {
		dev_err(&pdev->dev, "couldn't find resource 2\n");
		ret = -ENODEV;
		goto err2;
	}

	l3->l3_base[2] = ioremap(res->start, resource_size(res));
	if (!l3->l3_base[2]) {
		dev_err(&pdev->dev, "ioremap failed\n");
		ret = -ENOMEM;
		goto err2;
	}

	/*
	 * Setup interrupt Handlers
	 */
	irq = platform_get_irq(pdev, 0);
	ret = request_irq(irq,
			l3_interrupt_handler,
			IRQF_DISABLED, "l3-dbg-irq", l3);
	if (ret) {
		pr_crit("L3: request_irq failed to register for 0x%x\n",
					 OMAP44XX_IRQ_L3_DBG);
		goto err3;
	}
	l3->debug_irq = irq;

	irq = platform_get_irq(pdev, 1);
	ret = request_irq(irq,
			l3_interrupt_handler,
			IRQF_DISABLED, "l3-app-irq", l3);
	if (ret) {
		pr_crit("L3: request_irq failed to register for 0x%x\n",
					 OMAP44XX_IRQ_L3_APP);
		goto err4;
	}
	l3->app_irq = irq;

	return 0;

err4:
	free_irq(l3->debug_irq, l3);
err3:
	iounmap(l3->l3_base[2]);
err2:
	iounmap(l3->l3_base[1]);
err1:
	iounmap(l3->l3_base[0]);
err0:
	kfree(l3);
	return ret;
}

static int __exit omap4_l3_remove(struct platform_device *pdev)
{
	struct omap4_l3         *l3 = platform_get_drvdata(pdev);

	free_irq(l3->app_irq, l3);
	free_irq(l3->debug_irq, l3);
	iounmap(l3->l3_base[0]);
	iounmap(l3->l3_base[1]);
	iounmap(l3->l3_base[2]);
	kfree(l3);

	return 0;
}

static struct platform_driver omap4_l3_driver = {
	.remove		= __exit_p(omap4_l3_remove),
	.driver		= {
	.name		= "omap_l3_noc",
	},
};

static int __init omap4_l3_init(void)
{
	return platform_driver_probe(&omap4_l3_driver, omap4_l3_probe);
}
postcore_initcall_sync(omap4_l3_init);

static void __exit omap4_l3_exit(void)
{
	platform_driver_unregister(&omap4_l3_driver);
}
module_exit(omap4_l3_exit);
Commit	Line	Data
2722e56d SS	1	/*
	2	* OMAP4XXX L3 Interconnect error handling driver
	3	*
	4	* Copyright (C) 2011 Texas Corporation
	5	* Santosh Shilimkar <santosh.shilimkar@ti.com>
	6	* Sricharan <r.sricharan@ti.com>
	7	*
	8	* This program is free software; you can redistribute it and/or modify
	9	* it under the terms of the GNU General Public License as published by
	10	* the Free Software Foundation; either version 2 of the License, or
	11	* (at your option) any later version.
	12	*
	13	* This program is distributed in the hope that it will be useful,
	14	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	16	* GNU General Public License for more details.
	17	*
	18	* You should have received a copy of the GNU General Public License
	19	* along with this program; if not, write to the Free Software
	20	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
	21	* USA
	22	*/
	23	#include <linux/init.h>
	24	#include <linux/io.h>
	25	#include <linux/platform_device.h>
	26	#include <linux/interrupt.h>
	27	#include <linux/kernel.h>
	28	#include <linux/slab.h>
	29
	30	#include "omap_l3_noc.h"
	31
	32	/*
	33	* Interrupt Handler for L3 error detection.
	34	* 1) Identify the L3 clockdomain partition to which the error belongs to.
	35	* 2) Identify the slave where the error information is logged
	36	* 3) Print the logged information.
	37	* 4) Add dump stack to provide kernel trace.
	38	*
	39	* Two Types of errors :
	40	* 1) Custom errors in L3 :
	41	* Target like DMM/FW/EMIF generates SRESP=ERR error
	42	* 2) Standard L3 error:
	43	* - Unsupported CMD.
	44	* L3 tries to access target while it is idle
	45	* - OCP disconnect.
	46	* - Address hole error:
	47	* If DSS/ISS/FDIF/USBHOSTFS access a target where they
	48	* do not have connectivity, the error is logged in
	49	* their default target which is DMM2.
	50	*
	51	* On High Secure devices, firewall errors are possible and those
	52	* can be trapped as well. But the trapping is implemented as part
	53	* secure software and hence need not be implemented here.
	54	*/
	55	static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
	56	{
	57
	58	struct omap4_l3 *l3 = _l3;
342fd144	59	int inttype, i;
2722e56d	60	int err_src = 0;
342fd144	61	u32 std_err_main, err_reg, clear, base, l3_targ_base;
2722e56d SS	62	char *source_name;
	63
	64	/* Get the Type of interrupt */
35f7b961	65	inttype = irq == l3->app_irq ? L3_APPLICATION_ERROR : L3_DEBUG_ERROR;
2722e56d SS	66
	67	for (i = 0; i < L3_MODULES; i++) {
	68	/*
	69	* Read the regerr register of the clock domain
	70	* to determine the source
	71	*/
	72	base = (u32)l3->l3_base[i];
342fd144 TP	73	err_reg = readl(base + l3_flagmux[i] +
342fd144 TP	74	+ L3_FLAGMUX_REGERR0 + (inttype << 3));
2722e56d SS	75
	76	/* Get the corresponding error and analyse */
	77	if (err_reg) {
	78	/* Identify the source from control status register */
342fd144	79	err_src = __ffs(err_reg);
2722e56d	80
2722e56d	81	/* Read the stderrlog_main_source from clk domain */
342fd144 TP	82	l3_targ_base = base + *(l3_targ[i] + err_src);
	83	std_err_main = readl(l3_targ_base +
	84	L3_TARG_STDERRLOG_MAIN);
2722e56d	85
35f7b961	86	switch (std_err_main & CUSTOM_ERROR) {
2722e56d SS	87	case STANDARD_ERROR:
2722e56d SS	88	source_name =
342fd144	89	l3_targ_inst_name[i][err_src];
2722e56d	90	WARN(true, "L3 standard error: SOURCE:%s at address 0x%x\n",
342fd144 TP	91	source_name,
	92	readl(l3_targ_base +
	93	L3_TARG_STDERRLOG_SLVOFSLSB));
2722e56d SS	94	/* clear the std error log*/
2722e56d SS	95	clear = std_err_main \| CLEAR_STDERR_LOG;
342fd144 TP	96	writel(clear, l3_targ_base +
342fd144 TP	97	L3_TARG_STDERRLOG_MAIN);
2722e56d SS	98	break;
	99
	100	case CUSTOM_ERROR:
	101	source_name =
342fd144	102	l3_targ_inst_name[i][err_src];
2722e56d	103
342fd144 TP	104	WARN(true, "L3 custom error: SOURCE:%s\n",
342fd144 TP	105	source_name);
2722e56d SS	106	/* clear the std error log*/
2722e56d SS	107	clear = std_err_main \| CLEAR_STDERR_LOG;
342fd144 TP	108	writel(clear, l3_targ_base +
342fd144 TP	109	L3_TARG_STDERRLOG_MAIN);
2722e56d SS	110	break;
	111
	112	default:
	113	/* Nothing to be handled here as of now */
	114	break;
	115	}
	116	/* Error found so break the for loop */
	117	break;
	118	}
	119	}
	120	return IRQ_HANDLED;
	121	}
	122
	123	static int __init omap4_l3_probe(struct platform_device *pdev)
	124	{
	125	static struct omap4_l3 *l3;
342fd144 TP	126	struct resource *res;
342fd144 TP	127	int ret, irq;
2722e56d SS	128
	129	l3 = kzalloc(sizeof(*l3), GFP_KERNEL);
	130	if (!l3)
7529b703	131	return -ENOMEM;
2722e56d SS	132
	133	platform_set_drvdata(pdev, l3);
	134	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	135	if (!res) {
	136	dev_err(&pdev->dev, "couldn't find resource 0\n");
	137	ret = -ENODEV;
7529b703	138	goto err0;
2722e56d SS	139	}
	140
	141	l3->l3_base[0] = ioremap(res->start, resource_size(res));
35f7b961	142	if (!l3->l3_base[0]) {
2722e56d SS	143	dev_err(&pdev->dev, "ioremap failed\n");
2722e56d SS	144	ret = -ENOMEM;
7529b703	145	goto err0;
2722e56d SS	146	}
	147
	148	res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
	149	if (!res) {
	150	dev_err(&pdev->dev, "couldn't find resource 1\n");
	151	ret = -ENODEV;
7529b703	152	goto err1;
2722e56d SS	153	}
	154
	155	l3->l3_base[1] = ioremap(res->start, resource_size(res));
35f7b961	156	if (!l3->l3_base[1]) {
2722e56d SS	157	dev_err(&pdev->dev, "ioremap failed\n");
2722e56d SS	158	ret = -ENOMEM;
7529b703	159	goto err1;
2722e56d SS	160	}
	161
	162	res = platform_get_resource(pdev, IORESOURCE_MEM, 2);
	163	if (!res) {
	164	dev_err(&pdev->dev, "couldn't find resource 2\n");
	165	ret = -ENODEV;
7529b703	166	goto err2;
2722e56d SS	167	}
	168
	169	l3->l3_base[2] = ioremap(res->start, resource_size(res));
35f7b961	170	if (!l3->l3_base[2]) {
2722e56d SS	171	dev_err(&pdev->dev, "ioremap failed\n");
2722e56d SS	172	ret = -ENOMEM;
7529b703	173	goto err2;
2722e56d SS	174	}
	175
	176	/*
	177	* Setup interrupt Handlers
	178	*/
	179	irq = platform_get_irq(pdev, 0);
	180	ret = request_irq(irq,
	181	l3_interrupt_handler,
	182	IRQF_DISABLED, "l3-dbg-irq", l3);
	183	if (ret) {
	184	pr_crit("L3: request_irq failed to register for 0x%x\n",
	185	OMAP44XX_IRQ_L3_DBG);
7529b703	186	goto err3;
2722e56d SS	187	}
	188	l3->debug_irq = irq;
	189
	190	irq = platform_get_irq(pdev, 1);
	191	ret = request_irq(irq,
	192	l3_interrupt_handler,
	193	IRQF_DISABLED, "l3-app-irq", l3);
	194	if (ret) {
	195	pr_crit("L3: request_irq failed to register for 0x%x\n",
	196	OMAP44XX_IRQ_L3_APP);
7529b703	197	goto err4;
2722e56d SS	198	}
	199	l3->app_irq = irq;
	200
7529b703	201	return 0;
7529b703	202
2722e56d	203	err4:
7529b703	204	free_irq(l3->debug_irq, l3);
2722e56d	205	err3:
7529b703	206	iounmap(l3->l3_base[2]);
2722e56d	207	err2:
7529b703	208	iounmap(l3->l3_base[1]);
2722e56d	209	err1:
7529b703	210	iounmap(l3->l3_base[0]);
2722e56d	211	err0:
7529b703	212	kfree(l3);
2722e56d SS	213	return ret;
	214	}
	215
	216	static int __exit omap4_l3_remove(struct platform_device *pdev)
	217	{
	218	struct omap4_l3 *l3 = platform_get_drvdata(pdev);
	219
	220	free_irq(l3->app_irq, l3);
	221	free_irq(l3->debug_irq, l3);
	222	iounmap(l3->l3_base[0]);
	223	iounmap(l3->l3_base[1]);
	224	iounmap(l3->l3_base[2]);
	225	kfree(l3);
	226
	227	return 0;
	228	}
	229
	230	static struct platform_driver omap4_l3_driver = {
	231	.remove = __exit_p(omap4_l3_remove),
	232	.driver = {
	233	.name = "omap_l3_noc",
	234	},
	235	};
	236
	237	static int __init omap4_l3_init(void)
	238	{
	239	return platform_driver_probe(&omap4_l3_driver, omap4_l3_probe);
	240	}
	241	postcore_initcall_sync(omap4_l3_init);
	242
	243	static void __exit omap4_l3_exit(void)
	244	{
	245	platform_driver_unregister(&omap4_l3_driver);
	246	}
	247	module_exit(omap4_l3_exit);