OMAP: Fix sparse warnings in l3 error handler.
[deliverable/linux.git] / arch / arm / mach-omap2 / omap_l3_noc.c
CommitLineData
2722e56d 1/*
ed0e3520 2 * OMAP4XXX L3 Interconnect error handling driver
3 *
4 * Copyright (C) 2011 Texas Corporation
5 * Santosh Shilimkar <santosh.shilimkar@ti.com>
6 * Sricharan <r.sricharan@ti.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
21 * USA
22 */
2722e56d
SS
23#include <linux/init.h>
24#include <linux/io.h>
25#include <linux/platform_device.h>
26#include <linux/interrupt.h>
27#include <linux/kernel.h>
28#include <linux/slab.h>
29
30#include "omap_l3_noc.h"
31
32/*
33 * Interrupt Handler for L3 error detection.
34 * 1) Identify the L3 clockdomain partition to which the error belongs to.
35 * 2) Identify the slave where the error information is logged
36 * 3) Print the logged information.
37 * 4) Add dump stack to provide kernel trace.
38 *
39 * Two Types of errors :
40 * 1) Custom errors in L3 :
41 * Target like DMM/FW/EMIF generates SRESP=ERR error
42 * 2) Standard L3 error:
43 * - Unsupported CMD.
44 * L3 tries to access target while it is idle
45 * - OCP disconnect.
46 * - Address hole error:
47 * If DSS/ISS/FDIF/USBHOSTFS access a target where they
48 * do not have connectivity, the error is logged in
49 * their default target which is DMM2.
50 *
51 * On High Secure devices, firewall errors are possible and those
52 * can be trapped as well. But the trapping is implemented as part
53 * secure software and hence need not be implemented here.
54 */
55static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
56{
57
ed0e3520 58 struct omap4_l3 *l3 = _l3;
342fd144 59 int inttype, i;
2722e56d 60 int err_src = 0;
6616aac6 61 u32 std_err_main, err_reg, clear;
62 void __iomem *base, *l3_targ_base;
2722e56d
SS
63 char *source_name;
64
65 /* Get the Type of interrupt */
35f7b961 66 inttype = irq == l3->app_irq ? L3_APPLICATION_ERROR : L3_DEBUG_ERROR;
2722e56d
SS
67
68 for (i = 0; i < L3_MODULES; i++) {
69 /*
70 * Read the regerr register of the clock domain
71 * to determine the source
72 */
6616aac6 73 base = l3->l3_base[i];
74 err_reg = __raw_readl(base + l3_flagmux[i] +
342fd144 75 + L3_FLAGMUX_REGERR0 + (inttype << 3));
2722e56d
SS
76
77 /* Get the corresponding error and analyse */
78 if (err_reg) {
79 /* Identify the source from control status register */
342fd144 80 err_src = __ffs(err_reg);
2722e56d 81
2722e56d 82 /* Read the stderrlog_main_source from clk domain */
342fd144 83 l3_targ_base = base + *(l3_targ[i] + err_src);
6616aac6 84 std_err_main = __raw_readl(l3_targ_base +
342fd144 85 L3_TARG_STDERRLOG_MAIN);
2722e56d 86
35f7b961 87 switch (std_err_main & CUSTOM_ERROR) {
2722e56d
SS
88 case STANDARD_ERROR:
89 source_name =
342fd144 90 l3_targ_inst_name[i][err_src];
2722e56d 91 WARN(true, "L3 standard error: SOURCE:%s at address 0x%x\n",
342fd144 92 source_name,
6616aac6 93 __raw_readl(l3_targ_base +
342fd144 94 L3_TARG_STDERRLOG_SLVOFSLSB));
2722e56d
SS
95 /* clear the std error log*/
96 clear = std_err_main | CLEAR_STDERR_LOG;
342fd144
TP
97 writel(clear, l3_targ_base +
98 L3_TARG_STDERRLOG_MAIN);
2722e56d
SS
99 break;
100
101 case CUSTOM_ERROR:
102 source_name =
342fd144 103 l3_targ_inst_name[i][err_src];
2722e56d 104
342fd144
TP
105 WARN(true, "L3 custom error: SOURCE:%s\n",
106 source_name);
2722e56d
SS
107 /* clear the std error log*/
108 clear = std_err_main | CLEAR_STDERR_LOG;
342fd144
TP
109 writel(clear, l3_targ_base +
110 L3_TARG_STDERRLOG_MAIN);
2722e56d
SS
111 break;
112
113 default:
114 /* Nothing to be handled here as of now */
115 break;
116 }
117 /* Error found so break the for loop */
118 break;
119 }
120 }
121 return IRQ_HANDLED;
122}
123
124static int __init omap4_l3_probe(struct platform_device *pdev)
125{
ed0e3520 126 static struct omap4_l3 *l3;
342fd144 127 struct resource *res;
c1df2dcc 128 int ret;
2722e56d
SS
129
130 l3 = kzalloc(sizeof(*l3), GFP_KERNEL);
131 if (!l3)
7529b703 132 return -ENOMEM;
2722e56d
SS
133
134 platform_set_drvdata(pdev, l3);
135 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
136 if (!res) {
137 dev_err(&pdev->dev, "couldn't find resource 0\n");
138 ret = -ENODEV;
7529b703 139 goto err0;
2722e56d
SS
140 }
141
142 l3->l3_base[0] = ioremap(res->start, resource_size(res));
35f7b961 143 if (!l3->l3_base[0]) {
2722e56d
SS
144 dev_err(&pdev->dev, "ioremap failed\n");
145 ret = -ENOMEM;
7529b703 146 goto err0;
2722e56d
SS
147 }
148
149 res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
150 if (!res) {
151 dev_err(&pdev->dev, "couldn't find resource 1\n");
152 ret = -ENODEV;
7529b703 153 goto err1;
2722e56d
SS
154 }
155
156 l3->l3_base[1] = ioremap(res->start, resource_size(res));
35f7b961 157 if (!l3->l3_base[1]) {
2722e56d
SS
158 dev_err(&pdev->dev, "ioremap failed\n");
159 ret = -ENOMEM;
7529b703 160 goto err1;
2722e56d
SS
161 }
162
163 res = platform_get_resource(pdev, IORESOURCE_MEM, 2);
164 if (!res) {
165 dev_err(&pdev->dev, "couldn't find resource 2\n");
166 ret = -ENODEV;
7529b703 167 goto err2;
2722e56d
SS
168 }
169
170 l3->l3_base[2] = ioremap(res->start, resource_size(res));
35f7b961 171 if (!l3->l3_base[2]) {
2722e56d
SS
172 dev_err(&pdev->dev, "ioremap failed\n");
173 ret = -ENOMEM;
7529b703 174 goto err2;
2722e56d
SS
175 }
176
177 /*
178 * Setup interrupt Handlers
179 */
c1df2dcc
TP
180 l3->debug_irq = platform_get_irq(pdev, 0);
181 ret = request_irq(l3->debug_irq,
2722e56d
SS
182 l3_interrupt_handler,
183 IRQF_DISABLED, "l3-dbg-irq", l3);
184 if (ret) {
185 pr_crit("L3: request_irq failed to register for 0x%x\n",
ed0e3520 186 OMAP44XX_IRQ_L3_DBG);
7529b703 187 goto err3;
2722e56d 188 }
2722e56d 189
c1df2dcc
TP
190 l3->app_irq = platform_get_irq(pdev, 1);
191 ret = request_irq(l3->app_irq,
2722e56d
SS
192 l3_interrupt_handler,
193 IRQF_DISABLED, "l3-app-irq", l3);
194 if (ret) {
195 pr_crit("L3: request_irq failed to register for 0x%x\n",
ed0e3520 196 OMAP44XX_IRQ_L3_APP);
7529b703 197 goto err4;
2722e56d 198 }
2722e56d 199
7529b703 200 return 0;
201
2722e56d 202err4:
7529b703 203 free_irq(l3->debug_irq, l3);
2722e56d 204err3:
7529b703 205 iounmap(l3->l3_base[2]);
2722e56d 206err2:
7529b703 207 iounmap(l3->l3_base[1]);
2722e56d 208err1:
7529b703 209 iounmap(l3->l3_base[0]);
2722e56d 210err0:
7529b703 211 kfree(l3);
2722e56d
SS
212 return ret;
213}
214
215static int __exit omap4_l3_remove(struct platform_device *pdev)
216{
ed0e3520 217 struct omap4_l3 *l3 = platform_get_drvdata(pdev);
2722e56d
SS
218
219 free_irq(l3->app_irq, l3);
220 free_irq(l3->debug_irq, l3);
221 iounmap(l3->l3_base[0]);
222 iounmap(l3->l3_base[1]);
223 iounmap(l3->l3_base[2]);
224 kfree(l3);
225
226 return 0;
227}
228
229static struct platform_driver omap4_l3_driver = {
ed0e3520 230 .remove = __exit_p(omap4_l3_remove),
231 .driver = {
232 .name = "omap_l3_noc",
2722e56d
SS
233 },
234};
235
236static int __init omap4_l3_init(void)
237{
238 return platform_driver_probe(&omap4_l3_driver, omap4_l3_probe);
239}
240postcore_initcall_sync(omap4_l3_init);
241
242static void __exit omap4_l3_exit(void)
243{
244 platform_driver_unregister(&omap4_l3_driver);
245}
246module_exit(omap4_l3_exit);
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