[deliverable/linux.git] / arch / arm / mach-omap2 / pm44xx.c

/*
 * OMAP4 Power Management Routines
 *
 * Copyright (C) 2010 Texas Instruments, Inc.
 * Rajendra Nayak <rnayak@ti.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#include <linux/pm.h>
#include <linux/suspend.h>
#include <linux/module.h>
#include <linux/list.h>
#include <linux/err.h>
#include <linux/slab.h>

#include "common.h"
#include "clockdomain.h"
#include "powerdomain.h"

struct power_state {
	struct powerdomain *pwrdm;
	u32 next_state;
#ifdef CONFIG_SUSPEND
	u32 saved_state;
#endif
	struct list_head node;
};

static LIST_HEAD(pwrst_list);

#ifdef CONFIG_SUSPEND
static int omap4_pm_suspend(void)
{
	do_wfi();
	return 0;
}

static int omap4_pm_enter(suspend_state_t suspend_state)
{
	int ret = 0;

	switch (suspend_state) {
	case PM_SUSPEND_STANDBY:
	case PM_SUSPEND_MEM:
		ret = omap4_pm_suspend();
		break;
	default:
		ret = -EINVAL;
	}

	return ret;
}

static int omap4_pm_begin(suspend_state_t state)
{
	disable_hlt();
	return 0;
}

static void omap4_pm_end(void)
{
	enable_hlt();
	return;
}

static const struct platform_suspend_ops omap_pm_ops = {
	.begin		= omap4_pm_begin,
	.end		= omap4_pm_end,
	.enter		= omap4_pm_enter,
	.valid		= suspend_valid_only_mem,
};
#endif /* CONFIG_SUSPEND */

/*
 * Enable hardware supervised mode for all clockdomains if it's
 * supported. Initiate sleep transition for other clockdomains, if
 * they are not used
 */
static int __init clkdms_setup(struct clockdomain *clkdm, void *unused)
{
	if (clkdm->flags & CLKDM_CAN_ENABLE_AUTO)
		clkdm_allow_idle(clkdm);
	else if (clkdm->flags & CLKDM_CAN_FORCE_SLEEP &&
			atomic_read(&clkdm->usecount) == 0)
		clkdm_sleep(clkdm);
	return 0;
}


static int __init pwrdms_setup(struct powerdomain *pwrdm, void *unused)
{
	struct power_state *pwrst;

	if (!pwrdm->pwrsts)
		return 0;

	pwrst = kmalloc(sizeof(struct power_state), GFP_ATOMIC);
	if (!pwrst)
		return -ENOMEM;
	pwrst->pwrdm = pwrdm;
	pwrst->next_state = PWRDM_POWER_ON;
	list_add(&pwrst->node, &pwrst_list);

	return pwrdm_set_next_pwrst(pwrst->pwrdm, pwrst->next_state);
}

/**
 * omap_default_idle - OMAP4 default ilde routine.'
 *
 * Implements OMAP4 memory, IO ordering requirements which can't be addressed
 * with default arch_idle() hook. Used by all CPUs with !CONFIG_CPUIDLE and
 * by secondary CPU with CONFIG_CPUIDLE.
 */
static void omap_default_idle(void)
{
	local_irq_disable();
	local_fiq_disable();

	omap_do_wfi();

	local_fiq_enable();
	local_irq_enable();
}

/**
 * omap4_pm_init - Init routine for OMAP4 PM
 *
 * Initializes all powerdomain and clockdomain target states
 * and all PRCM settings.
 */
static int __init omap4_pm_init(void)
{
	int ret;
	struct clockdomain *emif_clkdm, *mpuss_clkdm, *l3_1_clkdm;
	struct clockdomain *ducati_clkdm, *l3_2_clkdm, *l4_per_clkdm;

	if (!cpu_is_omap44xx())
		return -ENODEV;

	if (omap_rev() == OMAP4430_REV_ES1_0) {
		WARN(1, "Power Management not supported on OMAP4430 ES1.0\n");
		return -ENODEV;
	}

	pr_err("Power Management for TI OMAP4.\n");

	ret = pwrdm_for_each(pwrdms_setup, NULL);
	if (ret) {
		pr_err("Failed to setup powerdomains\n");
		goto err2;
	}

	/*
	 * The dynamic dependency between MPUSS -> MEMIF and
	 * MPUSS -> L4_PER/L3_* and DUCATI -> L3_* doesn't work as
	 * expected. The hardware recommendation is to enable static
	 * dependencies for these to avoid system lock ups or random crashes.
	 */
	mpuss_clkdm = clkdm_lookup("mpuss_clkdm");
	emif_clkdm = clkdm_lookup("l3_emif_clkdm");
	l3_1_clkdm = clkdm_lookup("l3_1_clkdm");
	l3_2_clkdm = clkdm_lookup("l3_2_clkdm");
	l4_per_clkdm = clkdm_lookup("l4_per_clkdm");
	ducati_clkdm = clkdm_lookup("ducati_clkdm");
	if ((!mpuss_clkdm) || (!emif_clkdm) || (!l3_1_clkdm) ||
		(!l3_2_clkdm) || (!ducati_clkdm) || (!l4_per_clkdm))
		goto err2;

	ret = clkdm_add_wkdep(mpuss_clkdm, emif_clkdm);
	ret |= clkdm_add_wkdep(mpuss_clkdm, l3_1_clkdm);
	ret |= clkdm_add_wkdep(mpuss_clkdm, l3_2_clkdm);
	ret |= clkdm_add_wkdep(mpuss_clkdm, l4_per_clkdm);
	ret |= clkdm_add_wkdep(ducati_clkdm, l3_1_clkdm);
	ret |= clkdm_add_wkdep(ducati_clkdm, l3_2_clkdm);
	if (ret) {
		pr_err("Failed to add MPUSS -> L3/EMIF/L4PER, DUCATI -> L3 "
				"wakeup dependency\n");
		goto err2;
	}

	ret = omap4_mpuss_init();
	if (ret) {
		pr_err("Failed to initialise OMAP4 MPUSS\n");
		goto err2;
	}

	(void) clkdm_for_each(clkdms_setup, NULL);

#ifdef CONFIG_SUSPEND
	suspend_set_ops(&omap_pm_ops);
#endif /* CONFIG_SUSPEND */

	/* Overwrite the default arch_idle() */
	pm_idle = omap_default_idle;

err2:
	return ret;
}
late_initcall(omap4_pm_init);
Commit	Line	Data
5643aebb RN	1	/*
	2	* OMAP4 Power Management Routines
	3	*
	4	* Copyright (C) 2010 Texas Instruments, Inc.
	5	* Rajendra Nayak <rnayak@ti.com>
	6	*
	7	* This program is free software; you can redistribute it and/or modify
	8	* it under the terms of the GNU General Public License version 2 as
	9	* published by the Free Software Foundation.
	10	*/
	11
	12	#include <linux/pm.h>
	13	#include <linux/suspend.h>
	14	#include <linux/module.h>
	15	#include <linux/list.h>
	16	#include <linux/err.h>
	17	#include <linux/slab.h>
	18
4e65331c	19	#include "common.h"
3c50729b	20	#include "clockdomain.h"
72e06d08	21	#include "powerdomain.h"
5643aebb RN	22
	23	struct power_state {
	24	struct powerdomain *pwrdm;
	25	u32 next_state;
	26	#ifdef CONFIG_SUSPEND
	27	u32 saved_state;
	28	#endif
	29	struct list_head node;
	30	};
	31
	32	static LIST_HEAD(pwrst_list);
	33
	34	#ifdef CONFIG_SUSPEND
5643aebb RN	35	static int omap4_pm_suspend(void)
	36	{
	37	do_wfi();
	38	return 0;
	39	}
	40
	41	static int omap4_pm_enter(suspend_state_t suspend_state)
	42	{
	43	int ret = 0;
	44
	45	switch (suspend_state) {
	46	case PM_SUSPEND_STANDBY:
	47	case PM_SUSPEND_MEM:
	48	ret = omap4_pm_suspend();
	49	break;
	50	default:
	51	ret = -EINVAL;
	52	}
	53
	54	return ret;
	55	}
	56
5643aebb RN	57	static int omap4_pm_begin(suspend_state_t state)
5643aebb RN	58	{
c166381d	59	disable_hlt();
5643aebb RN	60	return 0;
	61	}
	62
	63	static void omap4_pm_end(void)
	64	{
c166381d	65	enable_hlt();
5643aebb RN	66	return;
	67	}
	68
2f55ac07	69	static const struct platform_suspend_ops omap_pm_ops = {
5643aebb RN	70	.begin = omap4_pm_begin,
5643aebb RN	71	.end = omap4_pm_end,
5643aebb	72	.enter = omap4_pm_enter,
5643aebb RN	73	.valid = suspend_valid_only_mem,
	74	};
	75	#endif /* CONFIG_SUSPEND */
	76
3c50729b SS	77	/*
	78	* Enable hardware supervised mode for all clockdomains if it's
	79	* supported. Initiate sleep transition for other clockdomains, if
	80	* they are not used
	81	*/
	82	static int __init clkdms_setup(struct clockdomain clkdm, void unused)
	83	{
	84	if (clkdm->flags & CLKDM_CAN_ENABLE_AUTO)
	85	clkdm_allow_idle(clkdm);
	86	else if (clkdm->flags & CLKDM_CAN_FORCE_SLEEP &&
	87	atomic_read(&clkdm->usecount) == 0)
	88	clkdm_sleep(clkdm);
	89	return 0;
	90	}
	91
	92
5643aebb RN	93	static int __init pwrdms_setup(struct powerdomain pwrdm, void unused)
	94	{
	95	struct power_state *pwrst;
	96
	97	if (!pwrdm->pwrsts)
	98	return 0;
	99
	100	pwrst = kmalloc(sizeof(struct power_state), GFP_ATOMIC);
	101	if (!pwrst)
	102	return -ENOMEM;
	103	pwrst->pwrdm = pwrdm;
	104	pwrst->next_state = PWRDM_POWER_ON;
	105	list_add(&pwrst->node, &pwrst_list);
	106
	107	return pwrdm_set_next_pwrst(pwrst->pwrdm, pwrst->next_state);
	108	}
	109
72826b9f SS	110	/**
	111	* omap_default_idle - OMAP4 default ilde routine.'
	112	*
	113	* Implements OMAP4 memory, IO ordering requirements which can't be addressed
	114	* with default arch_idle() hook. Used by all CPUs with !CONFIG_CPUIDLE and
	115	* by secondary CPU with CONFIG_CPUIDLE.
	116	*/
	117	static void omap_default_idle(void)
	118	{
	119	local_irq_disable();
	120	local_fiq_disable();
	121
	122	omap_do_wfi();
	123
	124	local_fiq_enable();
	125	local_irq_enable();
	126	}
	127
5643aebb RN	128	/**
	129	* omap4_pm_init - Init routine for OMAP4 PM
	130	*
	131	* Initializes all powerdomain and clockdomain target states
	132	* and all PRCM settings.
	133	*/
	134	static int __init omap4_pm_init(void)
	135	{
	136	int ret;
12f27826 SS	137	struct clockdomain emif_clkdm, mpuss_clkdm, *l3_1_clkdm;
12f27826 SS	138	struct clockdomain ducati_clkdm, l3_2_clkdm, *l4_per_clkdm;
5643aebb RN	139
	140	if (!cpu_is_omap44xx())
	141	return -ENODEV;
	142
361b02f3 SS	143	if (omap_rev() == OMAP4430_REV_ES1_0) {
	144	WARN(1, "Power Management not supported on OMAP4430 ES1.0\n");
	145	return -ENODEV;
	146	}
	147
5643aebb RN	148	pr_err("Power Management for TI OMAP4.\n");
5643aebb RN	149
5643aebb RN	150	ret = pwrdm_for_each(pwrdms_setup, NULL);
	151	if (ret) {
	152	pr_err("Failed to setup powerdomains\n");
	153	goto err2;
	154	}
5643aebb	155
12f27826 SS	156	/*
	157	* The dynamic dependency between MPUSS -> MEMIF and
	158	* MPUSS -> L4_PER/L3_* and DUCATI -> L3_* doesn't work as
	159	* expected. The hardware recommendation is to enable static
	160	* dependencies for these to avoid system lock ups or random crashes.
	161	*/
	162	mpuss_clkdm = clkdm_lookup("mpuss_clkdm");
	163	emif_clkdm = clkdm_lookup("l3_emif_clkdm");
	164	l3_1_clkdm = clkdm_lookup("l3_1_clkdm");
	165	l3_2_clkdm = clkdm_lookup("l3_2_clkdm");
	166	l4_per_clkdm = clkdm_lookup("l4_per_clkdm");
	167	ducati_clkdm = clkdm_lookup("ducati_clkdm");
	168	if ((!mpuss_clkdm) \|\| (!emif_clkdm) \|\| (!l3_1_clkdm) \|\|
	169	(!l3_2_clkdm) \|\| (!ducati_clkdm) \|\| (!l4_per_clkdm))
	170	goto err2;
	171
	172	ret = clkdm_add_wkdep(mpuss_clkdm, emif_clkdm);
	173	ret \|= clkdm_add_wkdep(mpuss_clkdm, l3_1_clkdm);
	174	ret \|= clkdm_add_wkdep(mpuss_clkdm, l3_2_clkdm);
	175	ret \|= clkdm_add_wkdep(mpuss_clkdm, l4_per_clkdm);
	176	ret \|= clkdm_add_wkdep(ducati_clkdm, l3_1_clkdm);
	177	ret \|= clkdm_add_wkdep(ducati_clkdm, l3_2_clkdm);
	178	if (ret) {
	179	pr_err("Failed to add MPUSS -> L3/EMIF/L4PER, DUCATI -> L3 "
	180	"wakeup dependency\n");
	181	goto err2;
	182	}
	183
b2b9762f SS	184	ret = omap4_mpuss_init();
	185	if (ret) {
	186	pr_err("Failed to initialise OMAP4 MPUSS\n");
	187	goto err2;
	188	}
	189
3c50729b SS	190	(void) clkdm_for_each(clkdms_setup, NULL);
3c50729b SS	191
5643aebb RN	192	#ifdef CONFIG_SUSPEND
	193	suspend_set_ops(&omap_pm_ops);
	194	#endif /* CONFIG_SUSPEND */
	195
72826b9f SS	196	/* Overwrite the default arch_idle() */
	197	pm_idle = omap_default_idle;
	198
5643aebb RN	199	err2:
	200	return ret;
	201	}
	202	late_initcall(omap4_pm_init);