[deliverable/linux.git] / arch / arm / mach-omap2 / serial.c

/*
 * arch/arm/mach-omap2/serial.c
 *
 * OMAP2 serial support.
 *
 * Copyright (C) 2005 Nokia Corporation
 * Author: Paul Mundt <paul.mundt@nokia.com>
 *
 * Based off of arch/arm/mach-omap/omap1/serial.c
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License. See the file "COPYING" in the main directory of this archive
 * for more details.
 */
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/serial_8250.h>
#include <linux/serial_reg.h>
#include <linux/clk.h>
#include <linux/io.h>

#include <mach/common.h>
#include <mach/board.h>

static struct clk * uart1_ick = NULL;
static struct clk * uart1_fck = NULL;
static struct clk * uart2_ick = NULL;
static struct clk * uart2_fck = NULL;
static struct clk * uart3_ick = NULL;
static struct clk * uart3_fck = NULL;

static struct plat_serial8250_port serial_platform_data[] = {
	{
		.membase	= (char *)IO_ADDRESS(OMAP_UART1_BASE),
		.mapbase	= (unsigned long)OMAP_UART1_BASE,
		.irq		= 72,
		.flags		= UPF_BOOT_AUTOCONF,
		.iotype		= UPIO_MEM,
		.regshift	= 2,
		.uartclk	= OMAP16XX_BASE_BAUD * 16,
	}, {
		.membase	= (char *)IO_ADDRESS(OMAP_UART2_BASE),
		.mapbase	= (unsigned long)OMAP_UART2_BASE,
		.irq		= 73,
		.flags		= UPF_BOOT_AUTOCONF,
		.iotype		= UPIO_MEM,
		.regshift	= 2,
		.uartclk	= OMAP16XX_BASE_BAUD * 16,
	}, {
		.membase	= (char *)IO_ADDRESS(OMAP_UART3_BASE),
		.mapbase	= (unsigned long)OMAP_UART3_BASE,
		.irq		= 74,
		.flags		= UPF_BOOT_AUTOCONF,
		.iotype		= UPIO_MEM,
		.regshift	= 2,
		.uartclk	= OMAP16XX_BASE_BAUD * 16,
	}, {
		.flags		= 0
	}
};

static inline unsigned int serial_read_reg(struct plat_serial8250_port *up,
					   int offset)
{
	offset <<= up->regshift;
	return (unsigned int)__raw_readb(up->membase + offset);
}

static inline void serial_write_reg(struct plat_serial8250_port *p, int offset,
				    int value)
{
	offset <<= p->regshift;
	__raw_writeb(value, (unsigned long)(p->membase + offset));
}

/*
 * Internal UARTs need to be initialized for the 8250 autoconfig to work
 * properly. Note that the TX watermark initialization may not be needed
 * once the 8250.c watermark handling code is merged.
 */
static inline void __init omap_serial_reset(struct plat_serial8250_port *p)
{
	serial_write_reg(p, UART_OMAP_MDR1, 0x07);
	serial_write_reg(p, UART_OMAP_SCR, 0x08);
	serial_write_reg(p, UART_OMAP_MDR1, 0x00);
	serial_write_reg(p, UART_OMAP_SYSC, (0x02 << 3) | (1 << 2) | (1 << 0));
}

void __init omap_serial_init()
{
	int i;
	const struct omap_uart_config *info;

	/*
	 * Make sure the serial ports are muxed on at this point.
	 * You have to mux them off in device drivers later on
	 * if not needed.
	 */

	info = omap_get_config(OMAP_TAG_UART,
			       struct omap_uart_config);

	if (info == NULL)
		return;

	for (i = 0; i < OMAP_MAX_NR_PORTS; i++) {
		struct plat_serial8250_port *p = serial_platform_data + i;

		if (!(info->enabled_uarts & (1 << i))) {
			p->membase = 0;
			p->mapbase = 0;
			continue;
		}

		switch (i) {
		case 0:
			uart1_ick = clk_get(NULL, "uart1_ick");
			if (IS_ERR(uart1_ick))
				printk("Could not get uart1_ick\n");
			else {
				clk_enable(uart1_ick);
			}

			uart1_fck = clk_get(NULL, "uart1_fck");
			if (IS_ERR(uart1_fck))
				printk("Could not get uart1_fck\n");
			else {
				clk_enable(uart1_fck);
			}
			break;
		case 1:
			uart2_ick = clk_get(NULL, "uart2_ick");
			if (IS_ERR(uart2_ick))
				printk("Could not get uart2_ick\n");
			else {
				clk_enable(uart2_ick);
			}

			uart2_fck = clk_get(NULL, "uart2_fck");
			if (IS_ERR(uart2_fck))
				printk("Could not get uart2_fck\n");
			else {
				clk_enable(uart2_fck);
			}
			break;
		case 2:
			uart3_ick = clk_get(NULL, "uart3_ick");
			if (IS_ERR(uart3_ick))
				printk("Could not get uart3_ick\n");
			else {
				clk_enable(uart3_ick);
			}

			uart3_fck = clk_get(NULL, "uart3_fck");
			if (IS_ERR(uart3_fck))
				printk("Could not get uart3_fck\n");
			else {
				clk_enable(uart3_fck);
			}
			break;
		}

		omap_serial_reset(p);
	}
}

static struct platform_device serial_device = {
	.name			= "serial8250",
	.id			= PLAT8250_DEV_PLATFORM,
	.dev			= {
		.platform_data	= serial_platform_data,
	},
};

static int __init omap_init(void)
{
	return platform_device_register(&serial_device);
}
arch_initcall(omap_init);
Commit	Line	Data
1dbae815	1	/*
f30c2269	2	* arch/arm/mach-omap2/serial.c
1dbae815 TL	3	*
	4	* OMAP2 serial support.
	5	*
	6	* Copyright (C) 2005 Nokia Corporation
	7	* Author: Paul Mundt <paul.mundt@nokia.com>
	8	*
	9	* Based off of arch/arm/mach-omap/omap1/serial.c
	10	*
	11	* This file is subject to the terms and conditions of the GNU General Public
	12	* License. See the file "COPYING" in the main directory of this archive
	13	* for more details.
	14	*/
	15	#include <linux/kernel.h>
	16	#include <linux/init.h>
	17	#include <linux/serial_8250.h>
	18	#include <linux/serial_reg.h>
f8ce2547	19	#include <linux/clk.h>
fced80c7	20	#include <linux/io.h>
1dbae815	21
a09e64fb RK	22	#include <mach/common.h>
a09e64fb RK	23	#include <mach/board.h>
1dbae815 TL	24
	25	static struct clk * uart1_ick = NULL;
	26	static struct clk * uart1_fck = NULL;
	27	static struct clk * uart2_ick = NULL;
	28	static struct clk * uart2_fck = NULL;
	29	static struct clk * uart3_ick = NULL;
	30	static struct clk * uart3_fck = NULL;
	31
	32	static struct plat_serial8250_port serial_platform_data[] = {
	33	{
	34	.membase = (char *)IO_ADDRESS(OMAP_UART1_BASE),
	35	.mapbase = (unsigned long)OMAP_UART1_BASE,
	36	.irq = 72,
	37	.flags = UPF_BOOT_AUTOCONF,
	38	.iotype = UPIO_MEM,
	39	.regshift = 2,
	40	.uartclk = OMAP16XX_BASE_BAUD * 16,
	41	}, {
	42	.membase = (char *)IO_ADDRESS(OMAP_UART2_BASE),
	43	.mapbase = (unsigned long)OMAP_UART2_BASE,
	44	.irq = 73,
	45	.flags = UPF_BOOT_AUTOCONF,
	46	.iotype = UPIO_MEM,
	47	.regshift = 2,
	48	.uartclk = OMAP16XX_BASE_BAUD * 16,
	49	}, {
	50	.membase = (char *)IO_ADDRESS(OMAP_UART3_BASE),
	51	.mapbase = (unsigned long)OMAP_UART3_BASE,
	52	.irq = 74,
	53	.flags = UPF_BOOT_AUTOCONF,
	54	.iotype = UPIO_MEM,
	55	.regshift = 2,
	56	.uartclk = OMAP16XX_BASE_BAUD * 16,
	57	}, {
	58	.flags = 0
	59	}
	60	};
	61
	62	static inline unsigned int serial_read_reg(struct plat_serial8250_port *up,
	63	int offset)
	64	{
	65	offset <<= up->regshift;
	66	return (unsigned int)__raw_readb(up->membase + offset);
	67	}
	68
	69	static inline void serial_write_reg(struct plat_serial8250_port *p, int offset,
	70	int value)
	71	{
	72	offset <<= p->regshift;
	73	__raw_writeb(value, (unsigned long)(p->membase + offset));
	74	}
	75
	76	/*
	77	* Internal UARTs need to be initialized for the 8250 autoconfig to work
	78	* properly. Note that the TX watermark initialization may not be needed
	79	* once the 8250.c watermark handling code is merged.
	80	*/
	81	static inline void __init omap_serial_reset(struct plat_serial8250_port *p)
	82	{
	83	serial_write_reg(p, UART_OMAP_MDR1, 0x07);
	84	serial_write_reg(p, UART_OMAP_SCR, 0x08);
	85	serial_write_reg(p, UART_OMAP_MDR1, 0x00);
671c7235	86	serial_write_reg(p, UART_OMAP_SYSC, (0x02 << 3) \| (1 << 2) \| (1 << 0));
1dbae815 TL	87	}
	88
	89	void __init omap_serial_init()
	90	{
	91	int i;
	92	const struct omap_uart_config *info;
	93
	94	/*
	95	* Make sure the serial ports are muxed on at this point.
	96	* You have to mux them off in device drivers later on
	97	* if not needed.
	98	*/
	99
	100	info = omap_get_config(OMAP_TAG_UART,
	101	struct omap_uart_config);
	102
	103	if (info == NULL)
	104	return;
	105
	106	for (i = 0; i < OMAP_MAX_NR_PORTS; i++) {
	107	struct plat_serial8250_port *p = serial_platform_data + i;
	108
	109	if (!(info->enabled_uarts & (1 << i))) {
	110	p->membase = 0;
	111	p->mapbase = 0;
	112	continue;
	113	}
	114
	115	switch (i) {
	116	case 0:
	117	uart1_ick = clk_get(NULL, "uart1_ick");
	118	if (IS_ERR(uart1_ick))
	119	printk("Could not get uart1_ick\n");
	120	else {
30ff720b	121	clk_enable(uart1_ick);
1dbae815 TL	122	}
	123
	124	uart1_fck = clk_get(NULL, "uart1_fck");
	125	if (IS_ERR(uart1_fck))
	126	printk("Could not get uart1_fck\n");
	127	else {
30ff720b	128	clk_enable(uart1_fck);
1dbae815 TL	129	}
	130	break;
	131	case 1:
	132	uart2_ick = clk_get(NULL, "uart2_ick");
	133	if (IS_ERR(uart2_ick))
	134	printk("Could not get uart2_ick\n");
	135	else {
30ff720b	136	clk_enable(uart2_ick);
1dbae815 TL	137	}
	138
	139	uart2_fck = clk_get(NULL, "uart2_fck");
	140	if (IS_ERR(uart2_fck))
	141	printk("Could not get uart2_fck\n");
	142	else {
30ff720b	143	clk_enable(uart2_fck);
1dbae815 TL	144	}
	145	break;
	146	case 2:
	147	uart3_ick = clk_get(NULL, "uart3_ick");
	148	if (IS_ERR(uart3_ick))
	149	printk("Could not get uart3_ick\n");
	150	else {
30ff720b	151	clk_enable(uart3_ick);
1dbae815 TL	152	}
	153
	154	uart3_fck = clk_get(NULL, "uart3_fck");
	155	if (IS_ERR(uart3_fck))
	156	printk("Could not get uart3_fck\n");
	157	else {
30ff720b	158	clk_enable(uart3_fck);
1dbae815 TL	159	}
	160	break;
	161	}
	162
	163	omap_serial_reset(p);
	164	}
	165	}
	166
	167	static struct platform_device serial_device = {
	168	.name = "serial8250",
7d420896	169	.id = PLAT8250_DEV_PLATFORM,
1dbae815 TL	170	.dev = {
	171	.platform_data = serial_platform_data,
	172	},
	173	};
	174
	175	static int __init omap_init(void)
	176	{
	177	return platform_device_register(&serial_device);
	178	}
	179	arch_initcall(omap_init);