Commit | Line | Data |
---|---|---|
984aa6db TG |
1 | /* |
2 | * OMAP SmartReflex Voltage Control | |
3 | * | |
4 | * Author: Thara Gopinath <thara@ti.com> | |
5 | * | |
6 | * Copyright (C) 2010 Texas Instruments, Inc. | |
7 | * Thara Gopinath <thara@ti.com> | |
8 | * | |
9 | * Copyright (C) 2008 Nokia Corporation | |
10 | * Kalle Jokiniemi | |
11 | * | |
12 | * Copyright (C) 2007 Texas Instruments, Inc. | |
13 | * Lesly A M <x0080970@ti.com> | |
14 | * | |
15 | * This program is free software; you can redistribute it and/or modify | |
16 | * it under the terms of the GNU General Public License version 2 as | |
17 | * published by the Free Software Foundation. | |
18 | */ | |
19 | ||
20 | #include <linux/interrupt.h> | |
21 | #include <linux/clk.h> | |
22 | #include <linux/io.h> | |
23 | #include <linux/debugfs.h> | |
24 | #include <linux/delay.h> | |
25 | #include <linux/slab.h> | |
26 | #include <linux/pm_runtime.h> | |
27 | ||
28 | #include <plat/common.h> | |
29 | #include <plat/smartreflex.h> | |
30 | ||
31 | #include "pm.h" | |
32 | ||
33 | #define SMARTREFLEX_NAME_LEN 16 | |
077fceca | 34 | #define NVALUE_NAME_LEN 40 |
984aa6db TG |
35 | #define SR_DISABLE_TIMEOUT 200 |
36 | ||
37 | struct omap_sr { | |
38 | int srid; | |
39 | int ip_type; | |
40 | int nvalue_count; | |
41 | bool autocomp_active; | |
42 | u32 clk_length; | |
43 | u32 err_weight; | |
44 | u32 err_minlimit; | |
45 | u32 err_maxlimit; | |
46 | u32 accum_data; | |
47 | u32 senn_avgweight; | |
48 | u32 senp_avgweight; | |
49 | u32 senp_mod; | |
50 | u32 senn_mod; | |
51 | unsigned int irq; | |
52 | void __iomem *base; | |
53 | struct platform_device *pdev; | |
54 | struct list_head node; | |
55 | struct omap_sr_nvalue_table *nvalue_table; | |
56 | struct voltagedomain *voltdm; | |
57 | }; | |
58 | ||
59 | /* sr_list contains all the instances of smartreflex module */ | |
60 | static LIST_HEAD(sr_list); | |
61 | ||
62 | static struct omap_sr_class_data *sr_class; | |
63 | static struct omap_sr_pmic_data *sr_pmic_data; | |
64 | ||
65 | static inline void sr_write_reg(struct omap_sr *sr, unsigned offset, u32 value) | |
66 | { | |
67 | __raw_writel(value, (sr->base + offset)); | |
68 | } | |
69 | ||
70 | static inline void sr_modify_reg(struct omap_sr *sr, unsigned offset, u32 mask, | |
71 | u32 value) | |
72 | { | |
73 | u32 reg_val; | |
74 | u32 errconfig_offs = 0, errconfig_mask = 0; | |
75 | ||
76 | reg_val = __raw_readl(sr->base + offset); | |
77 | reg_val &= ~mask; | |
78 | ||
79 | /* | |
80 | * Smartreflex error config register is special as it contains | |
81 | * certain status bits which if written a 1 into means a clear | |
82 | * of those bits. So in order to make sure no accidental write of | |
83 | * 1 happens to those status bits, do a clear of them in the read | |
84 | * value. This mean this API doesn't rewrite values in these bits | |
85 | * if they are currently set, but does allow the caller to write | |
86 | * those bits. | |
87 | */ | |
88 | if (sr->ip_type == SR_TYPE_V1) { | |
89 | errconfig_offs = ERRCONFIG_V1; | |
90 | errconfig_mask = ERRCONFIG_STATUS_V1_MASK; | |
91 | } else if (sr->ip_type == SR_TYPE_V2) { | |
92 | errconfig_offs = ERRCONFIG_V2; | |
93 | errconfig_mask = ERRCONFIG_VPBOUNDINTST_V2; | |
94 | } | |
95 | ||
96 | if (offset == errconfig_offs) | |
97 | reg_val &= ~errconfig_mask; | |
98 | ||
99 | reg_val |= value; | |
100 | ||
101 | __raw_writel(reg_val, (sr->base + offset)); | |
102 | } | |
103 | ||
104 | static inline u32 sr_read_reg(struct omap_sr *sr, unsigned offset) | |
105 | { | |
106 | return __raw_readl(sr->base + offset); | |
107 | } | |
108 | ||
109 | static struct omap_sr *_sr_lookup(struct voltagedomain *voltdm) | |
110 | { | |
111 | struct omap_sr *sr_info; | |
112 | ||
113 | if (!voltdm) { | |
114 | pr_err("%s: Null voltage domain passed!\n", __func__); | |
115 | return ERR_PTR(-EINVAL); | |
116 | } | |
117 | ||
118 | list_for_each_entry(sr_info, &sr_list, node) { | |
119 | if (voltdm == sr_info->voltdm) | |
120 | return sr_info; | |
121 | } | |
122 | ||
123 | return ERR_PTR(-ENODATA); | |
124 | } | |
125 | ||
126 | static irqreturn_t sr_interrupt(int irq, void *data) | |
127 | { | |
128 | struct omap_sr *sr_info = (struct omap_sr *)data; | |
129 | u32 status = 0; | |
130 | ||
131 | if (sr_info->ip_type == SR_TYPE_V1) { | |
132 | /* Read the status bits */ | |
133 | status = sr_read_reg(sr_info, ERRCONFIG_V1); | |
134 | ||
135 | /* Clear them by writing back */ | |
136 | sr_write_reg(sr_info, ERRCONFIG_V1, status); | |
137 | } else if (sr_info->ip_type == SR_TYPE_V2) { | |
138 | /* Read the status bits */ | |
139 | sr_read_reg(sr_info, IRQSTATUS); | |
140 | ||
141 | /* Clear them by writing back */ | |
142 | sr_write_reg(sr_info, IRQSTATUS, status); | |
143 | } | |
144 | ||
145 | if (sr_class->class_type == SR_CLASS2 && sr_class->notify) | |
146 | sr_class->notify(sr_info->voltdm, status); | |
147 | ||
148 | return IRQ_HANDLED; | |
149 | } | |
150 | ||
151 | static void sr_set_clk_length(struct omap_sr *sr) | |
152 | { | |
153 | struct clk *sys_ck; | |
154 | u32 sys_clk_speed; | |
155 | ||
b35cecf9 TG |
156 | if (cpu_is_omap34xx()) |
157 | sys_ck = clk_get(NULL, "sys_ck"); | |
158 | else | |
159 | sys_ck = clk_get(NULL, "sys_clkin_ck"); | |
160 | ||
984aa6db TG |
161 | if (IS_ERR(sys_ck)) { |
162 | dev_err(&sr->pdev->dev, "%s: unable to get sys clk\n", | |
163 | __func__); | |
164 | return; | |
165 | } | |
166 | sys_clk_speed = clk_get_rate(sys_ck); | |
167 | clk_put(sys_ck); | |
168 | ||
169 | switch (sys_clk_speed) { | |
170 | case 12000000: | |
171 | sr->clk_length = SRCLKLENGTH_12MHZ_SYSCLK; | |
172 | break; | |
173 | case 13000000: | |
174 | sr->clk_length = SRCLKLENGTH_13MHZ_SYSCLK; | |
175 | break; | |
176 | case 19200000: | |
177 | sr->clk_length = SRCLKLENGTH_19MHZ_SYSCLK; | |
178 | break; | |
179 | case 26000000: | |
180 | sr->clk_length = SRCLKLENGTH_26MHZ_SYSCLK; | |
181 | break; | |
182 | case 38400000: | |
183 | sr->clk_length = SRCLKLENGTH_38MHZ_SYSCLK; | |
184 | break; | |
185 | default: | |
186 | dev_err(&sr->pdev->dev, "%s: Invalid sysclk value: %d\n", | |
187 | __func__, sys_clk_speed); | |
188 | break; | |
189 | } | |
190 | } | |
191 | ||
192 | static void sr_set_regfields(struct omap_sr *sr) | |
193 | { | |
194 | /* | |
195 | * For time being these values are defined in smartreflex.h | |
196 | * and populated during init. May be they can be moved to board | |
197 | * file or pmic specific data structure. In that case these structure | |
198 | * fields will have to be populated using the pdata or pmic structure. | |
199 | */ | |
b35cecf9 | 200 | if (cpu_is_omap34xx() || cpu_is_omap44xx()) { |
984aa6db TG |
201 | sr->err_weight = OMAP3430_SR_ERRWEIGHT; |
202 | sr->err_maxlimit = OMAP3430_SR_ERRMAXLIMIT; | |
203 | sr->accum_data = OMAP3430_SR_ACCUMDATA; | |
204 | if (!(strcmp(sr->voltdm->name, "mpu"))) { | |
205 | sr->senn_avgweight = OMAP3430_SR1_SENNAVGWEIGHT; | |
206 | sr->senp_avgweight = OMAP3430_SR1_SENPAVGWEIGHT; | |
207 | } else { | |
208 | sr->senn_avgweight = OMAP3430_SR2_SENNAVGWEIGHT; | |
209 | sr->senp_avgweight = OMAP3430_SR2_SENPAVGWEIGHT; | |
210 | } | |
211 | } | |
212 | } | |
213 | ||
214 | static void sr_start_vddautocomp(struct omap_sr *sr) | |
215 | { | |
216 | if (!sr_class || !(sr_class->enable) || !(sr_class->configure)) { | |
217 | dev_warn(&sr->pdev->dev, | |
218 | "%s: smartreflex class driver not registered\n", | |
219 | __func__); | |
220 | return; | |
221 | } | |
222 | ||
223 | if (!sr_class->enable(sr->voltdm)) | |
224 | sr->autocomp_active = true; | |
225 | } | |
226 | ||
227 | static void sr_stop_vddautocomp(struct omap_sr *sr) | |
228 | { | |
229 | if (!sr_class || !(sr_class->disable)) { | |
230 | dev_warn(&sr->pdev->dev, | |
231 | "%s: smartreflex class driver not registered\n", | |
232 | __func__); | |
233 | return; | |
234 | } | |
235 | ||
236 | if (sr->autocomp_active) { | |
237 | sr_class->disable(sr->voltdm, 1); | |
238 | sr->autocomp_active = false; | |
239 | } | |
240 | } | |
241 | ||
242 | /* | |
243 | * This function handles the intializations which have to be done | |
244 | * only when both sr device and class driver regiter has | |
245 | * completed. This will be attempted to be called from both sr class | |
246 | * driver register and sr device intializtion API's. Only one call | |
247 | * will ultimately succeed. | |
248 | * | |
249 | * Currenly this function registers interrrupt handler for a particular SR | |
250 | * if smartreflex class driver is already registered and has | |
251 | * requested for interrupts and the SR interrupt line in present. | |
252 | */ | |
253 | static int sr_late_init(struct omap_sr *sr_info) | |
254 | { | |
255 | char *name; | |
256 | struct omap_sr_data *pdata = sr_info->pdev->dev.platform_data; | |
257 | struct resource *mem; | |
258 | int ret = 0; | |
259 | ||
260 | if (sr_class->class_type == SR_CLASS2 && | |
261 | sr_class->notify_flags && sr_info->irq) { | |
262 | ||
263 | name = kzalloc(SMARTREFLEX_NAME_LEN + 1, GFP_KERNEL); | |
264 | strcpy(name, "sr_"); | |
265 | strcat(name, sr_info->voltdm->name); | |
266 | ret = request_irq(sr_info->irq, sr_interrupt, | |
267 | 0, name, (void *)sr_info); | |
268 | if (ret) | |
269 | goto error; | |
270 | } | |
271 | ||
272 | if (pdata && pdata->enable_on_init) | |
273 | sr_start_vddautocomp(sr_info); | |
274 | ||
275 | return ret; | |
276 | ||
277 | error: | |
278 | iounmap(sr_info->base); | |
279 | mem = platform_get_resource(sr_info->pdev, IORESOURCE_MEM, 0); | |
280 | release_mem_region(mem->start, resource_size(mem)); | |
281 | list_del(&sr_info->node); | |
282 | dev_err(&sr_info->pdev->dev, "%s: ERROR in registering" | |
283 | "interrupt handler. Smartreflex will" | |
284 | "not function as desired\n", __func__); | |
b3329a33 | 285 | kfree(name); |
984aa6db TG |
286 | kfree(sr_info); |
287 | return ret; | |
288 | } | |
289 | ||
290 | static void sr_v1_disable(struct omap_sr *sr) | |
291 | { | |
292 | int timeout = 0; | |
293 | ||
294 | /* Enable MCUDisableAcknowledge interrupt */ | |
295 | sr_modify_reg(sr, ERRCONFIG_V1, | |
296 | ERRCONFIG_MCUDISACKINTEN, ERRCONFIG_MCUDISACKINTEN); | |
297 | ||
298 | /* SRCONFIG - disable SR */ | |
299 | sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, 0x0); | |
300 | ||
301 | /* Disable all other SR interrupts and clear the status */ | |
302 | sr_modify_reg(sr, ERRCONFIG_V1, | |
303 | (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUVALIDINTEN | | |
304 | ERRCONFIG_MCUBOUNDINTEN | ERRCONFIG_VPBOUNDINTEN_V1), | |
305 | (ERRCONFIG_MCUACCUMINTST | ERRCONFIG_MCUVALIDINTST | | |
306 | ERRCONFIG_MCUBOUNDINTST | | |
307 | ERRCONFIG_VPBOUNDINTST_V1)); | |
308 | ||
309 | /* | |
310 | * Wait for SR to be disabled. | |
311 | * wait until ERRCONFIG.MCUDISACKINTST = 1. Typical latency is 1us. | |
312 | */ | |
313 | omap_test_timeout((sr_read_reg(sr, ERRCONFIG_V1) & | |
314 | ERRCONFIG_MCUDISACKINTST), SR_DISABLE_TIMEOUT, | |
315 | timeout); | |
316 | ||
317 | if (timeout >= SR_DISABLE_TIMEOUT) | |
318 | dev_warn(&sr->pdev->dev, "%s: Smartreflex disable timedout\n", | |
319 | __func__); | |
320 | ||
321 | /* Disable MCUDisableAcknowledge interrupt & clear pending interrupt */ | |
322 | sr_modify_reg(sr, ERRCONFIG_V1, ERRCONFIG_MCUDISACKINTEN, | |
323 | ERRCONFIG_MCUDISACKINTST); | |
324 | } | |
325 | ||
326 | static void sr_v2_disable(struct omap_sr *sr) | |
327 | { | |
328 | int timeout = 0; | |
329 | ||
330 | /* Enable MCUDisableAcknowledge interrupt */ | |
331 | sr_write_reg(sr, IRQENABLE_SET, IRQENABLE_MCUDISABLEACKINT); | |
332 | ||
333 | /* SRCONFIG - disable SR */ | |
334 | sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, 0x0); | |
335 | ||
336 | /* Disable all other SR interrupts and clear the status */ | |
337 | sr_modify_reg(sr, ERRCONFIG_V2, ERRCONFIG_VPBOUNDINTEN_V2, | |
338 | ERRCONFIG_VPBOUNDINTST_V2); | |
339 | sr_write_reg(sr, IRQENABLE_CLR, (IRQENABLE_MCUACCUMINT | | |
340 | IRQENABLE_MCUVALIDINT | | |
341 | IRQENABLE_MCUBOUNDSINT)); | |
342 | sr_write_reg(sr, IRQSTATUS, (IRQSTATUS_MCUACCUMINT | | |
343 | IRQSTATUS_MCVALIDINT | | |
344 | IRQSTATUS_MCBOUNDSINT)); | |
345 | ||
346 | /* | |
347 | * Wait for SR to be disabled. | |
348 | * wait until IRQSTATUS.MCUDISACKINTST = 1. Typical latency is 1us. | |
349 | */ | |
350 | omap_test_timeout((sr_read_reg(sr, IRQSTATUS) & | |
351 | IRQSTATUS_MCUDISABLEACKINT), SR_DISABLE_TIMEOUT, | |
352 | timeout); | |
353 | ||
354 | if (timeout >= SR_DISABLE_TIMEOUT) | |
355 | dev_warn(&sr->pdev->dev, "%s: Smartreflex disable timedout\n", | |
356 | __func__); | |
357 | ||
358 | /* Disable MCUDisableAcknowledge interrupt & clear pending interrupt */ | |
359 | sr_write_reg(sr, IRQENABLE_CLR, IRQENABLE_MCUDISABLEACKINT); | |
360 | sr_write_reg(sr, IRQSTATUS, IRQSTATUS_MCUDISABLEACKINT); | |
361 | } | |
362 | ||
363 | static u32 sr_retrieve_nvalue(struct omap_sr *sr, u32 efuse_offs) | |
364 | { | |
365 | int i; | |
366 | ||
367 | if (!sr->nvalue_table) { | |
368 | dev_warn(&sr->pdev->dev, "%s: Missing ntarget value table\n", | |
369 | __func__); | |
370 | return 0; | |
371 | } | |
372 | ||
373 | for (i = 0; i < sr->nvalue_count; i++) { | |
374 | if (sr->nvalue_table[i].efuse_offs == efuse_offs) | |
375 | return sr->nvalue_table[i].nvalue; | |
376 | } | |
377 | ||
378 | return 0; | |
379 | } | |
380 | ||
381 | /* Public Functions */ | |
382 | ||
383 | /** | |
384 | * sr_configure_errgen() - Configures the smrtreflex to perform AVS using the | |
385 | * error generator module. | |
386 | * @voltdm: VDD pointer to which the SR module to be configured belongs to. | |
387 | * | |
388 | * This API is to be called from the smartreflex class driver to | |
389 | * configure the error generator module inside the smartreflex module. | |
390 | * SR settings if using the ERROR module inside Smartreflex. | |
391 | * SR CLASS 3 by default uses only the ERROR module where as | |
392 | * SR CLASS 2 can choose between ERROR module and MINMAXAVG | |
393 | * module. Returns 0 on success and error value in case of failure. | |
394 | */ | |
395 | int sr_configure_errgen(struct voltagedomain *voltdm) | |
396 | { | |
397 | u32 sr_config, sr_errconfig, errconfig_offs, vpboundint_en; | |
398 | u32 vpboundint_st, senp_en = 0, senn_en = 0; | |
399 | u8 senp_shift, senn_shift; | |
400 | struct omap_sr *sr = _sr_lookup(voltdm); | |
401 | ||
402 | if (IS_ERR(sr)) { | |
403 | pr_warning("%s: omap_sr struct for sr_%s not found\n", | |
404 | __func__, voltdm->name); | |
405 | return -EINVAL; | |
406 | } | |
407 | ||
408 | if (!sr->clk_length) | |
409 | sr_set_clk_length(sr); | |
410 | ||
411 | senp_en = sr->senp_mod; | |
412 | senn_en = sr->senn_mod; | |
413 | ||
414 | sr_config = (sr->clk_length << SRCONFIG_SRCLKLENGTH_SHIFT) | | |
415 | SRCONFIG_SENENABLE | SRCONFIG_ERRGEN_EN; | |
416 | ||
417 | if (sr->ip_type == SR_TYPE_V1) { | |
418 | sr_config |= SRCONFIG_DELAYCTRL; | |
419 | senn_shift = SRCONFIG_SENNENABLE_V1_SHIFT; | |
420 | senp_shift = SRCONFIG_SENPENABLE_V1_SHIFT; | |
421 | errconfig_offs = ERRCONFIG_V1; | |
422 | vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V1; | |
423 | vpboundint_st = ERRCONFIG_VPBOUNDINTST_V1; | |
424 | } else if (sr->ip_type == SR_TYPE_V2) { | |
425 | senn_shift = SRCONFIG_SENNENABLE_V2_SHIFT; | |
426 | senp_shift = SRCONFIG_SENPENABLE_V2_SHIFT; | |
427 | errconfig_offs = ERRCONFIG_V2; | |
428 | vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V2; | |
429 | vpboundint_st = ERRCONFIG_VPBOUNDINTST_V2; | |
430 | } else { | |
431 | dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex" | |
432 | "module without specifying the ip\n", __func__); | |
433 | return -EINVAL; | |
434 | } | |
435 | ||
436 | sr_config |= ((senn_en << senn_shift) | (senp_en << senp_shift)); | |
437 | sr_write_reg(sr, SRCONFIG, sr_config); | |
438 | sr_errconfig = (sr->err_weight << ERRCONFIG_ERRWEIGHT_SHIFT) | | |
439 | (sr->err_maxlimit << ERRCONFIG_ERRMAXLIMIT_SHIFT) | | |
440 | (sr->err_minlimit << ERRCONFIG_ERRMINLIMIT_SHIFT); | |
441 | sr_modify_reg(sr, errconfig_offs, (SR_ERRWEIGHT_MASK | | |
442 | SR_ERRMAXLIMIT_MASK | SR_ERRMINLIMIT_MASK), | |
443 | sr_errconfig); | |
444 | ||
445 | /* Enabling the interrupts if the ERROR module is used */ | |
446 | sr_modify_reg(sr, errconfig_offs, | |
447 | vpboundint_en, (vpboundint_en | vpboundint_st)); | |
448 | ||
449 | return 0; | |
450 | } | |
451 | ||
452 | /** | |
453 | * sr_configure_minmax() - Configures the smrtreflex to perform AVS using the | |
454 | * minmaxavg module. | |
455 | * @voltdm: VDD pointer to which the SR module to be configured belongs to. | |
456 | * | |
457 | * This API is to be called from the smartreflex class driver to | |
458 | * configure the minmaxavg module inside the smartreflex module. | |
459 | * SR settings if using the ERROR module inside Smartreflex. | |
460 | * SR CLASS 3 by default uses only the ERROR module where as | |
461 | * SR CLASS 2 can choose between ERROR module and MINMAXAVG | |
462 | * module. Returns 0 on success and error value in case of failure. | |
463 | */ | |
464 | int sr_configure_minmax(struct voltagedomain *voltdm) | |
465 | { | |
466 | u32 sr_config, sr_avgwt; | |
467 | u32 senp_en = 0, senn_en = 0; | |
468 | u8 senp_shift, senn_shift; | |
469 | struct omap_sr *sr = _sr_lookup(voltdm); | |
470 | ||
471 | if (IS_ERR(sr)) { | |
472 | pr_warning("%s: omap_sr struct for sr_%s not found\n", | |
473 | __func__, voltdm->name); | |
474 | return -EINVAL; | |
475 | } | |
476 | ||
477 | if (!sr->clk_length) | |
478 | sr_set_clk_length(sr); | |
479 | ||
480 | senp_en = sr->senp_mod; | |
481 | senn_en = sr->senn_mod; | |
482 | ||
483 | sr_config = (sr->clk_length << SRCONFIG_SRCLKLENGTH_SHIFT) | | |
484 | SRCONFIG_SENENABLE | | |
485 | (sr->accum_data << SRCONFIG_ACCUMDATA_SHIFT); | |
486 | ||
487 | if (sr->ip_type == SR_TYPE_V1) { | |
488 | sr_config |= SRCONFIG_DELAYCTRL; | |
489 | senn_shift = SRCONFIG_SENNENABLE_V1_SHIFT; | |
490 | senp_shift = SRCONFIG_SENPENABLE_V1_SHIFT; | |
491 | } else if (sr->ip_type == SR_TYPE_V2) { | |
492 | senn_shift = SRCONFIG_SENNENABLE_V2_SHIFT; | |
493 | senp_shift = SRCONFIG_SENPENABLE_V2_SHIFT; | |
494 | } else { | |
495 | dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex" | |
496 | "module without specifying the ip\n", __func__); | |
497 | return -EINVAL; | |
498 | } | |
499 | ||
500 | sr_config |= ((senn_en << senn_shift) | (senp_en << senp_shift)); | |
501 | sr_write_reg(sr, SRCONFIG, sr_config); | |
502 | sr_avgwt = (sr->senp_avgweight << AVGWEIGHT_SENPAVGWEIGHT_SHIFT) | | |
503 | (sr->senn_avgweight << AVGWEIGHT_SENNAVGWEIGHT_SHIFT); | |
504 | sr_write_reg(sr, AVGWEIGHT, sr_avgwt); | |
505 | ||
506 | /* | |
507 | * Enabling the interrupts if MINMAXAVG module is used. | |
508 | * TODO: check if all the interrupts are mandatory | |
509 | */ | |
510 | if (sr->ip_type == SR_TYPE_V1) { | |
511 | sr_modify_reg(sr, ERRCONFIG_V1, | |
512 | (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUVALIDINTEN | | |
513 | ERRCONFIG_MCUBOUNDINTEN), | |
514 | (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUACCUMINTST | | |
515 | ERRCONFIG_MCUVALIDINTEN | ERRCONFIG_MCUVALIDINTST | | |
516 | ERRCONFIG_MCUBOUNDINTEN | ERRCONFIG_MCUBOUNDINTST)); | |
517 | } else if (sr->ip_type == SR_TYPE_V2) { | |
518 | sr_write_reg(sr, IRQSTATUS, | |
519 | IRQSTATUS_MCUACCUMINT | IRQSTATUS_MCVALIDINT | | |
520 | IRQSTATUS_MCBOUNDSINT | IRQSTATUS_MCUDISABLEACKINT); | |
521 | sr_write_reg(sr, IRQENABLE_SET, | |
522 | IRQENABLE_MCUACCUMINT | IRQENABLE_MCUVALIDINT | | |
523 | IRQENABLE_MCUBOUNDSINT | IRQENABLE_MCUDISABLEACKINT); | |
524 | } | |
525 | ||
526 | return 0; | |
527 | } | |
528 | ||
529 | /** | |
530 | * sr_enable() - Enables the smartreflex module. | |
531 | * @voltdm: VDD pointer to which the SR module to be configured belongs to. | |
532 | * @volt: The voltage at which the Voltage domain associated with | |
533 | * the smartreflex module is operating at. | |
534 | * This is required only to program the correct Ntarget value. | |
535 | * | |
536 | * This API is to be called from the smartreflex class driver to | |
537 | * enable a smartreflex module. Returns 0 on success. Returns error | |
538 | * value if the voltage passed is wrong or if ntarget value is wrong. | |
539 | */ | |
540 | int sr_enable(struct voltagedomain *voltdm, unsigned long volt) | |
541 | { | |
542 | u32 nvalue_reciprocal; | |
543 | struct omap_volt_data *volt_data; | |
544 | struct omap_sr *sr = _sr_lookup(voltdm); | |
545 | int ret; | |
546 | ||
547 | if (IS_ERR(sr)) { | |
548 | pr_warning("%s: omap_sr struct for sr_%s not found\n", | |
549 | __func__, voltdm->name); | |
550 | return -EINVAL; | |
551 | } | |
552 | ||
553 | volt_data = omap_voltage_get_voltdata(sr->voltdm, volt); | |
554 | ||
555 | if (IS_ERR(volt_data)) { | |
556 | dev_warn(&sr->pdev->dev, "%s: Unable to get voltage table" | |
557 | "for nominal voltage %ld\n", __func__, volt); | |
558 | return -ENODATA; | |
559 | } | |
560 | ||
561 | nvalue_reciprocal = sr_retrieve_nvalue(sr, volt_data->sr_efuse_offs); | |
562 | ||
563 | if (!nvalue_reciprocal) { | |
564 | dev_warn(&sr->pdev->dev, "%s: NVALUE = 0 at voltage %ld\n", | |
565 | __func__, volt); | |
566 | return -ENODATA; | |
567 | } | |
568 | ||
569 | /* errminlimit is opp dependent and hence linked to voltage */ | |
570 | sr->err_minlimit = volt_data->sr_errminlimit; | |
571 | ||
572 | pm_runtime_get_sync(&sr->pdev->dev); | |
573 | ||
574 | /* Check if SR is already enabled. If yes do nothing */ | |
575 | if (sr_read_reg(sr, SRCONFIG) & SRCONFIG_SRENABLE) | |
576 | return 0; | |
577 | ||
578 | /* Configure SR */ | |
579 | ret = sr_class->configure(voltdm); | |
580 | if (ret) | |
581 | return ret; | |
582 | ||
583 | sr_write_reg(sr, NVALUERECIPROCAL, nvalue_reciprocal); | |
584 | ||
585 | /* SRCONFIG - enable SR */ | |
586 | sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, SRCONFIG_SRENABLE); | |
587 | return 0; | |
588 | } | |
589 | ||
590 | /** | |
591 | * sr_disable() - Disables the smartreflex module. | |
592 | * @voltdm: VDD pointer to which the SR module to be configured belongs to. | |
593 | * | |
594 | * This API is to be called from the smartreflex class driver to | |
595 | * disable a smartreflex module. | |
596 | */ | |
597 | void sr_disable(struct voltagedomain *voltdm) | |
598 | { | |
599 | struct omap_sr *sr = _sr_lookup(voltdm); | |
600 | ||
601 | if (IS_ERR(sr)) { | |
602 | pr_warning("%s: omap_sr struct for sr_%s not found\n", | |
603 | __func__, voltdm->name); | |
604 | return; | |
605 | } | |
606 | ||
607 | /* Check if SR clocks are already disabled. If yes do nothing */ | |
608 | if (pm_runtime_suspended(&sr->pdev->dev)) | |
609 | return; | |
610 | ||
611 | /* | |
612 | * Disable SR if only it is indeed enabled. Else just | |
613 | * disable the clocks. | |
614 | */ | |
615 | if (sr_read_reg(sr, SRCONFIG) & SRCONFIG_SRENABLE) { | |
616 | if (sr->ip_type == SR_TYPE_V1) | |
617 | sr_v1_disable(sr); | |
618 | else if (sr->ip_type == SR_TYPE_V2) | |
619 | sr_v2_disable(sr); | |
620 | } | |
621 | ||
622 | pm_runtime_put_sync(&sr->pdev->dev); | |
623 | } | |
624 | ||
625 | /** | |
626 | * sr_register_class() - API to register a smartreflex class parameters. | |
627 | * @class_data: The structure containing various sr class specific data. | |
628 | * | |
629 | * This API is to be called by the smartreflex class driver to register itself | |
630 | * with the smartreflex driver during init. Returns 0 on success else the | |
631 | * error value. | |
632 | */ | |
633 | int sr_register_class(struct omap_sr_class_data *class_data) | |
634 | { | |
635 | struct omap_sr *sr_info; | |
636 | ||
637 | if (!class_data) { | |
638 | pr_warning("%s:, Smartreflex class data passed is NULL\n", | |
639 | __func__); | |
640 | return -EINVAL; | |
641 | } | |
642 | ||
643 | if (sr_class) { | |
644 | pr_warning("%s: Smartreflex class driver already registered\n", | |
645 | __func__); | |
646 | return -EBUSY; | |
647 | } | |
648 | ||
649 | sr_class = class_data; | |
650 | ||
651 | /* | |
652 | * Call into late init to do intializations that require | |
653 | * both sr driver and sr class driver to be initiallized. | |
654 | */ | |
655 | list_for_each_entry(sr_info, &sr_list, node) | |
656 | sr_late_init(sr_info); | |
657 | ||
658 | return 0; | |
659 | } | |
660 | ||
661 | /** | |
662 | * omap_sr_enable() - API to enable SR clocks and to call into the | |
663 | * registered smartreflex class enable API. | |
664 | * @voltdm: VDD pointer to which the SR module to be configured belongs to. | |
665 | * | |
666 | * This API is to be called from the kernel in order to enable | |
667 | * a particular smartreflex module. This API will do the initial | |
668 | * configurations to turn on the smartreflex module and in turn call | |
669 | * into the registered smartreflex class enable API. | |
670 | */ | |
671 | void omap_sr_enable(struct voltagedomain *voltdm) | |
672 | { | |
673 | struct omap_sr *sr = _sr_lookup(voltdm); | |
674 | ||
675 | if (IS_ERR(sr)) { | |
676 | pr_warning("%s: omap_sr struct for sr_%s not found\n", | |
677 | __func__, voltdm->name); | |
678 | return; | |
679 | } | |
680 | ||
681 | if (!sr->autocomp_active) | |
682 | return; | |
683 | ||
684 | if (!sr_class || !(sr_class->enable) || !(sr_class->configure)) { | |
685 | dev_warn(&sr->pdev->dev, "%s: smartreflex class driver not" | |
686 | "registered\n", __func__); | |
687 | return; | |
688 | } | |
689 | ||
690 | sr_class->enable(voltdm); | |
691 | } | |
692 | ||
693 | /** | |
694 | * omap_sr_disable() - API to disable SR without resetting the voltage | |
695 | * processor voltage | |
696 | * @voltdm: VDD pointer to which the SR module to be configured belongs to. | |
697 | * | |
698 | * This API is to be called from the kernel in order to disable | |
699 | * a particular smartreflex module. This API will in turn call | |
700 | * into the registered smartreflex class disable API. This API will tell | |
701 | * the smartreflex class disable not to reset the VP voltage after | |
702 | * disabling smartreflex. | |
703 | */ | |
704 | void omap_sr_disable(struct voltagedomain *voltdm) | |
705 | { | |
706 | struct omap_sr *sr = _sr_lookup(voltdm); | |
707 | ||
708 | if (IS_ERR(sr)) { | |
709 | pr_warning("%s: omap_sr struct for sr_%s not found\n", | |
710 | __func__, voltdm->name); | |
711 | return; | |
712 | } | |
713 | ||
714 | if (!sr->autocomp_active) | |
715 | return; | |
716 | ||
717 | if (!sr_class || !(sr_class->disable)) { | |
718 | dev_warn(&sr->pdev->dev, "%s: smartreflex class driver not" | |
719 | "registered\n", __func__); | |
720 | return; | |
721 | } | |
722 | ||
723 | sr_class->disable(voltdm, 0); | |
724 | } | |
725 | ||
726 | /** | |
727 | * omap_sr_disable_reset_volt() - API to disable SR and reset the | |
728 | * voltage processor voltage | |
729 | * @voltdm: VDD pointer to which the SR module to be configured belongs to. | |
730 | * | |
731 | * This API is to be called from the kernel in order to disable | |
732 | * a particular smartreflex module. This API will in turn call | |
733 | * into the registered smartreflex class disable API. This API will tell | |
734 | * the smartreflex class disable to reset the VP voltage after | |
735 | * disabling smartreflex. | |
736 | */ | |
737 | void omap_sr_disable_reset_volt(struct voltagedomain *voltdm) | |
738 | { | |
739 | struct omap_sr *sr = _sr_lookup(voltdm); | |
740 | ||
741 | if (IS_ERR(sr)) { | |
742 | pr_warning("%s: omap_sr struct for sr_%s not found\n", | |
743 | __func__, voltdm->name); | |
744 | return; | |
745 | } | |
746 | ||
747 | if (!sr->autocomp_active) | |
748 | return; | |
749 | ||
750 | if (!sr_class || !(sr_class->disable)) { | |
751 | dev_warn(&sr->pdev->dev, "%s: smartreflex class driver not" | |
752 | "registered\n", __func__); | |
753 | return; | |
754 | } | |
755 | ||
756 | sr_class->disable(voltdm, 1); | |
757 | } | |
758 | ||
759 | /** | |
760 | * omap_sr_register_pmic() - API to register pmic specific info. | |
761 | * @pmic_data: The structure containing pmic specific data. | |
762 | * | |
763 | * This API is to be called from the PMIC specific code to register with | |
764 | * smartreflex driver pmic specific info. Currently the only info required | |
765 | * is the smartreflex init on the PMIC side. | |
766 | */ | |
767 | void omap_sr_register_pmic(struct omap_sr_pmic_data *pmic_data) | |
768 | { | |
769 | if (!pmic_data) { | |
770 | pr_warning("%s: Trying to register NULL PMIC data structure" | |
771 | "with smartreflex\n", __func__); | |
772 | return; | |
773 | } | |
774 | ||
775 | sr_pmic_data = pmic_data; | |
776 | } | |
777 | ||
778 | /* PM Debug Fs enteries to enable disable smartreflex. */ | |
779 | static int omap_sr_autocomp_show(void *data, u64 *val) | |
780 | { | |
781 | struct omap_sr *sr_info = (struct omap_sr *) data; | |
782 | ||
783 | if (!sr_info) { | |
8353584e | 784 | pr_warning("%s: omap_sr struct not found\n", __func__); |
984aa6db TG |
785 | return -EINVAL; |
786 | } | |
787 | ||
788 | *val = sr_info->autocomp_active; | |
789 | ||
790 | return 0; | |
791 | } | |
792 | ||
793 | static int omap_sr_autocomp_store(void *data, u64 val) | |
794 | { | |
795 | struct omap_sr *sr_info = (struct omap_sr *) data; | |
796 | ||
797 | if (!sr_info) { | |
8353584e | 798 | pr_warning("%s: omap_sr struct not found\n", __func__); |
984aa6db TG |
799 | return -EINVAL; |
800 | } | |
801 | ||
802 | /* Sanity check */ | |
803 | if (val && (val != 1)) { | |
804 | pr_warning("%s: Invalid argument %lld\n", __func__, val); | |
805 | return -EINVAL; | |
806 | } | |
807 | ||
808 | if (!val) | |
809 | sr_stop_vddautocomp(sr_info); | |
810 | else | |
811 | sr_start_vddautocomp(sr_info); | |
812 | ||
813 | return 0; | |
814 | } | |
815 | ||
816 | DEFINE_SIMPLE_ATTRIBUTE(pm_sr_fops, omap_sr_autocomp_show, | |
817 | omap_sr_autocomp_store, "%llu\n"); | |
818 | ||
819 | static int __init omap_sr_probe(struct platform_device *pdev) | |
820 | { | |
821 | struct omap_sr *sr_info = kzalloc(sizeof(struct omap_sr), GFP_KERNEL); | |
822 | struct omap_sr_data *pdata = pdev->dev.platform_data; | |
823 | struct resource *mem, *irq; | |
077fceca TG |
824 | struct dentry *vdd_dbg_dir, *dbg_dir, *nvalue_dir; |
825 | struct omap_volt_data *volt_data; | |
826 | int i, ret = 0; | |
984aa6db TG |
827 | |
828 | if (!sr_info) { | |
829 | dev_err(&pdev->dev, "%s: unable to allocate sr_info\n", | |
830 | __func__); | |
831 | return -ENOMEM; | |
832 | } | |
833 | ||
834 | if (!pdata) { | |
835 | dev_err(&pdev->dev, "%s: platform data missing\n", __func__); | |
720bc782 SW |
836 | ret = -EINVAL; |
837 | goto err_free_devinfo; | |
984aa6db TG |
838 | } |
839 | ||
840 | mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
841 | if (!mem) { | |
842 | dev_err(&pdev->dev, "%s: no mem resource\n", __func__); | |
843 | ret = -ENODEV; | |
844 | goto err_free_devinfo; | |
845 | } | |
846 | ||
847 | irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0); | |
848 | ||
849 | pm_runtime_enable(&pdev->dev); | |
850 | ||
851 | sr_info->pdev = pdev; | |
852 | sr_info->srid = pdev->id; | |
853 | sr_info->voltdm = pdata->voltdm; | |
854 | sr_info->nvalue_table = pdata->nvalue_table; | |
855 | sr_info->nvalue_count = pdata->nvalue_count; | |
856 | sr_info->senn_mod = pdata->senn_mod; | |
857 | sr_info->senp_mod = pdata->senp_mod; | |
858 | sr_info->autocomp_active = false; | |
859 | sr_info->ip_type = pdata->ip_type; | |
860 | sr_info->base = ioremap(mem->start, resource_size(mem)); | |
861 | if (!sr_info->base) { | |
862 | dev_err(&pdev->dev, "%s: ioremap fail\n", __func__); | |
863 | ret = -ENOMEM; | |
864 | goto err_release_region; | |
865 | } | |
866 | ||
867 | if (irq) | |
868 | sr_info->irq = irq->start; | |
869 | ||
870 | sr_set_clk_length(sr_info); | |
871 | sr_set_regfields(sr_info); | |
872 | ||
873 | list_add(&sr_info->node, &sr_list); | |
874 | ||
875 | /* | |
876 | * Call into late init to do intializations that require | |
877 | * both sr driver and sr class driver to be initiallized. | |
878 | */ | |
879 | if (sr_class) { | |
880 | ret = sr_late_init(sr_info); | |
881 | if (ret) { | |
882 | pr_warning("%s: Error in SR late init\n", __func__); | |
b3329a33 | 883 | goto err_release_region; |
984aa6db TG |
884 | } |
885 | } | |
886 | ||
887 | dev_info(&pdev->dev, "%s: SmartReflex driver initialized\n", __func__); | |
888 | ||
889 | /* | |
890 | * If the voltage domain debugfs directory is not created, do | |
891 | * not try to create rest of the debugfs entries. | |
892 | */ | |
893 | vdd_dbg_dir = omap_voltage_get_dbgdir(sr_info->voltdm); | |
b3329a33 SG |
894 | if (!vdd_dbg_dir) { |
895 | ret = -EINVAL; | |
896 | goto err_release_region; | |
897 | } | |
984aa6db TG |
898 | |
899 | dbg_dir = debugfs_create_dir("smartreflex", vdd_dbg_dir); | |
900 | if (IS_ERR(dbg_dir)) { | |
901 | dev_err(&pdev->dev, "%s: Unable to create debugfs directory\n", | |
902 | __func__); | |
b3329a33 SG |
903 | ret = PTR_ERR(dbg_dir); |
904 | goto err_release_region; | |
984aa6db TG |
905 | } |
906 | ||
1232a185 | 907 | (void) debugfs_create_file("autocomp", S_IRUGO | S_IWUSR, dbg_dir, |
984aa6db | 908 | (void *)sr_info, &pm_sr_fops); |
077fceca TG |
909 | (void) debugfs_create_x32("errweight", S_IRUGO, dbg_dir, |
910 | &sr_info->err_weight); | |
911 | (void) debugfs_create_x32("errmaxlimit", S_IRUGO, dbg_dir, | |
912 | &sr_info->err_maxlimit); | |
913 | (void) debugfs_create_x32("errminlimit", S_IRUGO, dbg_dir, | |
914 | &sr_info->err_minlimit); | |
915 | ||
916 | nvalue_dir = debugfs_create_dir("nvalue", dbg_dir); | |
917 | if (IS_ERR(nvalue_dir)) { | |
918 | dev_err(&pdev->dev, "%s: Unable to create debugfs directory" | |
919 | "for n-values\n", __func__); | |
b3329a33 SG |
920 | ret = PTR_ERR(nvalue_dir); |
921 | goto err_release_region; | |
077fceca TG |
922 | } |
923 | ||
924 | omap_voltage_get_volttable(sr_info->voltdm, &volt_data); | |
925 | if (!volt_data) { | |
926 | dev_warn(&pdev->dev, "%s: No Voltage table for the" | |
927 | " corresponding vdd vdd_%s. Cannot create debugfs" | |
928 | "entries for n-values\n", | |
929 | __func__, sr_info->voltdm->name); | |
b3329a33 SG |
930 | ret = -ENODATA; |
931 | goto err_release_region; | |
077fceca TG |
932 | } |
933 | ||
934 | for (i = 0; i < sr_info->nvalue_count; i++) { | |
865212ab | 935 | char name[NVALUE_NAME_LEN + 1]; |
077fceca | 936 | |
865212ab AK |
937 | snprintf(name, sizeof(name), "volt_%d", |
938 | volt_data[i].volt_nominal); | |
1232a185 | 939 | (void) debugfs_create_x32(name, S_IRUGO | S_IWUSR, nvalue_dir, |
077fceca TG |
940 | &(sr_info->nvalue_table[i].nvalue)); |
941 | } | |
984aa6db TG |
942 | |
943 | return ret; | |
944 | ||
945 | err_release_region: | |
946 | release_mem_region(mem->start, resource_size(mem)); | |
947 | err_free_devinfo: | |
948 | kfree(sr_info); | |
949 | ||
950 | return ret; | |
951 | } | |
952 | ||
953 | static int __devexit omap_sr_remove(struct platform_device *pdev) | |
954 | { | |
955 | struct omap_sr_data *pdata = pdev->dev.platform_data; | |
956 | struct omap_sr *sr_info; | |
957 | struct resource *mem; | |
958 | ||
959 | if (!pdata) { | |
960 | dev_err(&pdev->dev, "%s: platform data missing\n", __func__); | |
961 | return -EINVAL; | |
962 | } | |
963 | ||
964 | sr_info = _sr_lookup(pdata->voltdm); | |
28693ec0 | 965 | if (IS_ERR(sr_info)) { |
984aa6db TG |
966 | dev_warn(&pdev->dev, "%s: omap_sr struct not found\n", |
967 | __func__); | |
968 | return -EINVAL; | |
969 | } | |
970 | ||
971 | if (sr_info->autocomp_active) | |
972 | sr_stop_vddautocomp(sr_info); | |
973 | ||
974 | list_del(&sr_info->node); | |
975 | iounmap(sr_info->base); | |
976 | kfree(sr_info); | |
977 | mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
978 | release_mem_region(mem->start, resource_size(mem)); | |
979 | ||
980 | return 0; | |
981 | } | |
982 | ||
983 | static struct platform_driver smartreflex_driver = { | |
984 | .remove = omap_sr_remove, | |
985 | .driver = { | |
986 | .name = "smartreflex", | |
987 | }, | |
988 | }; | |
989 | ||
990 | static int __init sr_init(void) | |
991 | { | |
992 | int ret = 0; | |
993 | ||
994 | /* | |
995 | * sr_init is a late init. If by then a pmic specific API is not | |
996 | * registered either there is no need for anything to be done on | |
997 | * the PMIC side or somebody has forgotten to register a PMIC | |
998 | * handler. Warn for the second condition. | |
999 | */ | |
1000 | if (sr_pmic_data && sr_pmic_data->sr_pmic_init) | |
1001 | sr_pmic_data->sr_pmic_init(); | |
1002 | else | |
1003 | pr_warning("%s: No PMIC hook to init smartreflex\n", __func__); | |
1004 | ||
1005 | ret = platform_driver_probe(&smartreflex_driver, omap_sr_probe); | |
1006 | if (ret) { | |
1007 | pr_err("%s: platform driver register failed for SR\n", | |
1008 | __func__); | |
1009 | return ret; | |
1010 | } | |
1011 | ||
1012 | return 0; | |
1013 | } | |
1014 | ||
1015 | static void __exit sr_exit(void) | |
1016 | { | |
1017 | platform_driver_unregister(&smartreflex_driver); | |
1018 | } | |
1019 | late_initcall(sr_init); | |
1020 | module_exit(sr_exit); | |
1021 | ||
1022 | MODULE_DESCRIPTION("OMAP Smartreflex Driver"); | |
1023 | MODULE_LICENSE("GPL"); | |
1024 | MODULE_ALIAS("platform:" DRIVER_NAME); | |
1025 | MODULE_AUTHOR("Texas Instruments Inc"); |