projects / deliverable / linux.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
ARM: OMAP3+: SmartReflex Class3: disable errorgen before disable VP
[deliverable/linux.git] / arch / arm / mach-omap2 / smartreflex.c
CommitLineData
984aa6db
TG		 1/*
2 * OMAP SmartReflex Voltage Control
3 *
4 * Author: Thara Gopinath <thara@ti.com>
5 *
6 * Copyright (C) 2010 Texas Instruments, Inc.
7 * Thara Gopinath <thara@ti.com>
8 *
9 * Copyright (C) 2008 Nokia Corporation
10 * Kalle Jokiniemi
11 *
12 * Copyright (C) 2007 Texas Instruments, Inc.
13 * Lesly A M <x0080970@ti.com>
14 *
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License version 2 as
17 * published by the Free Software Foundation.
18 */
19
a1bcc1dc 20#include <linux/module.h>
984aa6db
TG		 21#include <linux/interrupt.h>
22#include <linux/clk.h>
23#include <linux/io.h>
24#include <linux/debugfs.h>
25#include <linux/delay.h>
26#include <linux/slab.h>
27#include <linux/pm_runtime.h>
28
4e65331c 29#include "common.h"
984aa6db
TG		 30
31#include "pm.h"
7328ff4d 32#include "smartreflex.h"
984aa6db
TG		 33
34#define SMARTREFLEX_NAME_LEN 16
077fceca 35#define NVALUE_NAME_LEN 40
984aa6db
TG		 36#define SR_DISABLE_TIMEOUT 200
37
38struct omap_sr {
39 int srid;
40 int ip_type;
41 int nvalue_count;
42 bool autocomp_active;
43 u32 clk_length;
44 u32 err_weight;
45 u32 err_minlimit;
46 u32 err_maxlimit;
47 u32 accum_data;
48 u32 senn_avgweight;
49 u32 senp_avgweight;
50 u32 senp_mod;
51 u32 senn_mod;
52 unsigned int irq;
53 void __iomem *base;
54 struct platform_device *pdev;
55 struct list_head node;
56 struct omap_sr_nvalue_table *nvalue_table;
57 struct voltagedomain *voltdm;
b1ace380 58 struct dentry *dbg_dir;
984aa6db
TG		 59};
60
61/* sr_list contains all the instances of smartreflex module */
62static LIST_HEAD(sr_list);
63
64static struct omap_sr_class_data *sr_class;
65static struct omap_sr_pmic_data *sr_pmic_data;
633ef8b7 66static struct dentry *sr_dbg_dir;
984aa6db
TG		 67
68static inline void sr_write_reg(struct omap_sr *sr, unsigned offset, u32 value)
69{
70 __raw_writel(value, (sr->base + offset));
71}
72
73static inline void sr_modify_reg(struct omap_sr *sr, unsigned offset, u32 mask,
74 u32 value)
75{
76 u32 reg_val;
77 u32 errconfig_offs = 0, errconfig_mask = 0;
78
79 reg_val = __raw_readl(sr->base + offset);
80 reg_val &= ~mask;
81
82 /*
83 * Smartreflex error config register is special as it contains
84 * certain status bits which if written a 1 into means a clear
85 * of those bits. So in order to make sure no accidental write of
86 * 1 happens to those status bits, do a clear of them in the read
87 * value. This mean this API doesn't rewrite values in these bits
88 * if they are currently set, but does allow the caller to write
89 * those bits.
90 */
91 if (sr->ip_type == SR_TYPE_V1) {
92 errconfig_offs = ERRCONFIG_V1;
93 errconfig_mask = ERRCONFIG_STATUS_V1_MASK;
94 } else if (sr->ip_type == SR_TYPE_V2) {
95 errconfig_offs = ERRCONFIG_V2;
96 errconfig_mask = ERRCONFIG_VPBOUNDINTST_V2;
97 }
98
99 if (offset == errconfig_offs)
100 reg_val &= ~errconfig_mask;
101
102 reg_val |= value;
103
104 __raw_writel(reg_val, (sr->base + offset));
105}
106
107static inline u32 sr_read_reg(struct omap_sr *sr, unsigned offset)
108{
109 return __raw_readl(sr->base + offset);
110}
111
112static struct omap_sr *_sr_lookup(struct voltagedomain *voltdm)
113{
114 struct omap_sr *sr_info;
115
116 if (!voltdm) {
117 pr_err("%s: Null voltage domain passed!\n", __func__);
118 return ERR_PTR(-EINVAL);
119 }
120
121 list_for_each_entry(sr_info, &sr_list, node) {
122 if (voltdm == sr_info->voltdm)
123 return sr_info;
124 }
125
126 return ERR_PTR(-ENODATA);
127}
128
129static irqreturn_t sr_interrupt(int irq, void *data)
130{
131 struct omap_sr *sr_info = (struct omap_sr *)data;
132 u32 status = 0;
133
134 if (sr_info->ip_type == SR_TYPE_V1) {
135 /* Read the status bits */
136 status = sr_read_reg(sr_info, ERRCONFIG_V1);
137
138 /* Clear them by writing back */
139 sr_write_reg(sr_info, ERRCONFIG_V1, status);
140 } else if (sr_info->ip_type == SR_TYPE_V2) {
141 /* Read the status bits */
5a4f1844 142 status = sr_read_reg(sr_info, IRQSTATUS);
984aa6db
TG		 143
144 /* Clear them by writing back */
145 sr_write_reg(sr_info, IRQSTATUS, status);
146 }
147
7a89afa8 148 if (sr_class->notify)
984aa6db
TG		 149 sr_class->notify(sr_info->voltdm, status);
150
151 return IRQ_HANDLED;
152}
153
154static void sr_set_clk_length(struct omap_sr *sr)
155{
156 struct clk *sys_ck;
157 u32 sys_clk_speed;
158
b35cecf9
TG		 159 if (cpu_is_omap34xx())
160 sys_ck = clk_get(NULL, "sys_ck");
161 else
162 sys_ck = clk_get(NULL, "sys_clkin_ck");
163
984aa6db
TG		 164 if (IS_ERR(sys_ck)) {
165 dev_err(&sr->pdev->dev, "%s: unable to get sys clk\n",
166 __func__);
167 return;
168 }
169 sys_clk_speed = clk_get_rate(sys_ck);
170 clk_put(sys_ck);
171
172 switch (sys_clk_speed) {
173 case 12000000:
174 sr->clk_length = SRCLKLENGTH_12MHZ_SYSCLK;
175 break;
176 case 13000000:
177 sr->clk_length = SRCLKLENGTH_13MHZ_SYSCLK;
178 break;
179 case 19200000:
180 sr->clk_length = SRCLKLENGTH_19MHZ_SYSCLK;
181 break;
182 case 26000000:
183 sr->clk_length = SRCLKLENGTH_26MHZ_SYSCLK;
184 break;
185 case 38400000:
186 sr->clk_length = SRCLKLENGTH_38MHZ_SYSCLK;
187 break;
188 default:
189 dev_err(&sr->pdev->dev, "%s: Invalid sysclk value: %d\n",
190 __func__, sys_clk_speed);
191 break;
192 }
193}
194
195static void sr_set_regfields(struct omap_sr *sr)
196{
197 /*
198 * For time being these values are defined in smartreflex.h
199 * and populated during init. May be they can be moved to board
200 * file or pmic specific data structure. In that case these structure
201 * fields will have to be populated using the pdata or pmic structure.
202 */
b35cecf9 203 if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
984aa6db
TG		 204 sr->err_weight = OMAP3430_SR_ERRWEIGHT;
205 sr->err_maxlimit = OMAP3430_SR_ERRMAXLIMIT;
206 sr->accum_data = OMAP3430_SR_ACCUMDATA;
207 if (!(strcmp(sr->voltdm->name, "mpu"))) {
208 sr->senn_avgweight = OMAP3430_SR1_SENNAVGWEIGHT;
209 sr->senp_avgweight = OMAP3430_SR1_SENPAVGWEIGHT;
210 } else {
211 sr->senn_avgweight = OMAP3430_SR2_SENNAVGWEIGHT;
212 sr->senp_avgweight = OMAP3430_SR2_SENPAVGWEIGHT;
213 }
214 }
215}
216
217static void sr_start_vddautocomp(struct omap_sr *sr)
218{
219 if (!sr_class || !(sr_class->enable) || !(sr_class->configure)) {
220 dev_warn(&sr->pdev->dev,
221 "%s: smartreflex class driver not registered\n",
222 __func__);
223 return;
224 }
225
226 if (!sr_class->enable(sr->voltdm))
227 sr->autocomp_active = true;
228}
229
230static void sr_stop_vddautocomp(struct omap_sr *sr)
231{
232 if (!sr_class || !(sr_class->disable)) {
233 dev_warn(&sr->pdev->dev,
234 "%s: smartreflex class driver not registered\n",
235 __func__);
236 return;
237 }
238
239 if (sr->autocomp_active) {
240 sr_class->disable(sr->voltdm, 1);
241 sr->autocomp_active = false;
242 }
243}
244
245/*
246 * This function handles the intializations which have to be done
247 * only when both sr device and class driver regiter has
248 * completed. This will be attempted to be called from both sr class
249 * driver register and sr device intializtion API's. Only one call
250 * will ultimately succeed.
251 *
fb914ebf 252 * Currently this function registers interrupt handler for a particular SR
984aa6db
TG		 253 * if smartreflex class driver is already registered and has
254 * requested for interrupts and the SR interrupt line in present.
255 */
256static int sr_late_init(struct omap_sr *sr_info)
257{
258 char *name;
259 struct omap_sr_data *pdata = sr_info->pdev->dev.platform_data;
260 struct resource *mem;
261 int ret = 0;
262
7a89afa8 263 if (sr_class->notify && sr_class->notify_flags && sr_info->irq) {
5c56f32e
VK		 264 name = kasprintf(GFP_KERNEL, "sr_%s", sr_info->voltdm->name);
265 if (name == NULL) {
266 ret = -ENOMEM;
267 goto error;
268 }
984aa6db
TG		 269 ret = request_irq(sr_info->irq, sr_interrupt,
270 0, name, (void *)sr_info);
271 if (ret)
272 goto error;
1279ba59 273 disable_irq(sr_info->irq);
984aa6db
TG		 274 }
275
276 if (pdata && pdata->enable_on_init)
277 sr_start_vddautocomp(sr_info);
278
279 return ret;
280
281error:
442155ad
NM		 282 iounmap(sr_info->base);
283 mem = platform_get_resource(sr_info->pdev, IORESOURCE_MEM, 0);
284 release_mem_region(mem->start, resource_size(mem));
285 list_del(&sr_info->node);
286 dev_err(&sr_info->pdev->dev, "%s: ERROR in registering"
287 "interrupt handler. Smartreflex will"
288 "not function as desired\n", __func__);
289 kfree(name);
290 kfree(sr_info);
291 return ret;
984aa6db
TG		 292}
293
294static void sr_v1_disable(struct omap_sr *sr)
295{
296 int timeout = 0;
297
298 /* Enable MCUDisableAcknowledge interrupt */
299 sr_modify_reg(sr, ERRCONFIG_V1,
300 ERRCONFIG_MCUDISACKINTEN, ERRCONFIG_MCUDISACKINTEN);
301
302 /* SRCONFIG - disable SR */
303 sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, 0x0);
304
305 /* Disable all other SR interrupts and clear the status */
306 sr_modify_reg(sr, ERRCONFIG_V1,
307 (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUVALIDINTEN |
308 ERRCONFIG_MCUBOUNDINTEN | ERRCONFIG_VPBOUNDINTEN_V1),
309 (ERRCONFIG_MCUACCUMINTST | ERRCONFIG_MCUVALIDINTST |
310 ERRCONFIG_MCUBOUNDINTST |
311 ERRCONFIG_VPBOUNDINTST_V1));
312
313 /*
314 * Wait for SR to be disabled.
315 * wait until ERRCONFIG.MCUDISACKINTST = 1. Typical latency is 1us.
316 */
317 omap_test_timeout((sr_read_reg(sr, ERRCONFIG_V1) &
318 ERRCONFIG_MCUDISACKINTST), SR_DISABLE_TIMEOUT,
319 timeout);
320
321 if (timeout >= SR_DISABLE_TIMEOUT)
322 dev_warn(&sr->pdev->dev, "%s: Smartreflex disable timedout\n",
323 __func__);
324
325 /* Disable MCUDisableAcknowledge interrupt & clear pending interrupt */
326 sr_modify_reg(sr, ERRCONFIG_V1, ERRCONFIG_MCUDISACKINTEN,
327 ERRCONFIG_MCUDISACKINTST);
328}
329
330static void sr_v2_disable(struct omap_sr *sr)
331{
332 int timeout = 0;
333
334 /* Enable MCUDisableAcknowledge interrupt */
335 sr_write_reg(sr, IRQENABLE_SET, IRQENABLE_MCUDISABLEACKINT);
336
337 /* SRCONFIG - disable SR */
338 sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, 0x0);
339
340 /* Disable all other SR interrupts and clear the status */
341 sr_modify_reg(sr, ERRCONFIG_V2, ERRCONFIG_VPBOUNDINTEN_V2,
342 ERRCONFIG_VPBOUNDINTST_V2);
343 sr_write_reg(sr, IRQENABLE_CLR, (IRQENABLE_MCUACCUMINT |
344 IRQENABLE_MCUVALIDINT |
345 IRQENABLE_MCUBOUNDSINT));
346 sr_write_reg(sr, IRQSTATUS, (IRQSTATUS_MCUACCUMINT |
347 IRQSTATUS_MCVALIDINT |
348 IRQSTATUS_MCBOUNDSINT));
349
350 /*
351 * Wait for SR to be disabled.
352 * wait until IRQSTATUS.MCUDISACKINTST = 1. Typical latency is 1us.
353 */
354 omap_test_timeout((sr_read_reg(sr, IRQSTATUS) &
355 IRQSTATUS_MCUDISABLEACKINT), SR_DISABLE_TIMEOUT,
356 timeout);
357
358 if (timeout >= SR_DISABLE_TIMEOUT)
359 dev_warn(&sr->pdev->dev, "%s: Smartreflex disable timedout\n",
360 __func__);
361
362 /* Disable MCUDisableAcknowledge interrupt & clear pending interrupt */
363 sr_write_reg(sr, IRQENABLE_CLR, IRQENABLE_MCUDISABLEACKINT);
364 sr_write_reg(sr, IRQSTATUS, IRQSTATUS_MCUDISABLEACKINT);
365}
366
367static u32 sr_retrieve_nvalue(struct omap_sr *sr, u32 efuse_offs)
368{
369 int i;
370
371 if (!sr->nvalue_table) {
372 dev_warn(&sr->pdev->dev, "%s: Missing ntarget value table\n",
373 __func__);
374 return 0;
375 }
376
377 for (i = 0; i < sr->nvalue_count; i++) {
378 if (sr->nvalue_table[i].efuse_offs == efuse_offs)
379 return sr->nvalue_table[i].nvalue;
380 }
381
382 return 0;
383}
384
385/* Public Functions */
386
387/**
388 * sr_configure_errgen() - Configures the smrtreflex to perform AVS using the
389 * error generator module.
390 * @voltdm: VDD pointer to which the SR module to be configured belongs to.
391 *
392 * This API is to be called from the smartreflex class driver to
393 * configure the error generator module inside the smartreflex module.
394 * SR settings if using the ERROR module inside Smartreflex.
395 * SR CLASS 3 by default uses only the ERROR module where as
396 * SR CLASS 2 can choose between ERROR module and MINMAXAVG
397 * module. Returns 0 on success and error value in case of failure.
398 */
399int sr_configure_errgen(struct voltagedomain *voltdm)
400{
401 u32 sr_config, sr_errconfig, errconfig_offs, vpboundint_en;
402 u32 vpboundint_st, senp_en = 0, senn_en = 0;
403 u8 senp_shift, senn_shift;
404 struct omap_sr *sr = _sr_lookup(voltdm);
405
406 if (IS_ERR(sr)) {
407 pr_warning("%s: omap_sr struct for sr_%s not found\n",
408 __func__, voltdm->name);
409 return -EINVAL;
410 }
411
412 if (!sr->clk_length)
413 sr_set_clk_length(sr);
414
415 senp_en = sr->senp_mod;
416 senn_en = sr->senn_mod;
417
418 sr_config = (sr->clk_length << SRCONFIG_SRCLKLENGTH_SHIFT) |
419 SRCONFIG_SENENABLE | SRCONFIG_ERRGEN_EN;
420
421 if (sr->ip_type == SR_TYPE_V1) {
422 sr_config |= SRCONFIG_DELAYCTRL;
423 senn_shift = SRCONFIG_SENNENABLE_V1_SHIFT;
424 senp_shift = SRCONFIG_SENPENABLE_V1_SHIFT;
425 errconfig_offs = ERRCONFIG_V1;
426 vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V1;
427 vpboundint_st = ERRCONFIG_VPBOUNDINTST_V1;
428 } else if (sr->ip_type == SR_TYPE_V2) {
429 senn_shift = SRCONFIG_SENNENABLE_V2_SHIFT;
430 senp_shift = SRCONFIG_SENPENABLE_V2_SHIFT;
431 errconfig_offs = ERRCONFIG_V2;
432 vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V2;
433 vpboundint_st = ERRCONFIG_VPBOUNDINTST_V2;
434 } else {
435 dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex"
436 "module without specifying the ip\n", __func__);
437 return -EINVAL;
438 }
439
440 sr_config |= ((senn_en << senn_shift) | (senp_en << senp_shift));
441 sr_write_reg(sr, SRCONFIG, sr_config);
442 sr_errconfig = (sr->err_weight << ERRCONFIG_ERRWEIGHT_SHIFT) |
443 (sr->err_maxlimit << ERRCONFIG_ERRMAXLIMIT_SHIFT) |
444 (sr->err_minlimit << ERRCONFIG_ERRMINLIMIT_SHIFT);
445 sr_modify_reg(sr, errconfig_offs, (SR_ERRWEIGHT_MASK |
446 SR_ERRMAXLIMIT_MASK | SR_ERRMINLIMIT_MASK),
447 sr_errconfig);
448
449 /* Enabling the interrupts if the ERROR module is used */
74754cc5
NM		 450 sr_modify_reg(sr, errconfig_offs, (vpboundint_en | vpboundint_st),
451 vpboundint_en);
984aa6db
TG		 452
453 return 0;
454}
455
ad54c3dd
NM		 456/**
457 * sr_disable_errgen() - Disables SmartReflex AVS module's errgen component
458 * @voltdm: VDD pointer to which the SR module to be configured belongs to.
459 *
460 * This API is to be called from the smartreflex class driver to
461 * disable the error generator module inside the smartreflex module.
462 *
463 * Returns 0 on success and error value in case of failure.
464 */
465int sr_disable_errgen(struct voltagedomain *voltdm)
466{
467 u32 errconfig_offs, vpboundint_en;
468 u32 vpboundint_st;
469 struct omap_sr *sr = _sr_lookup(voltdm);
470
471 if (IS_ERR(sr)) {
472 pr_warning("%s: omap_sr struct for sr_%s not found\n",
473 __func__, voltdm->name);
474 return -EINVAL;
475 }
476
477 if (sr->ip_type == SR_TYPE_V1) {
478 errconfig_offs = ERRCONFIG_V1;
479 vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V1;
480 vpboundint_st = ERRCONFIG_VPBOUNDINTST_V1;
481 } else if (sr->ip_type == SR_TYPE_V2) {
482 errconfig_offs = ERRCONFIG_V2;
483 vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V2;
484 vpboundint_st = ERRCONFIG_VPBOUNDINTST_V2;
485 } else {
486 dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex"
487 "module without specifying the ip\n", __func__);
488 return -EINVAL;
489 }
490
491 /* Disable the interrupts of ERROR module */
492 sr_modify_reg(sr, errconfig_offs, vpboundint_en | vpboundint_st, 0);
493
494 /* Disable the Sensor and errorgen */
495 sr_modify_reg(sr, SRCONFIG, SRCONFIG_SENENABLE | SRCONFIG_ERRGEN_EN, 0);
496
497 return 0;
498}
499
984aa6db
TG		 500/**
501 * sr_configure_minmax() - Configures the smrtreflex to perform AVS using the
502 * minmaxavg module.
503 * @voltdm: VDD pointer to which the SR module to be configured belongs to.
504 *
505 * This API is to be called from the smartreflex class driver to
506 * configure the minmaxavg module inside the smartreflex module.
507 * SR settings if using the ERROR module inside Smartreflex.
508 * SR CLASS 3 by default uses only the ERROR module where as
509 * SR CLASS 2 can choose between ERROR module and MINMAXAVG
510 * module. Returns 0 on success and error value in case of failure.
511 */
512int sr_configure_minmax(struct voltagedomain *voltdm)
513{
514 u32 sr_config, sr_avgwt;
515 u32 senp_en = 0, senn_en = 0;
516 u8 senp_shift, senn_shift;
517 struct omap_sr *sr = _sr_lookup(voltdm);
518
519 if (IS_ERR(sr)) {
520 pr_warning("%s: omap_sr struct for sr_%s not found\n",
521 __func__, voltdm->name);
522 return -EINVAL;
523 }
524
525 if (!sr->clk_length)
526 sr_set_clk_length(sr);
527
528 senp_en = sr->senp_mod;
529 senn_en = sr->senn_mod;
530
531 sr_config = (sr->clk_length << SRCONFIG_SRCLKLENGTH_SHIFT) |
532 SRCONFIG_SENENABLE |
533 (sr->accum_data << SRCONFIG_ACCUMDATA_SHIFT);
534
535 if (sr->ip_type == SR_TYPE_V1) {
536 sr_config |= SRCONFIG_DELAYCTRL;
537 senn_shift = SRCONFIG_SENNENABLE_V1_SHIFT;
538 senp_shift = SRCONFIG_SENPENABLE_V1_SHIFT;
539 } else if (sr->ip_type == SR_TYPE_V2) {
540 senn_shift = SRCONFIG_SENNENABLE_V2_SHIFT;
541 senp_shift = SRCONFIG_SENPENABLE_V2_SHIFT;
542 } else {
543 dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex"
544 "module without specifying the ip\n", __func__);
545 return -EINVAL;
546 }
547
548 sr_config |= ((senn_en << senn_shift) | (senp_en << senp_shift));
549 sr_write_reg(sr, SRCONFIG, sr_config);
550 sr_avgwt = (sr->senp_avgweight << AVGWEIGHT_SENPAVGWEIGHT_SHIFT) |
551 (sr->senn_avgweight << AVGWEIGHT_SENNAVGWEIGHT_SHIFT);
552 sr_write_reg(sr, AVGWEIGHT, sr_avgwt);
553
554 /*
555 * Enabling the interrupts if MINMAXAVG module is used.
556 * TODO: check if all the interrupts are mandatory
557 */
558 if (sr->ip_type == SR_TYPE_V1) {
559 sr_modify_reg(sr, ERRCONFIG_V1,
560 (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUVALIDINTEN |
561 ERRCONFIG_MCUBOUNDINTEN),
562 (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUACCUMINTST |
563 ERRCONFIG_MCUVALIDINTEN | ERRCONFIG_MCUVALIDINTST |
564 ERRCONFIG_MCUBOUNDINTEN | ERRCONFIG_MCUBOUNDINTST));
565 } else if (sr->ip_type == SR_TYPE_V2) {
566 sr_write_reg(sr, IRQSTATUS,
567 IRQSTATUS_MCUACCUMINT | IRQSTATUS_MCVALIDINT |
568 IRQSTATUS_MCBOUNDSINT | IRQSTATUS_MCUDISABLEACKINT);
569 sr_write_reg(sr, IRQENABLE_SET,
570 IRQENABLE_MCUACCUMINT | IRQENABLE_MCUVALIDINT |
571 IRQENABLE_MCUBOUNDSINT | IRQENABLE_MCUDISABLEACKINT);
572 }
573
574 return 0;
575}
576
577/**
578 * sr_enable() - Enables the smartreflex module.
579 * @voltdm: VDD pointer to which the SR module to be configured belongs to.
580 * @volt: The voltage at which the Voltage domain associated with
581 * the smartreflex module is operating at.
582 * This is required only to program the correct Ntarget value.
583 *
584 * This API is to be called from the smartreflex class driver to
585 * enable a smartreflex module. Returns 0 on success. Returns error
586 * value if the voltage passed is wrong or if ntarget value is wrong.
587 */
588int sr_enable(struct voltagedomain *voltdm, unsigned long volt)
589{
590 u32 nvalue_reciprocal;
591 struct omap_volt_data *volt_data;
592 struct omap_sr *sr = _sr_lookup(voltdm);
593 int ret;
594
595 if (IS_ERR(sr)) {
596 pr_warning("%s: omap_sr struct for sr_%s not found\n",
597 __func__, voltdm->name);
598 return -EINVAL;
599 }
600
601 volt_data = omap_voltage_get_voltdata(sr->voltdm, volt);
602
603 if (IS_ERR(volt_data)) {
604 dev_warn(&sr->pdev->dev, "%s: Unable to get voltage table"
605 "for nominal voltage %ld\n", __func__, volt);
606 return -ENODATA;
607 }
608
609 nvalue_reciprocal = sr_retrieve_nvalue(sr, volt_data->sr_efuse_offs);
610
611 if (!nvalue_reciprocal) {
612 dev_warn(&sr->pdev->dev, "%s: NVALUE = 0 at voltage %ld\n",
613 __func__, volt);
614 return -ENODATA;
615 }
616
617 /* errminlimit is opp dependent and hence linked to voltage */
618 sr->err_minlimit = volt_data->sr_errminlimit;
619
620 pm_runtime_get_sync(&sr->pdev->dev);
621
622 /* Check if SR is already enabled. If yes do nothing */
623 if (sr_read_reg(sr, SRCONFIG) & SRCONFIG_SRENABLE)
624 return 0;
625
626 /* Configure SR */
627 ret = sr_class->configure(voltdm);
628 if (ret)
629 return ret;
630
631 sr_write_reg(sr, NVALUERECIPROCAL, nvalue_reciprocal);
632
633 /* SRCONFIG - enable SR */
634 sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, SRCONFIG_SRENABLE);
635 return 0;
636}
637
638/**
639 * sr_disable() - Disables the smartreflex module.
640 * @voltdm: VDD pointer to which the SR module to be configured belongs to.
641 *
642 * This API is to be called from the smartreflex class driver to
643 * disable a smartreflex module.
644 */
645void sr_disable(struct voltagedomain *voltdm)
646{
647 struct omap_sr *sr = _sr_lookup(voltdm);
648
649 if (IS_ERR(sr)) {
650 pr_warning("%s: omap_sr struct for sr_%s not found\n",
651 __func__, voltdm->name);
652 return;
653 }
654
655 /* Check if SR clocks are already disabled. If yes do nothing */
656 if (pm_runtime_suspended(&sr->pdev->dev))
657 return;
658
659 /*
660 * Disable SR if only it is indeed enabled. Else just
661 * disable the clocks.
662 */
663 if (sr_read_reg(sr, SRCONFIG) & SRCONFIG_SRENABLE) {
664 if (sr->ip_type == SR_TYPE_V1)
665 sr_v1_disable(sr);
666 else if (sr->ip_type == SR_TYPE_V2)
667 sr_v2_disable(sr);
668 }
669
98333b3d 670 pm_runtime_put_sync_suspend(&sr->pdev->dev);
984aa6db
TG		 671}
672
673/**
674 * sr_register_class() - API to register a smartreflex class parameters.
675 * @class_data: The structure containing various sr class specific data.
676 *
677 * This API is to be called by the smartreflex class driver to register itself
678 * with the smartreflex driver during init. Returns 0 on success else the
679 * error value.
680 */
681int sr_register_class(struct omap_sr_class_data *class_data)
682{
683 struct omap_sr *sr_info;
684
685 if (!class_data) {
686 pr_warning("%s:, Smartreflex class data passed is NULL\n",
687 __func__);
688 return -EINVAL;
689 }
690
691 if (sr_class) {
692 pr_warning("%s: Smartreflex class driver already registered\n",
693 __func__);
694 return -EBUSY;
695 }
696
697 sr_class = class_data;
698
699 /*
700 * Call into late init to do intializations that require
701 * both sr driver and sr class driver to be initiallized.
702 */
703 list_for_each_entry(sr_info, &sr_list, node)
704 sr_late_init(sr_info);
705
706 return 0;
707}
708
709/**
710 * omap_sr_enable() - API to enable SR clocks and to call into the
711 * registered smartreflex class enable API.
712 * @voltdm: VDD pointer to which the SR module to be configured belongs to.
713 *
714 * This API is to be called from the kernel in order to enable
715 * a particular smartreflex module. This API will do the initial
716 * configurations to turn on the smartreflex module and in turn call
717 * into the registered smartreflex class enable API.
718 */
719void omap_sr_enable(struct voltagedomain *voltdm)
720{
721 struct omap_sr *sr = _sr_lookup(voltdm);
722
723 if (IS_ERR(sr)) {
724 pr_warning("%s: omap_sr struct for sr_%s not found\n",
725 __func__, voltdm->name);
726 return;
727 }
728
729 if (!sr->autocomp_active)
730 return;
731
732 if (!sr_class || !(sr_class->enable) || !(sr_class->configure)) {
733 dev_warn(&sr->pdev->dev, "%s: smartreflex class driver not"
734 "registered\n", __func__);
735 return;
736 }
737
738 sr_class->enable(voltdm);
739}
740
741/**
742 * omap_sr_disable() - API to disable SR without resetting the voltage
743 * processor voltage
744 * @voltdm: VDD pointer to which the SR module to be configured belongs to.
745 *
746 * This API is to be called from the kernel in order to disable
747 * a particular smartreflex module. This API will in turn call
748 * into the registered smartreflex class disable API. This API will tell
749 * the smartreflex class disable not to reset the VP voltage after
750 * disabling smartreflex.
751 */
752void omap_sr_disable(struct voltagedomain *voltdm)
753{
754 struct omap_sr *sr = _sr_lookup(voltdm);
755
756 if (IS_ERR(sr)) {
757 pr_warning("%s: omap_sr struct for sr_%s not found\n",
758 __func__, voltdm->name);
759 return;
760 }
761
762 if (!sr->autocomp_active)
763 return;
764
765 if (!sr_class || !(sr_class->disable)) {
766 dev_warn(&sr->pdev->dev, "%s: smartreflex class driver not"
767 "registered\n", __func__);
768 return;
769 }
770
771 sr_class->disable(voltdm, 0);
772}
773
774/**
775 * omap_sr_disable_reset_volt() - API to disable SR and reset the
776 * voltage processor voltage
777 * @voltdm: VDD pointer to which the SR module to be configured belongs to.
778 *
779 * This API is to be called from the kernel in order to disable
780 * a particular smartreflex module. This API will in turn call
781 * into the registered smartreflex class disable API. This API will tell
782 * the smartreflex class disable to reset the VP voltage after
783 * disabling smartreflex.
784 */
785void omap_sr_disable_reset_volt(struct voltagedomain *voltdm)
786{
787 struct omap_sr *sr = _sr_lookup(voltdm);
788
789 if (IS_ERR(sr)) {
790 pr_warning("%s: omap_sr struct for sr_%s not found\n",
791 __func__, voltdm->name);
792 return;
793 }
794
795 if (!sr->autocomp_active)
796 return;
797
798 if (!sr_class || !(sr_class->disable)) {
799 dev_warn(&sr->pdev->dev, "%s: smartreflex class driver not"
800 "registered\n", __func__);
801 return;
802 }
803
804 sr_class->disable(voltdm, 1);
805}
806
807/**
808 * omap_sr_register_pmic() - API to register pmic specific info.
809 * @pmic_data: The structure containing pmic specific data.
810 *
811 * This API is to be called from the PMIC specific code to register with
812 * smartreflex driver pmic specific info. Currently the only info required
813 * is the smartreflex init on the PMIC side.
814 */
815void omap_sr_register_pmic(struct omap_sr_pmic_data *pmic_data)
816{
817 if (!pmic_data) {
818 pr_warning("%s: Trying to register NULL PMIC data structure"
819 "with smartreflex\n", __func__);
820 return;
821 }
822
823 sr_pmic_data = pmic_data;
824}
825
826/* PM Debug Fs enteries to enable disable smartreflex. */
827static int omap_sr_autocomp_show(void *data, u64 *val)
828{
829 struct omap_sr *sr_info = (struct omap_sr *) data;
830
831 if (!sr_info) {
8353584e 832 pr_warning("%s: omap_sr struct not found\n", __func__);
984aa6db
TG		 833 return -EINVAL;
834 }
835
836 *val = sr_info->autocomp_active;
837
838 return 0;
839}
840
841static int omap_sr_autocomp_store(void *data, u64 val)
842{
843 struct omap_sr *sr_info = (struct omap_sr *) data;
844
845 if (!sr_info) {
8353584e 846 pr_warning("%s: omap_sr struct not found\n", __func__);
984aa6db
TG		 847 return -EINVAL;
848 }
849
850 /* Sanity check */
851 if (val && (val != 1)) {
852 pr_warning("%s: Invalid argument %lld\n", __func__, val);
853 return -EINVAL;
854 }
855
ac77a6f7
NM		 856 /* control enable/disable only if there is a delta in value */
857 if (sr_info->autocomp_active != val) {
858 if (!val)
859 sr_stop_vddautocomp(sr_info);
860 else
861 sr_start_vddautocomp(sr_info);
862 }
984aa6db
TG		 863
864 return 0;
865}
866
867DEFINE_SIMPLE_ATTRIBUTE(pm_sr_fops, omap_sr_autocomp_show,
868 omap_sr_autocomp_store, "%llu\n");
869
870static int __init omap_sr_probe(struct platform_device *pdev)
871{
872 struct omap_sr *sr_info = kzalloc(sizeof(struct omap_sr), GFP_KERNEL);
873 struct omap_sr_data *pdata = pdev->dev.platform_data;
874 struct resource *mem, *irq;
633ef8b7 875 struct dentry *nvalue_dir;
077fceca
TG		 876 struct omap_volt_data *volt_data;
877 int i, ret = 0;
633ef8b7 878 char *name;
984aa6db
TG		 879
880 if (!sr_info) {
881 dev_err(&pdev->dev, "%s: unable to allocate sr_info\n",
882 __func__);
883 return -ENOMEM;
884 }
885
886 if (!pdata) {
887 dev_err(&pdev->dev, "%s: platform data missing\n", __func__);
720bc782
SW		 888 ret = -EINVAL;
889 goto err_free_devinfo;
984aa6db
TG		 890 }
891
892 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
893 if (!mem) {
894 dev_err(&pdev->dev, "%s: no mem resource\n", __func__);
895 ret = -ENODEV;
896 goto err_free_devinfo;
897 }
898
da9e7392
AK		 899 mem = request_mem_region(mem->start, resource_size(mem),
900 dev_name(&pdev->dev));
901 if (!mem) {
902 dev_err(&pdev->dev, "%s: no mem region\n", __func__);
903 ret = -EBUSY;
904 goto err_free_devinfo;
905 }
906
984aa6db
TG		 907 irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
908
909 pm_runtime_enable(&pdev->dev);
e13d8f38 910 pm_runtime_irq_safe(&pdev->dev);
984aa6db
TG		 911
912 sr_info->pdev = pdev;
913 sr_info->srid = pdev->id;
914 sr_info->voltdm = pdata->voltdm;
915 sr_info->nvalue_table = pdata->nvalue_table;
916 sr_info->nvalue_count = pdata->nvalue_count;
917 sr_info->senn_mod = pdata->senn_mod;
918 sr_info->senp_mod = pdata->senp_mod;
919 sr_info->autocomp_active = false;
920 sr_info->ip_type = pdata->ip_type;
921 sr_info->base = ioremap(mem->start, resource_size(mem));
922 if (!sr_info->base) {
923 dev_err(&pdev->dev, "%s: ioremap fail\n", __func__);
924 ret = -ENOMEM;
925 goto err_release_region;
926 }
927
928 if (irq)
929 sr_info->irq = irq->start;
930
931 sr_set_clk_length(sr_info);
932 sr_set_regfields(sr_info);
933
934 list_add(&sr_info->node, &sr_list);
935
936 /*
937 * Call into late init to do intializations that require
938 * both sr driver and sr class driver to be initiallized.
939 */
940 if (sr_class) {
941 ret = sr_late_init(sr_info);
942 if (ret) {
943 pr_warning("%s: Error in SR late init\n", __func__);
14ea9601 944 goto err_iounmap;
984aa6db
TG		 945 }
946 }
947
948 dev_info(&pdev->dev, "%s: SmartReflex driver initialized\n", __func__);
633ef8b7
KH		 949 if (!sr_dbg_dir) {
950 sr_dbg_dir = debugfs_create_dir("smartreflex", NULL);
951 if (!sr_dbg_dir) {
952 ret = PTR_ERR(sr_dbg_dir);
953 pr_err("%s:sr debugfs dir creation failed(%d)\n",
954 __func__, ret);
955 goto err_iounmap;
956 }
957 }
984aa6db 958
633ef8b7
KH		 959 name = kasprintf(GFP_KERNEL, "sr_%s", sr_info->voltdm->name);
960 if (!name) {
961 dev_err(&pdev->dev, "%s: Unable to alloc debugfs name\n",
962 __func__);
963 ret = -ENOMEM;
0c49cc16 964 goto err_iounmap;
b3329a33 965 }
633ef8b7
KH		 966 sr_info->dbg_dir = debugfs_create_dir(name, sr_dbg_dir);
967 kfree(name);
b1ace380 968 if (IS_ERR(sr_info->dbg_dir)) {
984aa6db
TG		 969 dev_err(&pdev->dev, "%s: Unable to create debugfs directory\n",
970 __func__);
b1ace380 971 ret = PTR_ERR(sr_info->dbg_dir);
0c49cc16 972 goto err_iounmap;
984aa6db
TG		 973 }
974
b1ace380
AS		 975 (void) debugfs_create_file("autocomp", S_IRUGO | S_IWUSR,
976 sr_info->dbg_dir, (void *)sr_info, &pm_sr_fops);
977 (void) debugfs_create_x32("errweight", S_IRUGO, sr_info->dbg_dir,
077fceca 978 &sr_info->err_weight);
b1ace380 979 (void) debugfs_create_x32("errmaxlimit", S_IRUGO, sr_info->dbg_dir,
077fceca 980 &sr_info->err_maxlimit);
b1ace380 981 (void) debugfs_create_x32("errminlimit", S_IRUGO, sr_info->dbg_dir,
077fceca
TG		 982 &sr_info->err_minlimit);
983
b1ace380 984 nvalue_dir = debugfs_create_dir("nvalue", sr_info->dbg_dir);
077fceca
TG		 985 if (IS_ERR(nvalue_dir)) {
986 dev_err(&pdev->dev, "%s: Unable to create debugfs directory"
987 "for n-values\n", __func__);
b3329a33 988 ret = PTR_ERR(nvalue_dir);
283a1c1f 989 goto err_debugfs;
077fceca
TG		 990 }
991
992 omap_voltage_get_volttable(sr_info->voltdm, &volt_data);
993 if (!volt_data) {
994 dev_warn(&pdev->dev, "%s: No Voltage table for the"
995 " corresponding vdd vdd_%s. Cannot create debugfs"
996 "entries for n-values\n",
997 __func__, sr_info->voltdm->name);
b3329a33 998 ret = -ENODATA;
283a1c1f 999 goto err_debugfs;
077fceca
TG		 1000 }
1001
1002 for (i = 0; i < sr_info->nvalue_count; i++) {
865212ab 1003 char name[NVALUE_NAME_LEN + 1];
077fceca 1004
865212ab
AK		 1005 snprintf(name, sizeof(name), "volt_%d",
1006 volt_data[i].volt_nominal);
1232a185 1007 (void) debugfs_create_x32(name, S_IRUGO | S_IWUSR, nvalue_dir,
077fceca
TG		 1008 &(sr_info->nvalue_table[i].nvalue));
1009 }
984aa6db
TG		 1010
1011 return ret;
1012
283a1c1f
AK		 1013err_debugfs:
1014 debugfs_remove_recursive(sr_info->dbg_dir);
0c49cc16 1015err_iounmap:
833d78fc 1016 list_del(&sr_info->node);
0c49cc16 1017 iounmap(sr_info->base);
984aa6db
TG		 1018err_release_region:
1019 release_mem_region(mem->start, resource_size(mem));
1020err_free_devinfo:
1021 kfree(sr_info);
1022
1023 return ret;
1024}
1025
1026static int __devexit omap_sr_remove(struct platform_device *pdev)
1027{
1028 struct omap_sr_data *pdata = pdev->dev.platform_data;
1029 struct omap_sr *sr_info;
1030 struct resource *mem;
1031
1032 if (!pdata) {
1033 dev_err(&pdev->dev, "%s: platform data missing\n", __func__);
1034 return -EINVAL;
1035 }
1036
1037 sr_info = _sr_lookup(pdata->voltdm);
28693ec0 1038 if (IS_ERR(sr_info)) {
984aa6db
TG		 1039 dev_warn(&pdev->dev, "%s: omap_sr struct not found\n",
1040 __func__);
1041 return -EINVAL;
1042 }
1043
1044 if (sr_info->autocomp_active)
1045 sr_stop_vddautocomp(sr_info);
b1ace380
AS		 1046 if (sr_info->dbg_dir)
1047 debugfs_remove_recursive(sr_info->dbg_dir);
984aa6db
TG		 1048
1049 list_del(&sr_info->node);
1050 iounmap(sr_info->base);
1051 kfree(sr_info);
1052 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1053 release_mem_region(mem->start, resource_size(mem));
1054
1055 return 0;
1056}
1057
1058static struct platform_driver smartreflex_driver = {
149f1d5c 1059 .remove = __devexit_p(omap_sr_remove),
984aa6db
TG		 1060 .driver = {
1061 .name = "smartreflex",
1062 },
1063};
1064
1065static int __init sr_init(void)
1066{
1067 int ret = 0;
1068
1069 /*
1070 * sr_init is a late init. If by then a pmic specific API is not
1071 * registered either there is no need for anything to be done on
1072 * the PMIC side or somebody has forgotten to register a PMIC
1073 * handler. Warn for the second condition.
1074 */
1075 if (sr_pmic_data && sr_pmic_data->sr_pmic_init)
1076 sr_pmic_data->sr_pmic_init();
1077 else
1078 pr_warning("%s: No PMIC hook to init smartreflex\n", __func__);
1079
1080 ret = platform_driver_probe(&smartreflex_driver, omap_sr_probe);
1081 if (ret) {
1082 pr_err("%s: platform driver register failed for SR\n",
1083 __func__);
1084 return ret;
1085 }
1086
1087 return 0;
1088}
1089
1090static void __exit sr_exit(void)
1091{
1092 platform_driver_unregister(&smartreflex_driver);
1093}
1094late_initcall(sr_init);
1095module_exit(sr_exit);
1096
1097MODULE_DESCRIPTION("OMAP Smartreflex Driver");
1098MODULE_LICENSE("GPL");
1099MODULE_ALIAS("platform:" DRIVER_NAME);
1100MODULE_AUTHOR("Texas Instruments Inc");
Linux kernel - Deliverables
This page took 0.146674 seconds and 5 git commands to generate.