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984aa6db TG |
1 | /* |
2 | * OMAP SmartReflex Voltage Control | |
3 | * | |
4 | * Author: Thara Gopinath <thara@ti.com> | |
5 | * | |
6 | * Copyright (C) 2010 Texas Instruments, Inc. | |
7 | * Thara Gopinath <thara@ti.com> | |
8 | * | |
9 | * Copyright (C) 2008 Nokia Corporation | |
10 | * Kalle Jokiniemi | |
11 | * | |
12 | * Copyright (C) 2007 Texas Instruments, Inc. | |
13 | * Lesly A M <x0080970@ti.com> | |
14 | * | |
15 | * This program is free software; you can redistribute it and/or modify | |
16 | * it under the terms of the GNU General Public License version 2 as | |
17 | * published by the Free Software Foundation. | |
18 | */ | |
19 | ||
a1bcc1dc | 20 | #include <linux/module.h> |
984aa6db TG |
21 | #include <linux/interrupt.h> |
22 | #include <linux/clk.h> | |
23 | #include <linux/io.h> | |
24 | #include <linux/debugfs.h> | |
25 | #include <linux/delay.h> | |
26 | #include <linux/slab.h> | |
27 | #include <linux/pm_runtime.h> | |
28 | ||
4e65331c | 29 | #include "common.h" |
984aa6db TG |
30 | |
31 | #include "pm.h" | |
7328ff4d | 32 | #include "smartreflex.h" |
984aa6db TG |
33 | |
34 | #define SMARTREFLEX_NAME_LEN 16 | |
077fceca | 35 | #define NVALUE_NAME_LEN 40 |
984aa6db TG |
36 | #define SR_DISABLE_TIMEOUT 200 |
37 | ||
38 | struct omap_sr { | |
39 | int srid; | |
40 | int ip_type; | |
41 | int nvalue_count; | |
42 | bool autocomp_active; | |
43 | u32 clk_length; | |
44 | u32 err_weight; | |
45 | u32 err_minlimit; | |
46 | u32 err_maxlimit; | |
47 | u32 accum_data; | |
48 | u32 senn_avgweight; | |
49 | u32 senp_avgweight; | |
50 | u32 senp_mod; | |
51 | u32 senn_mod; | |
52 | unsigned int irq; | |
53 | void __iomem *base; | |
54 | struct platform_device *pdev; | |
55 | struct list_head node; | |
56 | struct omap_sr_nvalue_table *nvalue_table; | |
57 | struct voltagedomain *voltdm; | |
b1ace380 | 58 | struct dentry *dbg_dir; |
984aa6db TG |
59 | }; |
60 | ||
61 | /* sr_list contains all the instances of smartreflex module */ | |
62 | static LIST_HEAD(sr_list); | |
63 | ||
64 | static struct omap_sr_class_data *sr_class; | |
65 | static struct omap_sr_pmic_data *sr_pmic_data; | |
633ef8b7 | 66 | static struct dentry *sr_dbg_dir; |
984aa6db TG |
67 | |
68 | static inline void sr_write_reg(struct omap_sr *sr, unsigned offset, u32 value) | |
69 | { | |
70 | __raw_writel(value, (sr->base + offset)); | |
71 | } | |
72 | ||
73 | static inline void sr_modify_reg(struct omap_sr *sr, unsigned offset, u32 mask, | |
74 | u32 value) | |
75 | { | |
76 | u32 reg_val; | |
984aa6db TG |
77 | |
78 | /* | |
79 | * Smartreflex error config register is special as it contains | |
80 | * certain status bits which if written a 1 into means a clear | |
81 | * of those bits. So in order to make sure no accidental write of | |
82 | * 1 happens to those status bits, do a clear of them in the read | |
83 | * value. This mean this API doesn't rewrite values in these bits | |
84 | * if they are currently set, but does allow the caller to write | |
85 | * those bits. | |
86 | */ | |
ade6ec05 NM |
87 | if (sr->ip_type == SR_TYPE_V1 && offset == ERRCONFIG_V1) |
88 | mask |= ERRCONFIG_STATUS_V1_MASK; | |
89 | else if (sr->ip_type == SR_TYPE_V2 && offset == ERRCONFIG_V2) | |
90 | mask |= ERRCONFIG_VPBOUNDINTST_V2; | |
91 | ||
92 | reg_val = __raw_readl(sr->base + offset); | |
93 | reg_val &= ~mask; | |
984aa6db | 94 | |
ade6ec05 | 95 | value &= mask; |
984aa6db TG |
96 | |
97 | reg_val |= value; | |
98 | ||
99 | __raw_writel(reg_val, (sr->base + offset)); | |
100 | } | |
101 | ||
102 | static inline u32 sr_read_reg(struct omap_sr *sr, unsigned offset) | |
103 | { | |
104 | return __raw_readl(sr->base + offset); | |
105 | } | |
106 | ||
107 | static struct omap_sr *_sr_lookup(struct voltagedomain *voltdm) | |
108 | { | |
109 | struct omap_sr *sr_info; | |
110 | ||
111 | if (!voltdm) { | |
112 | pr_err("%s: Null voltage domain passed!\n", __func__); | |
113 | return ERR_PTR(-EINVAL); | |
114 | } | |
115 | ||
116 | list_for_each_entry(sr_info, &sr_list, node) { | |
117 | if (voltdm == sr_info->voltdm) | |
118 | return sr_info; | |
119 | } | |
120 | ||
121 | return ERR_PTR(-ENODATA); | |
122 | } | |
123 | ||
124 | static irqreturn_t sr_interrupt(int irq, void *data) | |
125 | { | |
126 | struct omap_sr *sr_info = (struct omap_sr *)data; | |
127 | u32 status = 0; | |
128 | ||
129 | if (sr_info->ip_type == SR_TYPE_V1) { | |
130 | /* Read the status bits */ | |
131 | status = sr_read_reg(sr_info, ERRCONFIG_V1); | |
132 | ||
133 | /* Clear them by writing back */ | |
134 | sr_write_reg(sr_info, ERRCONFIG_V1, status); | |
135 | } else if (sr_info->ip_type == SR_TYPE_V2) { | |
136 | /* Read the status bits */ | |
5a4f1844 | 137 | status = sr_read_reg(sr_info, IRQSTATUS); |
984aa6db TG |
138 | |
139 | /* Clear them by writing back */ | |
140 | sr_write_reg(sr_info, IRQSTATUS, status); | |
141 | } | |
142 | ||
7a89afa8 | 143 | if (sr_class->notify) |
984aa6db TG |
144 | sr_class->notify(sr_info->voltdm, status); |
145 | ||
146 | return IRQ_HANDLED; | |
147 | } | |
148 | ||
149 | static void sr_set_clk_length(struct omap_sr *sr) | |
150 | { | |
151 | struct clk *sys_ck; | |
152 | u32 sys_clk_speed; | |
153 | ||
b35cecf9 TG |
154 | if (cpu_is_omap34xx()) |
155 | sys_ck = clk_get(NULL, "sys_ck"); | |
156 | else | |
157 | sys_ck = clk_get(NULL, "sys_clkin_ck"); | |
158 | ||
984aa6db TG |
159 | if (IS_ERR(sys_ck)) { |
160 | dev_err(&sr->pdev->dev, "%s: unable to get sys clk\n", | |
161 | __func__); | |
162 | return; | |
163 | } | |
164 | sys_clk_speed = clk_get_rate(sys_ck); | |
165 | clk_put(sys_ck); | |
166 | ||
167 | switch (sys_clk_speed) { | |
168 | case 12000000: | |
169 | sr->clk_length = SRCLKLENGTH_12MHZ_SYSCLK; | |
170 | break; | |
171 | case 13000000: | |
172 | sr->clk_length = SRCLKLENGTH_13MHZ_SYSCLK; | |
173 | break; | |
174 | case 19200000: | |
175 | sr->clk_length = SRCLKLENGTH_19MHZ_SYSCLK; | |
176 | break; | |
177 | case 26000000: | |
178 | sr->clk_length = SRCLKLENGTH_26MHZ_SYSCLK; | |
179 | break; | |
180 | case 38400000: | |
181 | sr->clk_length = SRCLKLENGTH_38MHZ_SYSCLK; | |
182 | break; | |
183 | default: | |
184 | dev_err(&sr->pdev->dev, "%s: Invalid sysclk value: %d\n", | |
185 | __func__, sys_clk_speed); | |
186 | break; | |
187 | } | |
188 | } | |
189 | ||
190 | static void sr_set_regfields(struct omap_sr *sr) | |
191 | { | |
192 | /* | |
193 | * For time being these values are defined in smartreflex.h | |
194 | * and populated during init. May be they can be moved to board | |
195 | * file or pmic specific data structure. In that case these structure | |
196 | * fields will have to be populated using the pdata or pmic structure. | |
197 | */ | |
b35cecf9 | 198 | if (cpu_is_omap34xx() || cpu_is_omap44xx()) { |
984aa6db TG |
199 | sr->err_weight = OMAP3430_SR_ERRWEIGHT; |
200 | sr->err_maxlimit = OMAP3430_SR_ERRMAXLIMIT; | |
201 | sr->accum_data = OMAP3430_SR_ACCUMDATA; | |
202 | if (!(strcmp(sr->voltdm->name, "mpu"))) { | |
203 | sr->senn_avgweight = OMAP3430_SR1_SENNAVGWEIGHT; | |
204 | sr->senp_avgweight = OMAP3430_SR1_SENPAVGWEIGHT; | |
205 | } else { | |
206 | sr->senn_avgweight = OMAP3430_SR2_SENNAVGWEIGHT; | |
207 | sr->senp_avgweight = OMAP3430_SR2_SENPAVGWEIGHT; | |
208 | } | |
209 | } | |
210 | } | |
211 | ||
212 | static void sr_start_vddautocomp(struct omap_sr *sr) | |
213 | { | |
214 | if (!sr_class || !(sr_class->enable) || !(sr_class->configure)) { | |
215 | dev_warn(&sr->pdev->dev, | |
216 | "%s: smartreflex class driver not registered\n", | |
217 | __func__); | |
218 | return; | |
219 | } | |
220 | ||
221 | if (!sr_class->enable(sr->voltdm)) | |
222 | sr->autocomp_active = true; | |
223 | } | |
224 | ||
225 | static void sr_stop_vddautocomp(struct omap_sr *sr) | |
226 | { | |
227 | if (!sr_class || !(sr_class->disable)) { | |
228 | dev_warn(&sr->pdev->dev, | |
229 | "%s: smartreflex class driver not registered\n", | |
230 | __func__); | |
231 | return; | |
232 | } | |
233 | ||
234 | if (sr->autocomp_active) { | |
235 | sr_class->disable(sr->voltdm, 1); | |
236 | sr->autocomp_active = false; | |
237 | } | |
238 | } | |
239 | ||
240 | /* | |
241 | * This function handles the intializations which have to be done | |
242 | * only when both sr device and class driver regiter has | |
243 | * completed. This will be attempted to be called from both sr class | |
244 | * driver register and sr device intializtion API's. Only one call | |
245 | * will ultimately succeed. | |
246 | * | |
fb914ebf | 247 | * Currently this function registers interrupt handler for a particular SR |
984aa6db TG |
248 | * if smartreflex class driver is already registered and has |
249 | * requested for interrupts and the SR interrupt line in present. | |
250 | */ | |
251 | static int sr_late_init(struct omap_sr *sr_info) | |
252 | { | |
253 | char *name; | |
254 | struct omap_sr_data *pdata = sr_info->pdev->dev.platform_data; | |
255 | struct resource *mem; | |
256 | int ret = 0; | |
257 | ||
7a89afa8 | 258 | if (sr_class->notify && sr_class->notify_flags && sr_info->irq) { |
5c56f32e VK |
259 | name = kasprintf(GFP_KERNEL, "sr_%s", sr_info->voltdm->name); |
260 | if (name == NULL) { | |
261 | ret = -ENOMEM; | |
262 | goto error; | |
263 | } | |
984aa6db TG |
264 | ret = request_irq(sr_info->irq, sr_interrupt, |
265 | 0, name, (void *)sr_info); | |
266 | if (ret) | |
267 | goto error; | |
1279ba59 | 268 | disable_irq(sr_info->irq); |
984aa6db TG |
269 | } |
270 | ||
271 | if (pdata && pdata->enable_on_init) | |
272 | sr_start_vddautocomp(sr_info); | |
273 | ||
274 | return ret; | |
275 | ||
276 | error: | |
442155ad NM |
277 | iounmap(sr_info->base); |
278 | mem = platform_get_resource(sr_info->pdev, IORESOURCE_MEM, 0); | |
279 | release_mem_region(mem->start, resource_size(mem)); | |
280 | list_del(&sr_info->node); | |
281 | dev_err(&sr_info->pdev->dev, "%s: ERROR in registering" | |
282 | "interrupt handler. Smartreflex will" | |
283 | "not function as desired\n", __func__); | |
284 | kfree(name); | |
285 | kfree(sr_info); | |
286 | return ret; | |
984aa6db TG |
287 | } |
288 | ||
289 | static void sr_v1_disable(struct omap_sr *sr) | |
290 | { | |
291 | int timeout = 0; | |
292 | ||
293 | /* Enable MCUDisableAcknowledge interrupt */ | |
294 | sr_modify_reg(sr, ERRCONFIG_V1, | |
295 | ERRCONFIG_MCUDISACKINTEN, ERRCONFIG_MCUDISACKINTEN); | |
296 | ||
297 | /* SRCONFIG - disable SR */ | |
298 | sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, 0x0); | |
299 | ||
300 | /* Disable all other SR interrupts and clear the status */ | |
301 | sr_modify_reg(sr, ERRCONFIG_V1, | |
302 | (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUVALIDINTEN | | |
303 | ERRCONFIG_MCUBOUNDINTEN | ERRCONFIG_VPBOUNDINTEN_V1), | |
304 | (ERRCONFIG_MCUACCUMINTST | ERRCONFIG_MCUVALIDINTST | | |
305 | ERRCONFIG_MCUBOUNDINTST | | |
306 | ERRCONFIG_VPBOUNDINTST_V1)); | |
307 | ||
308 | /* | |
309 | * Wait for SR to be disabled. | |
310 | * wait until ERRCONFIG.MCUDISACKINTST = 1. Typical latency is 1us. | |
311 | */ | |
312 | omap_test_timeout((sr_read_reg(sr, ERRCONFIG_V1) & | |
313 | ERRCONFIG_MCUDISACKINTST), SR_DISABLE_TIMEOUT, | |
314 | timeout); | |
315 | ||
316 | if (timeout >= SR_DISABLE_TIMEOUT) | |
317 | dev_warn(&sr->pdev->dev, "%s: Smartreflex disable timedout\n", | |
318 | __func__); | |
319 | ||
320 | /* Disable MCUDisableAcknowledge interrupt & clear pending interrupt */ | |
321 | sr_modify_reg(sr, ERRCONFIG_V1, ERRCONFIG_MCUDISACKINTEN, | |
322 | ERRCONFIG_MCUDISACKINTST); | |
323 | } | |
324 | ||
325 | static void sr_v2_disable(struct omap_sr *sr) | |
326 | { | |
327 | int timeout = 0; | |
328 | ||
329 | /* Enable MCUDisableAcknowledge interrupt */ | |
330 | sr_write_reg(sr, IRQENABLE_SET, IRQENABLE_MCUDISABLEACKINT); | |
331 | ||
332 | /* SRCONFIG - disable SR */ | |
333 | sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, 0x0); | |
334 | ||
335 | /* Disable all other SR interrupts and clear the status */ | |
336 | sr_modify_reg(sr, ERRCONFIG_V2, ERRCONFIG_VPBOUNDINTEN_V2, | |
337 | ERRCONFIG_VPBOUNDINTST_V2); | |
338 | sr_write_reg(sr, IRQENABLE_CLR, (IRQENABLE_MCUACCUMINT | | |
339 | IRQENABLE_MCUVALIDINT | | |
340 | IRQENABLE_MCUBOUNDSINT)); | |
341 | sr_write_reg(sr, IRQSTATUS, (IRQSTATUS_MCUACCUMINT | | |
342 | IRQSTATUS_MCVALIDINT | | |
343 | IRQSTATUS_MCBOUNDSINT)); | |
344 | ||
345 | /* | |
346 | * Wait for SR to be disabled. | |
347 | * wait until IRQSTATUS.MCUDISACKINTST = 1. Typical latency is 1us. | |
348 | */ | |
349 | omap_test_timeout((sr_read_reg(sr, IRQSTATUS) & | |
350 | IRQSTATUS_MCUDISABLEACKINT), SR_DISABLE_TIMEOUT, | |
351 | timeout); | |
352 | ||
353 | if (timeout >= SR_DISABLE_TIMEOUT) | |
354 | dev_warn(&sr->pdev->dev, "%s: Smartreflex disable timedout\n", | |
355 | __func__); | |
356 | ||
357 | /* Disable MCUDisableAcknowledge interrupt & clear pending interrupt */ | |
358 | sr_write_reg(sr, IRQENABLE_CLR, IRQENABLE_MCUDISABLEACKINT); | |
359 | sr_write_reg(sr, IRQSTATUS, IRQSTATUS_MCUDISABLEACKINT); | |
360 | } | |
361 | ||
362 | static u32 sr_retrieve_nvalue(struct omap_sr *sr, u32 efuse_offs) | |
363 | { | |
364 | int i; | |
365 | ||
366 | if (!sr->nvalue_table) { | |
367 | dev_warn(&sr->pdev->dev, "%s: Missing ntarget value table\n", | |
368 | __func__); | |
369 | return 0; | |
370 | } | |
371 | ||
372 | for (i = 0; i < sr->nvalue_count; i++) { | |
373 | if (sr->nvalue_table[i].efuse_offs == efuse_offs) | |
374 | return sr->nvalue_table[i].nvalue; | |
375 | } | |
376 | ||
377 | return 0; | |
378 | } | |
379 | ||
380 | /* Public Functions */ | |
381 | ||
382 | /** | |
383 | * sr_configure_errgen() - Configures the smrtreflex to perform AVS using the | |
384 | * error generator module. | |
385 | * @voltdm: VDD pointer to which the SR module to be configured belongs to. | |
386 | * | |
387 | * This API is to be called from the smartreflex class driver to | |
388 | * configure the error generator module inside the smartreflex module. | |
389 | * SR settings if using the ERROR module inside Smartreflex. | |
390 | * SR CLASS 3 by default uses only the ERROR module where as | |
391 | * SR CLASS 2 can choose between ERROR module and MINMAXAVG | |
392 | * module. Returns 0 on success and error value in case of failure. | |
393 | */ | |
394 | int sr_configure_errgen(struct voltagedomain *voltdm) | |
395 | { | |
396 | u32 sr_config, sr_errconfig, errconfig_offs, vpboundint_en; | |
397 | u32 vpboundint_st, senp_en = 0, senn_en = 0; | |
398 | u8 senp_shift, senn_shift; | |
399 | struct omap_sr *sr = _sr_lookup(voltdm); | |
400 | ||
401 | if (IS_ERR(sr)) { | |
402 | pr_warning("%s: omap_sr struct for sr_%s not found\n", | |
403 | __func__, voltdm->name); | |
404 | return -EINVAL; | |
405 | } | |
406 | ||
407 | if (!sr->clk_length) | |
408 | sr_set_clk_length(sr); | |
409 | ||
410 | senp_en = sr->senp_mod; | |
411 | senn_en = sr->senn_mod; | |
412 | ||
413 | sr_config = (sr->clk_length << SRCONFIG_SRCLKLENGTH_SHIFT) | | |
414 | SRCONFIG_SENENABLE | SRCONFIG_ERRGEN_EN; | |
415 | ||
416 | if (sr->ip_type == SR_TYPE_V1) { | |
417 | sr_config |= SRCONFIG_DELAYCTRL; | |
418 | senn_shift = SRCONFIG_SENNENABLE_V1_SHIFT; | |
419 | senp_shift = SRCONFIG_SENPENABLE_V1_SHIFT; | |
420 | errconfig_offs = ERRCONFIG_V1; | |
421 | vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V1; | |
422 | vpboundint_st = ERRCONFIG_VPBOUNDINTST_V1; | |
423 | } else if (sr->ip_type == SR_TYPE_V2) { | |
424 | senn_shift = SRCONFIG_SENNENABLE_V2_SHIFT; | |
425 | senp_shift = SRCONFIG_SENPENABLE_V2_SHIFT; | |
426 | errconfig_offs = ERRCONFIG_V2; | |
427 | vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V2; | |
428 | vpboundint_st = ERRCONFIG_VPBOUNDINTST_V2; | |
429 | } else { | |
430 | dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex" | |
431 | "module without specifying the ip\n", __func__); | |
432 | return -EINVAL; | |
433 | } | |
434 | ||
435 | sr_config |= ((senn_en << senn_shift) | (senp_en << senp_shift)); | |
436 | sr_write_reg(sr, SRCONFIG, sr_config); | |
437 | sr_errconfig = (sr->err_weight << ERRCONFIG_ERRWEIGHT_SHIFT) | | |
438 | (sr->err_maxlimit << ERRCONFIG_ERRMAXLIMIT_SHIFT) | | |
439 | (sr->err_minlimit << ERRCONFIG_ERRMINLIMIT_SHIFT); | |
440 | sr_modify_reg(sr, errconfig_offs, (SR_ERRWEIGHT_MASK | | |
441 | SR_ERRMAXLIMIT_MASK | SR_ERRMINLIMIT_MASK), | |
442 | sr_errconfig); | |
443 | ||
444 | /* Enabling the interrupts if the ERROR module is used */ | |
74754cc5 NM |
445 | sr_modify_reg(sr, errconfig_offs, (vpboundint_en | vpboundint_st), |
446 | vpboundint_en); | |
984aa6db TG |
447 | |
448 | return 0; | |
449 | } | |
450 | ||
ad54c3dd NM |
451 | /** |
452 | * sr_disable_errgen() - Disables SmartReflex AVS module's errgen component | |
453 | * @voltdm: VDD pointer to which the SR module to be configured belongs to. | |
454 | * | |
455 | * This API is to be called from the smartreflex class driver to | |
456 | * disable the error generator module inside the smartreflex module. | |
457 | * | |
458 | * Returns 0 on success and error value in case of failure. | |
459 | */ | |
460 | int sr_disable_errgen(struct voltagedomain *voltdm) | |
461 | { | |
462 | u32 errconfig_offs, vpboundint_en; | |
463 | u32 vpboundint_st; | |
464 | struct omap_sr *sr = _sr_lookup(voltdm); | |
465 | ||
466 | if (IS_ERR(sr)) { | |
467 | pr_warning("%s: omap_sr struct for sr_%s not found\n", | |
468 | __func__, voltdm->name); | |
469 | return -EINVAL; | |
470 | } | |
471 | ||
472 | if (sr->ip_type == SR_TYPE_V1) { | |
473 | errconfig_offs = ERRCONFIG_V1; | |
474 | vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V1; | |
475 | vpboundint_st = ERRCONFIG_VPBOUNDINTST_V1; | |
476 | } else if (sr->ip_type == SR_TYPE_V2) { | |
477 | errconfig_offs = ERRCONFIG_V2; | |
478 | vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V2; | |
479 | vpboundint_st = ERRCONFIG_VPBOUNDINTST_V2; | |
480 | } else { | |
481 | dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex" | |
482 | "module without specifying the ip\n", __func__); | |
483 | return -EINVAL; | |
484 | } | |
485 | ||
486 | /* Disable the interrupts of ERROR module */ | |
487 | sr_modify_reg(sr, errconfig_offs, vpboundint_en | vpboundint_st, 0); | |
488 | ||
489 | /* Disable the Sensor and errorgen */ | |
490 | sr_modify_reg(sr, SRCONFIG, SRCONFIG_SENENABLE | SRCONFIG_ERRGEN_EN, 0); | |
491 | ||
492 | return 0; | |
493 | } | |
494 | ||
984aa6db TG |
495 | /** |
496 | * sr_configure_minmax() - Configures the smrtreflex to perform AVS using the | |
497 | * minmaxavg module. | |
498 | * @voltdm: VDD pointer to which the SR module to be configured belongs to. | |
499 | * | |
500 | * This API is to be called from the smartreflex class driver to | |
501 | * configure the minmaxavg module inside the smartreflex module. | |
502 | * SR settings if using the ERROR module inside Smartreflex. | |
503 | * SR CLASS 3 by default uses only the ERROR module where as | |
504 | * SR CLASS 2 can choose between ERROR module and MINMAXAVG | |
505 | * module. Returns 0 on success and error value in case of failure. | |
506 | */ | |
507 | int sr_configure_minmax(struct voltagedomain *voltdm) | |
508 | { | |
509 | u32 sr_config, sr_avgwt; | |
510 | u32 senp_en = 0, senn_en = 0; | |
511 | u8 senp_shift, senn_shift; | |
512 | struct omap_sr *sr = _sr_lookup(voltdm); | |
513 | ||
514 | if (IS_ERR(sr)) { | |
515 | pr_warning("%s: omap_sr struct for sr_%s not found\n", | |
516 | __func__, voltdm->name); | |
517 | return -EINVAL; | |
518 | } | |
519 | ||
520 | if (!sr->clk_length) | |
521 | sr_set_clk_length(sr); | |
522 | ||
523 | senp_en = sr->senp_mod; | |
524 | senn_en = sr->senn_mod; | |
525 | ||
526 | sr_config = (sr->clk_length << SRCONFIG_SRCLKLENGTH_SHIFT) | | |
527 | SRCONFIG_SENENABLE | | |
528 | (sr->accum_data << SRCONFIG_ACCUMDATA_SHIFT); | |
529 | ||
530 | if (sr->ip_type == SR_TYPE_V1) { | |
531 | sr_config |= SRCONFIG_DELAYCTRL; | |
532 | senn_shift = SRCONFIG_SENNENABLE_V1_SHIFT; | |
533 | senp_shift = SRCONFIG_SENPENABLE_V1_SHIFT; | |
534 | } else if (sr->ip_type == SR_TYPE_V2) { | |
535 | senn_shift = SRCONFIG_SENNENABLE_V2_SHIFT; | |
536 | senp_shift = SRCONFIG_SENPENABLE_V2_SHIFT; | |
537 | } else { | |
538 | dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex" | |
539 | "module without specifying the ip\n", __func__); | |
540 | return -EINVAL; | |
541 | } | |
542 | ||
543 | sr_config |= ((senn_en << senn_shift) | (senp_en << senp_shift)); | |
544 | sr_write_reg(sr, SRCONFIG, sr_config); | |
545 | sr_avgwt = (sr->senp_avgweight << AVGWEIGHT_SENPAVGWEIGHT_SHIFT) | | |
546 | (sr->senn_avgweight << AVGWEIGHT_SENNAVGWEIGHT_SHIFT); | |
547 | sr_write_reg(sr, AVGWEIGHT, sr_avgwt); | |
548 | ||
549 | /* | |
550 | * Enabling the interrupts if MINMAXAVG module is used. | |
551 | * TODO: check if all the interrupts are mandatory | |
552 | */ | |
553 | if (sr->ip_type == SR_TYPE_V1) { | |
554 | sr_modify_reg(sr, ERRCONFIG_V1, | |
555 | (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUVALIDINTEN | | |
556 | ERRCONFIG_MCUBOUNDINTEN), | |
557 | (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUACCUMINTST | | |
558 | ERRCONFIG_MCUVALIDINTEN | ERRCONFIG_MCUVALIDINTST | | |
559 | ERRCONFIG_MCUBOUNDINTEN | ERRCONFIG_MCUBOUNDINTST)); | |
560 | } else if (sr->ip_type == SR_TYPE_V2) { | |
561 | sr_write_reg(sr, IRQSTATUS, | |
562 | IRQSTATUS_MCUACCUMINT | IRQSTATUS_MCVALIDINT | | |
563 | IRQSTATUS_MCBOUNDSINT | IRQSTATUS_MCUDISABLEACKINT); | |
564 | sr_write_reg(sr, IRQENABLE_SET, | |
565 | IRQENABLE_MCUACCUMINT | IRQENABLE_MCUVALIDINT | | |
566 | IRQENABLE_MCUBOUNDSINT | IRQENABLE_MCUDISABLEACKINT); | |
567 | } | |
568 | ||
569 | return 0; | |
570 | } | |
571 | ||
572 | /** | |
573 | * sr_enable() - Enables the smartreflex module. | |
574 | * @voltdm: VDD pointer to which the SR module to be configured belongs to. | |
575 | * @volt: The voltage at which the Voltage domain associated with | |
576 | * the smartreflex module is operating at. | |
577 | * This is required only to program the correct Ntarget value. | |
578 | * | |
579 | * This API is to be called from the smartreflex class driver to | |
580 | * enable a smartreflex module. Returns 0 on success. Returns error | |
581 | * value if the voltage passed is wrong or if ntarget value is wrong. | |
582 | */ | |
583 | int sr_enable(struct voltagedomain *voltdm, unsigned long volt) | |
584 | { | |
585 | u32 nvalue_reciprocal; | |
586 | struct omap_volt_data *volt_data; | |
587 | struct omap_sr *sr = _sr_lookup(voltdm); | |
588 | int ret; | |
589 | ||
590 | if (IS_ERR(sr)) { | |
591 | pr_warning("%s: omap_sr struct for sr_%s not found\n", | |
592 | __func__, voltdm->name); | |
593 | return -EINVAL; | |
594 | } | |
595 | ||
596 | volt_data = omap_voltage_get_voltdata(sr->voltdm, volt); | |
597 | ||
598 | if (IS_ERR(volt_data)) { | |
599 | dev_warn(&sr->pdev->dev, "%s: Unable to get voltage table" | |
600 | "for nominal voltage %ld\n", __func__, volt); | |
601 | return -ENODATA; | |
602 | } | |
603 | ||
604 | nvalue_reciprocal = sr_retrieve_nvalue(sr, volt_data->sr_efuse_offs); | |
605 | ||
606 | if (!nvalue_reciprocal) { | |
607 | dev_warn(&sr->pdev->dev, "%s: NVALUE = 0 at voltage %ld\n", | |
608 | __func__, volt); | |
609 | return -ENODATA; | |
610 | } | |
611 | ||
612 | /* errminlimit is opp dependent and hence linked to voltage */ | |
613 | sr->err_minlimit = volt_data->sr_errminlimit; | |
614 | ||
615 | pm_runtime_get_sync(&sr->pdev->dev); | |
616 | ||
617 | /* Check if SR is already enabled. If yes do nothing */ | |
618 | if (sr_read_reg(sr, SRCONFIG) & SRCONFIG_SRENABLE) | |
619 | return 0; | |
620 | ||
621 | /* Configure SR */ | |
622 | ret = sr_class->configure(voltdm); | |
623 | if (ret) | |
624 | return ret; | |
625 | ||
626 | sr_write_reg(sr, NVALUERECIPROCAL, nvalue_reciprocal); | |
627 | ||
628 | /* SRCONFIG - enable SR */ | |
629 | sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, SRCONFIG_SRENABLE); | |
630 | return 0; | |
631 | } | |
632 | ||
633 | /** | |
634 | * sr_disable() - Disables the smartreflex module. | |
635 | * @voltdm: VDD pointer to which the SR module to be configured belongs to. | |
636 | * | |
637 | * This API is to be called from the smartreflex class driver to | |
638 | * disable a smartreflex module. | |
639 | */ | |
640 | void sr_disable(struct voltagedomain *voltdm) | |
641 | { | |
642 | struct omap_sr *sr = _sr_lookup(voltdm); | |
643 | ||
644 | if (IS_ERR(sr)) { | |
645 | pr_warning("%s: omap_sr struct for sr_%s not found\n", | |
646 | __func__, voltdm->name); | |
647 | return; | |
648 | } | |
649 | ||
650 | /* Check if SR clocks are already disabled. If yes do nothing */ | |
651 | if (pm_runtime_suspended(&sr->pdev->dev)) | |
652 | return; | |
653 | ||
654 | /* | |
655 | * Disable SR if only it is indeed enabled. Else just | |
656 | * disable the clocks. | |
657 | */ | |
658 | if (sr_read_reg(sr, SRCONFIG) & SRCONFIG_SRENABLE) { | |
659 | if (sr->ip_type == SR_TYPE_V1) | |
660 | sr_v1_disable(sr); | |
661 | else if (sr->ip_type == SR_TYPE_V2) | |
662 | sr_v2_disable(sr); | |
663 | } | |
664 | ||
98333b3d | 665 | pm_runtime_put_sync_suspend(&sr->pdev->dev); |
984aa6db TG |
666 | } |
667 | ||
668 | /** | |
669 | * sr_register_class() - API to register a smartreflex class parameters. | |
670 | * @class_data: The structure containing various sr class specific data. | |
671 | * | |
672 | * This API is to be called by the smartreflex class driver to register itself | |
673 | * with the smartreflex driver during init. Returns 0 on success else the | |
674 | * error value. | |
675 | */ | |
676 | int sr_register_class(struct omap_sr_class_data *class_data) | |
677 | { | |
678 | struct omap_sr *sr_info; | |
679 | ||
680 | if (!class_data) { | |
681 | pr_warning("%s:, Smartreflex class data passed is NULL\n", | |
682 | __func__); | |
683 | return -EINVAL; | |
684 | } | |
685 | ||
686 | if (sr_class) { | |
687 | pr_warning("%s: Smartreflex class driver already registered\n", | |
688 | __func__); | |
689 | return -EBUSY; | |
690 | } | |
691 | ||
692 | sr_class = class_data; | |
693 | ||
694 | /* | |
695 | * Call into late init to do intializations that require | |
696 | * both sr driver and sr class driver to be initiallized. | |
697 | */ | |
698 | list_for_each_entry(sr_info, &sr_list, node) | |
699 | sr_late_init(sr_info); | |
700 | ||
701 | return 0; | |
702 | } | |
703 | ||
704 | /** | |
705 | * omap_sr_enable() - API to enable SR clocks and to call into the | |
706 | * registered smartreflex class enable API. | |
707 | * @voltdm: VDD pointer to which the SR module to be configured belongs to. | |
708 | * | |
709 | * This API is to be called from the kernel in order to enable | |
710 | * a particular smartreflex module. This API will do the initial | |
711 | * configurations to turn on the smartreflex module and in turn call | |
712 | * into the registered smartreflex class enable API. | |
713 | */ | |
714 | void omap_sr_enable(struct voltagedomain *voltdm) | |
715 | { | |
716 | struct omap_sr *sr = _sr_lookup(voltdm); | |
717 | ||
718 | if (IS_ERR(sr)) { | |
719 | pr_warning("%s: omap_sr struct for sr_%s not found\n", | |
720 | __func__, voltdm->name); | |
721 | return; | |
722 | } | |
723 | ||
724 | if (!sr->autocomp_active) | |
725 | return; | |
726 | ||
727 | if (!sr_class || !(sr_class->enable) || !(sr_class->configure)) { | |
728 | dev_warn(&sr->pdev->dev, "%s: smartreflex class driver not" | |
729 | "registered\n", __func__); | |
730 | return; | |
731 | } | |
732 | ||
733 | sr_class->enable(voltdm); | |
734 | } | |
735 | ||
736 | /** | |
737 | * omap_sr_disable() - API to disable SR without resetting the voltage | |
738 | * processor voltage | |
739 | * @voltdm: VDD pointer to which the SR module to be configured belongs to. | |
740 | * | |
741 | * This API is to be called from the kernel in order to disable | |
742 | * a particular smartreflex module. This API will in turn call | |
743 | * into the registered smartreflex class disable API. This API will tell | |
744 | * the smartreflex class disable not to reset the VP voltage after | |
745 | * disabling smartreflex. | |
746 | */ | |
747 | void omap_sr_disable(struct voltagedomain *voltdm) | |
748 | { | |
749 | struct omap_sr *sr = _sr_lookup(voltdm); | |
750 | ||
751 | if (IS_ERR(sr)) { | |
752 | pr_warning("%s: omap_sr struct for sr_%s not found\n", | |
753 | __func__, voltdm->name); | |
754 | return; | |
755 | } | |
756 | ||
757 | if (!sr->autocomp_active) | |
758 | return; | |
759 | ||
760 | if (!sr_class || !(sr_class->disable)) { | |
761 | dev_warn(&sr->pdev->dev, "%s: smartreflex class driver not" | |
762 | "registered\n", __func__); | |
763 | return; | |
764 | } | |
765 | ||
766 | sr_class->disable(voltdm, 0); | |
767 | } | |
768 | ||
769 | /** | |
770 | * omap_sr_disable_reset_volt() - API to disable SR and reset the | |
771 | * voltage processor voltage | |
772 | * @voltdm: VDD pointer to which the SR module to be configured belongs to. | |
773 | * | |
774 | * This API is to be called from the kernel in order to disable | |
775 | * a particular smartreflex module. This API will in turn call | |
776 | * into the registered smartreflex class disable API. This API will tell | |
777 | * the smartreflex class disable to reset the VP voltage after | |
778 | * disabling smartreflex. | |
779 | */ | |
780 | void omap_sr_disable_reset_volt(struct voltagedomain *voltdm) | |
781 | { | |
782 | struct omap_sr *sr = _sr_lookup(voltdm); | |
783 | ||
784 | if (IS_ERR(sr)) { | |
785 | pr_warning("%s: omap_sr struct for sr_%s not found\n", | |
786 | __func__, voltdm->name); | |
787 | return; | |
788 | } | |
789 | ||
790 | if (!sr->autocomp_active) | |
791 | return; | |
792 | ||
793 | if (!sr_class || !(sr_class->disable)) { | |
794 | dev_warn(&sr->pdev->dev, "%s: smartreflex class driver not" | |
795 | "registered\n", __func__); | |
796 | return; | |
797 | } | |
798 | ||
799 | sr_class->disable(voltdm, 1); | |
800 | } | |
801 | ||
802 | /** | |
803 | * omap_sr_register_pmic() - API to register pmic specific info. | |
804 | * @pmic_data: The structure containing pmic specific data. | |
805 | * | |
806 | * This API is to be called from the PMIC specific code to register with | |
807 | * smartreflex driver pmic specific info. Currently the only info required | |
808 | * is the smartreflex init on the PMIC side. | |
809 | */ | |
810 | void omap_sr_register_pmic(struct omap_sr_pmic_data *pmic_data) | |
811 | { | |
812 | if (!pmic_data) { | |
813 | pr_warning("%s: Trying to register NULL PMIC data structure" | |
814 | "with smartreflex\n", __func__); | |
815 | return; | |
816 | } | |
817 | ||
818 | sr_pmic_data = pmic_data; | |
819 | } | |
820 | ||
821 | /* PM Debug Fs enteries to enable disable smartreflex. */ | |
822 | static int omap_sr_autocomp_show(void *data, u64 *val) | |
823 | { | |
824 | struct omap_sr *sr_info = (struct omap_sr *) data; | |
825 | ||
826 | if (!sr_info) { | |
8353584e | 827 | pr_warning("%s: omap_sr struct not found\n", __func__); |
984aa6db TG |
828 | return -EINVAL; |
829 | } | |
830 | ||
831 | *val = sr_info->autocomp_active; | |
832 | ||
833 | return 0; | |
834 | } | |
835 | ||
836 | static int omap_sr_autocomp_store(void *data, u64 val) | |
837 | { | |
838 | struct omap_sr *sr_info = (struct omap_sr *) data; | |
839 | ||
840 | if (!sr_info) { | |
8353584e | 841 | pr_warning("%s: omap_sr struct not found\n", __func__); |
984aa6db TG |
842 | return -EINVAL; |
843 | } | |
844 | ||
845 | /* Sanity check */ | |
846 | if (val && (val != 1)) { | |
847 | pr_warning("%s: Invalid argument %lld\n", __func__, val); | |
848 | return -EINVAL; | |
849 | } | |
850 | ||
ac77a6f7 NM |
851 | /* control enable/disable only if there is a delta in value */ |
852 | if (sr_info->autocomp_active != val) { | |
853 | if (!val) | |
854 | sr_stop_vddautocomp(sr_info); | |
855 | else | |
856 | sr_start_vddautocomp(sr_info); | |
857 | } | |
984aa6db TG |
858 | |
859 | return 0; | |
860 | } | |
861 | ||
862 | DEFINE_SIMPLE_ATTRIBUTE(pm_sr_fops, omap_sr_autocomp_show, | |
863 | omap_sr_autocomp_store, "%llu\n"); | |
864 | ||
865 | static int __init omap_sr_probe(struct platform_device *pdev) | |
866 | { | |
867 | struct omap_sr *sr_info = kzalloc(sizeof(struct omap_sr), GFP_KERNEL); | |
868 | struct omap_sr_data *pdata = pdev->dev.platform_data; | |
869 | struct resource *mem, *irq; | |
633ef8b7 | 870 | struct dentry *nvalue_dir; |
077fceca TG |
871 | struct omap_volt_data *volt_data; |
872 | int i, ret = 0; | |
633ef8b7 | 873 | char *name; |
984aa6db TG |
874 | |
875 | if (!sr_info) { | |
876 | dev_err(&pdev->dev, "%s: unable to allocate sr_info\n", | |
877 | __func__); | |
878 | return -ENOMEM; | |
879 | } | |
880 | ||
881 | if (!pdata) { | |
882 | dev_err(&pdev->dev, "%s: platform data missing\n", __func__); | |
720bc782 SW |
883 | ret = -EINVAL; |
884 | goto err_free_devinfo; | |
984aa6db TG |
885 | } |
886 | ||
887 | mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
888 | if (!mem) { | |
889 | dev_err(&pdev->dev, "%s: no mem resource\n", __func__); | |
890 | ret = -ENODEV; | |
891 | goto err_free_devinfo; | |
892 | } | |
893 | ||
da9e7392 AK |
894 | mem = request_mem_region(mem->start, resource_size(mem), |
895 | dev_name(&pdev->dev)); | |
896 | if (!mem) { | |
897 | dev_err(&pdev->dev, "%s: no mem region\n", __func__); | |
898 | ret = -EBUSY; | |
899 | goto err_free_devinfo; | |
900 | } | |
901 | ||
984aa6db TG |
902 | irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0); |
903 | ||
904 | pm_runtime_enable(&pdev->dev); | |
e13d8f38 | 905 | pm_runtime_irq_safe(&pdev->dev); |
984aa6db TG |
906 | |
907 | sr_info->pdev = pdev; | |
908 | sr_info->srid = pdev->id; | |
909 | sr_info->voltdm = pdata->voltdm; | |
910 | sr_info->nvalue_table = pdata->nvalue_table; | |
911 | sr_info->nvalue_count = pdata->nvalue_count; | |
912 | sr_info->senn_mod = pdata->senn_mod; | |
913 | sr_info->senp_mod = pdata->senp_mod; | |
914 | sr_info->autocomp_active = false; | |
915 | sr_info->ip_type = pdata->ip_type; | |
916 | sr_info->base = ioremap(mem->start, resource_size(mem)); | |
917 | if (!sr_info->base) { | |
918 | dev_err(&pdev->dev, "%s: ioremap fail\n", __func__); | |
919 | ret = -ENOMEM; | |
920 | goto err_release_region; | |
921 | } | |
922 | ||
923 | if (irq) | |
924 | sr_info->irq = irq->start; | |
925 | ||
926 | sr_set_clk_length(sr_info); | |
927 | sr_set_regfields(sr_info); | |
928 | ||
929 | list_add(&sr_info->node, &sr_list); | |
930 | ||
931 | /* | |
932 | * Call into late init to do intializations that require | |
933 | * both sr driver and sr class driver to be initiallized. | |
934 | */ | |
935 | if (sr_class) { | |
936 | ret = sr_late_init(sr_info); | |
937 | if (ret) { | |
938 | pr_warning("%s: Error in SR late init\n", __func__); | |
14ea9601 | 939 | goto err_iounmap; |
984aa6db TG |
940 | } |
941 | } | |
942 | ||
943 | dev_info(&pdev->dev, "%s: SmartReflex driver initialized\n", __func__); | |
633ef8b7 KH |
944 | if (!sr_dbg_dir) { |
945 | sr_dbg_dir = debugfs_create_dir("smartreflex", NULL); | |
946 | if (!sr_dbg_dir) { | |
947 | ret = PTR_ERR(sr_dbg_dir); | |
948 | pr_err("%s:sr debugfs dir creation failed(%d)\n", | |
949 | __func__, ret); | |
950 | goto err_iounmap; | |
951 | } | |
952 | } | |
984aa6db | 953 | |
633ef8b7 KH |
954 | name = kasprintf(GFP_KERNEL, "sr_%s", sr_info->voltdm->name); |
955 | if (!name) { | |
956 | dev_err(&pdev->dev, "%s: Unable to alloc debugfs name\n", | |
957 | __func__); | |
958 | ret = -ENOMEM; | |
0c49cc16 | 959 | goto err_iounmap; |
b3329a33 | 960 | } |
633ef8b7 KH |
961 | sr_info->dbg_dir = debugfs_create_dir(name, sr_dbg_dir); |
962 | kfree(name); | |
b1ace380 | 963 | if (IS_ERR(sr_info->dbg_dir)) { |
984aa6db TG |
964 | dev_err(&pdev->dev, "%s: Unable to create debugfs directory\n", |
965 | __func__); | |
b1ace380 | 966 | ret = PTR_ERR(sr_info->dbg_dir); |
0c49cc16 | 967 | goto err_iounmap; |
984aa6db TG |
968 | } |
969 | ||
b1ace380 AS |
970 | (void) debugfs_create_file("autocomp", S_IRUGO | S_IWUSR, |
971 | sr_info->dbg_dir, (void *)sr_info, &pm_sr_fops); | |
972 | (void) debugfs_create_x32("errweight", S_IRUGO, sr_info->dbg_dir, | |
077fceca | 973 | &sr_info->err_weight); |
b1ace380 | 974 | (void) debugfs_create_x32("errmaxlimit", S_IRUGO, sr_info->dbg_dir, |
077fceca | 975 | &sr_info->err_maxlimit); |
b1ace380 | 976 | (void) debugfs_create_x32("errminlimit", S_IRUGO, sr_info->dbg_dir, |
077fceca TG |
977 | &sr_info->err_minlimit); |
978 | ||
b1ace380 | 979 | nvalue_dir = debugfs_create_dir("nvalue", sr_info->dbg_dir); |
077fceca TG |
980 | if (IS_ERR(nvalue_dir)) { |
981 | dev_err(&pdev->dev, "%s: Unable to create debugfs directory" | |
982 | "for n-values\n", __func__); | |
b3329a33 | 983 | ret = PTR_ERR(nvalue_dir); |
283a1c1f | 984 | goto err_debugfs; |
077fceca TG |
985 | } |
986 | ||
987 | omap_voltage_get_volttable(sr_info->voltdm, &volt_data); | |
988 | if (!volt_data) { | |
989 | dev_warn(&pdev->dev, "%s: No Voltage table for the" | |
990 | " corresponding vdd vdd_%s. Cannot create debugfs" | |
991 | "entries for n-values\n", | |
992 | __func__, sr_info->voltdm->name); | |
b3329a33 | 993 | ret = -ENODATA; |
283a1c1f | 994 | goto err_debugfs; |
077fceca TG |
995 | } |
996 | ||
997 | for (i = 0; i < sr_info->nvalue_count; i++) { | |
865212ab | 998 | char name[NVALUE_NAME_LEN + 1]; |
077fceca | 999 | |
865212ab AK |
1000 | snprintf(name, sizeof(name), "volt_%d", |
1001 | volt_data[i].volt_nominal); | |
1232a185 | 1002 | (void) debugfs_create_x32(name, S_IRUGO | S_IWUSR, nvalue_dir, |
077fceca TG |
1003 | &(sr_info->nvalue_table[i].nvalue)); |
1004 | } | |
984aa6db TG |
1005 | |
1006 | return ret; | |
1007 | ||
283a1c1f AK |
1008 | err_debugfs: |
1009 | debugfs_remove_recursive(sr_info->dbg_dir); | |
0c49cc16 | 1010 | err_iounmap: |
833d78fc | 1011 | list_del(&sr_info->node); |
0c49cc16 | 1012 | iounmap(sr_info->base); |
984aa6db TG |
1013 | err_release_region: |
1014 | release_mem_region(mem->start, resource_size(mem)); | |
1015 | err_free_devinfo: | |
1016 | kfree(sr_info); | |
1017 | ||
1018 | return ret; | |
1019 | } | |
1020 | ||
1021 | static int __devexit omap_sr_remove(struct platform_device *pdev) | |
1022 | { | |
1023 | struct omap_sr_data *pdata = pdev->dev.platform_data; | |
1024 | struct omap_sr *sr_info; | |
1025 | struct resource *mem; | |
1026 | ||
1027 | if (!pdata) { | |
1028 | dev_err(&pdev->dev, "%s: platform data missing\n", __func__); | |
1029 | return -EINVAL; | |
1030 | } | |
1031 | ||
1032 | sr_info = _sr_lookup(pdata->voltdm); | |
28693ec0 | 1033 | if (IS_ERR(sr_info)) { |
984aa6db TG |
1034 | dev_warn(&pdev->dev, "%s: omap_sr struct not found\n", |
1035 | __func__); | |
1036 | return -EINVAL; | |
1037 | } | |
1038 | ||
1039 | if (sr_info->autocomp_active) | |
1040 | sr_stop_vddautocomp(sr_info); | |
b1ace380 AS |
1041 | if (sr_info->dbg_dir) |
1042 | debugfs_remove_recursive(sr_info->dbg_dir); | |
984aa6db TG |
1043 | |
1044 | list_del(&sr_info->node); | |
1045 | iounmap(sr_info->base); | |
1046 | kfree(sr_info); | |
1047 | mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
1048 | release_mem_region(mem->start, resource_size(mem)); | |
1049 | ||
1050 | return 0; | |
1051 | } | |
1052 | ||
1f55bc18 NM |
1053 | static void __devexit omap_sr_shutdown(struct platform_device *pdev) |
1054 | { | |
1055 | struct omap_sr_data *pdata = pdev->dev.platform_data; | |
1056 | struct omap_sr *sr_info; | |
1057 | ||
1058 | if (!pdata) { | |
1059 | dev_err(&pdev->dev, "%s: platform data missing\n", __func__); | |
1060 | return; | |
1061 | } | |
1062 | ||
1063 | sr_info = _sr_lookup(pdata->voltdm); | |
1064 | if (IS_ERR(sr_info)) { | |
1065 | dev_warn(&pdev->dev, "%s: omap_sr struct not found\n", | |
1066 | __func__); | |
1067 | return; | |
1068 | } | |
1069 | ||
1070 | if (sr_info->autocomp_active) | |
1071 | sr_stop_vddautocomp(sr_info); | |
1072 | ||
1073 | return; | |
1074 | } | |
1075 | ||
984aa6db | 1076 | static struct platform_driver smartreflex_driver = { |
149f1d5c | 1077 | .remove = __devexit_p(omap_sr_remove), |
1f55bc18 | 1078 | .shutdown = __devexit_p(omap_sr_shutdown), |
984aa6db TG |
1079 | .driver = { |
1080 | .name = "smartreflex", | |
1081 | }, | |
1082 | }; | |
1083 | ||
1084 | static int __init sr_init(void) | |
1085 | { | |
1086 | int ret = 0; | |
1087 | ||
1088 | /* | |
1089 | * sr_init is a late init. If by then a pmic specific API is not | |
1090 | * registered either there is no need for anything to be done on | |
1091 | * the PMIC side or somebody has forgotten to register a PMIC | |
1092 | * handler. Warn for the second condition. | |
1093 | */ | |
1094 | if (sr_pmic_data && sr_pmic_data->sr_pmic_init) | |
1095 | sr_pmic_data->sr_pmic_init(); | |
1096 | else | |
1097 | pr_warning("%s: No PMIC hook to init smartreflex\n", __func__); | |
1098 | ||
1099 | ret = platform_driver_probe(&smartreflex_driver, omap_sr_probe); | |
1100 | if (ret) { | |
1101 | pr_err("%s: platform driver register failed for SR\n", | |
1102 | __func__); | |
1103 | return ret; | |
1104 | } | |
1105 | ||
1106 | return 0; | |
1107 | } | |
1108 | ||
1109 | static void __exit sr_exit(void) | |
1110 | { | |
1111 | platform_driver_unregister(&smartreflex_driver); | |
1112 | } | |
1113 | late_initcall(sr_init); | |
1114 | module_exit(sr_exit); | |
1115 | ||
1116 | MODULE_DESCRIPTION("OMAP Smartreflex Driver"); | |
1117 | MODULE_LICENSE("GPL"); | |
1118 | MODULE_ALIAS("platform:" DRIVER_NAME); | |
1119 | MODULE_AUTHOR("Texas Instruments Inc"); |