Commit | Line | Data |
---|---|---|
58a5491c | 1 | /* |
a8480ea0 | 2 | * usb-host.c - OMAP USB Host |
58a5491c FB |
3 | * |
4 | * This file will contain the board specific details for the | |
a8480ea0 | 5 | * Synopsys EHCI/OHCI host controller on OMAP3430 and onwards |
58a5491c | 6 | * |
a8480ea0 | 7 | * Copyright (C) 2007-2011 Texas Instruments |
58a5491c | 8 | * Author: Vikram Pandita <vikram.pandita@ti.com> |
2236396d | 9 | * Author: Keshava Munegowda <keshava_mgowda@ti.com> |
58a5491c FB |
10 | * |
11 | * Generalization by: | |
a8480ea0 | 12 | * Felipe Balbi <balbi@ti.com> |
58a5491c FB |
13 | * |
14 | * This program is free software; you can redistribute it and/or modify | |
15 | * it under the terms of the GNU General Public License version 2 as | |
16 | * published by the Free Software Foundation. | |
17 | */ | |
18 | ||
19 | #include <linux/types.h> | |
20 | #include <linux/errno.h> | |
21 | #include <linux/delay.h> | |
22 | #include <linux/platform_device.h> | |
2236396d | 23 | #include <linux/slab.h> |
bfb01197 AK |
24 | #include <linux/dma-mapping.h> |
25 | ||
58a5491c | 26 | #include <asm/io.h> |
58a5491c FB |
27 | |
28 | #include <mach/hardware.h> | |
29 | #include <mach/irqs.h> | |
30 | #include <plat/usb.h> | |
50b2a9bd | 31 | #include <plat/omap_device.h> |
58a5491c | 32 | |
4896e394 TL |
33 | #include "mux.h" |
34 | ||
2236396d | 35 | #ifdef CONFIG_MFD_OMAP_USB_HOST |
58a5491c | 36 | |
50b2a9bd KM |
37 | #define OMAP_USBHS_DEVICE "usbhs_omap" |
38 | #define USBHS_UHH_HWMODNAME "usb_host_hs" | |
39 | #define USBHS_TLL_HWMODNAME "usb_tll_hs" | |
58a5491c | 40 | |
3b68ae73 KM |
41 | static struct usbhs_omap_platform_data usbhs_data; |
42 | static struct ehci_hcd_omap_platform_data ehci_data; | |
43 | static struct ohci_hcd_omap_platform_data ohci_data; | |
44 | ||
50b2a9bd KM |
45 | static struct omap_device_pm_latency omap_uhhtll_latency[] = { |
46 | { | |
47 | .deactivate_func = omap_device_idle_hwmods, | |
48 | .activate_func = omap_device_enable_hwmods, | |
49 | .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST, | |
50 | }, | |
51 | }; | |
52 | ||
58a5491c FB |
53 | /* MUX settings for EHCI pins */ |
54 | /* | |
55 | * setup_ehci_io_mux - initialize IO pad mux for USBHOST | |
56 | */ | |
1512f0db | 57 | static void __init setup_ehci_io_mux(const enum usbhs_omap_port_mode *port_mode) |
58a5491c FB |
58 | { |
59 | switch (port_mode[0]) { | |
181b250c | 60 | case OMAP_EHCI_PORT_MODE_PHY: |
4896e394 TL |
61 | omap_mux_init_signal("hsusb1_stp", OMAP_PIN_OUTPUT); |
62 | omap_mux_init_signal("hsusb1_clk", OMAP_PIN_OUTPUT); | |
63 | omap_mux_init_signal("hsusb1_dir", OMAP_PIN_INPUT_PULLDOWN); | |
64 | omap_mux_init_signal("hsusb1_nxt", OMAP_PIN_INPUT_PULLDOWN); | |
65 | omap_mux_init_signal("hsusb1_data0", OMAP_PIN_INPUT_PULLDOWN); | |
66 | omap_mux_init_signal("hsusb1_data1", OMAP_PIN_INPUT_PULLDOWN); | |
67 | omap_mux_init_signal("hsusb1_data2", OMAP_PIN_INPUT_PULLDOWN); | |
68 | omap_mux_init_signal("hsusb1_data3", OMAP_PIN_INPUT_PULLDOWN); | |
69 | omap_mux_init_signal("hsusb1_data4", OMAP_PIN_INPUT_PULLDOWN); | |
70 | omap_mux_init_signal("hsusb1_data5", OMAP_PIN_INPUT_PULLDOWN); | |
71 | omap_mux_init_signal("hsusb1_data6", OMAP_PIN_INPUT_PULLDOWN); | |
72 | omap_mux_init_signal("hsusb1_data7", OMAP_PIN_INPUT_PULLDOWN); | |
58a5491c | 73 | break; |
181b250c | 74 | case OMAP_EHCI_PORT_MODE_TLL: |
4896e394 TL |
75 | omap_mux_init_signal("hsusb1_tll_stp", |
76 | OMAP_PIN_INPUT_PULLUP); | |
77 | omap_mux_init_signal("hsusb1_tll_clk", | |
78 | OMAP_PIN_INPUT_PULLDOWN); | |
79 | omap_mux_init_signal("hsusb1_tll_dir", | |
80 | OMAP_PIN_INPUT_PULLDOWN); | |
81 | omap_mux_init_signal("hsusb1_tll_nxt", | |
82 | OMAP_PIN_INPUT_PULLDOWN); | |
83 | omap_mux_init_signal("hsusb1_tll_data0", | |
84 | OMAP_PIN_INPUT_PULLDOWN); | |
85 | omap_mux_init_signal("hsusb1_tll_data1", | |
86 | OMAP_PIN_INPUT_PULLDOWN); | |
87 | omap_mux_init_signal("hsusb1_tll_data2", | |
88 | OMAP_PIN_INPUT_PULLDOWN); | |
89 | omap_mux_init_signal("hsusb1_tll_data3", | |
90 | OMAP_PIN_INPUT_PULLDOWN); | |
91 | omap_mux_init_signal("hsusb1_tll_data4", | |
92 | OMAP_PIN_INPUT_PULLDOWN); | |
93 | omap_mux_init_signal("hsusb1_tll_data5", | |
94 | OMAP_PIN_INPUT_PULLDOWN); | |
95 | omap_mux_init_signal("hsusb1_tll_data6", | |
96 | OMAP_PIN_INPUT_PULLDOWN); | |
97 | omap_mux_init_signal("hsusb1_tll_data7", | |
98 | OMAP_PIN_INPUT_PULLDOWN); | |
58a5491c | 99 | break; |
181b250c | 100 | case OMAP_USBHS_PORT_MODE_UNUSED: |
58a5491c FB |
101 | /* FALLTHROUGH */ |
102 | default: | |
103 | break; | |
104 | } | |
105 | ||
106 | switch (port_mode[1]) { | |
181b250c | 107 | case OMAP_EHCI_PORT_MODE_PHY: |
4896e394 TL |
108 | omap_mux_init_signal("hsusb2_stp", OMAP_PIN_OUTPUT); |
109 | omap_mux_init_signal("hsusb2_clk", OMAP_PIN_OUTPUT); | |
110 | omap_mux_init_signal("hsusb2_dir", OMAP_PIN_INPUT_PULLDOWN); | |
111 | omap_mux_init_signal("hsusb2_nxt", OMAP_PIN_INPUT_PULLDOWN); | |
112 | omap_mux_init_signal("hsusb2_data0", | |
113 | OMAP_PIN_INPUT_PULLDOWN); | |
114 | omap_mux_init_signal("hsusb2_data1", | |
115 | OMAP_PIN_INPUT_PULLDOWN); | |
116 | omap_mux_init_signal("hsusb2_data2", | |
117 | OMAP_PIN_INPUT_PULLDOWN); | |
118 | omap_mux_init_signal("hsusb2_data3", | |
119 | OMAP_PIN_INPUT_PULLDOWN); | |
120 | omap_mux_init_signal("hsusb2_data4", | |
121 | OMAP_PIN_INPUT_PULLDOWN); | |
122 | omap_mux_init_signal("hsusb2_data5", | |
123 | OMAP_PIN_INPUT_PULLDOWN); | |
124 | omap_mux_init_signal("hsusb2_data6", | |
125 | OMAP_PIN_INPUT_PULLDOWN); | |
126 | omap_mux_init_signal("hsusb2_data7", | |
127 | OMAP_PIN_INPUT_PULLDOWN); | |
58a5491c | 128 | break; |
181b250c | 129 | case OMAP_EHCI_PORT_MODE_TLL: |
4896e394 TL |
130 | omap_mux_init_signal("hsusb2_tll_stp", |
131 | OMAP_PIN_INPUT_PULLUP); | |
132 | omap_mux_init_signal("hsusb2_tll_clk", | |
133 | OMAP_PIN_INPUT_PULLDOWN); | |
134 | omap_mux_init_signal("hsusb2_tll_dir", | |
135 | OMAP_PIN_INPUT_PULLDOWN); | |
136 | omap_mux_init_signal("hsusb2_tll_nxt", | |
137 | OMAP_PIN_INPUT_PULLDOWN); | |
138 | omap_mux_init_signal("hsusb2_tll_data0", | |
139 | OMAP_PIN_INPUT_PULLDOWN); | |
140 | omap_mux_init_signal("hsusb2_tll_data1", | |
141 | OMAP_PIN_INPUT_PULLDOWN); | |
142 | omap_mux_init_signal("hsusb2_tll_data2", | |
143 | OMAP_PIN_INPUT_PULLDOWN); | |
144 | omap_mux_init_signal("hsusb2_tll_data3", | |
145 | OMAP_PIN_INPUT_PULLDOWN); | |
146 | omap_mux_init_signal("hsusb2_tll_data4", | |
147 | OMAP_PIN_INPUT_PULLDOWN); | |
148 | omap_mux_init_signal("hsusb2_tll_data5", | |
149 | OMAP_PIN_INPUT_PULLDOWN); | |
150 | omap_mux_init_signal("hsusb2_tll_data6", | |
151 | OMAP_PIN_INPUT_PULLDOWN); | |
152 | omap_mux_init_signal("hsusb2_tll_data7", | |
153 | OMAP_PIN_INPUT_PULLDOWN); | |
58a5491c | 154 | break; |
181b250c | 155 | case OMAP_USBHS_PORT_MODE_UNUSED: |
58a5491c FB |
156 | /* FALLTHROUGH */ |
157 | default: | |
158 | break; | |
159 | } | |
160 | ||
161 | switch (port_mode[2]) { | |
181b250c | 162 | case OMAP_EHCI_PORT_MODE_PHY: |
58a5491c FB |
163 | printk(KERN_WARNING "Port3 can't be used in PHY mode\n"); |
164 | break; | |
181b250c | 165 | case OMAP_EHCI_PORT_MODE_TLL: |
4896e394 TL |
166 | omap_mux_init_signal("hsusb3_tll_stp", |
167 | OMAP_PIN_INPUT_PULLUP); | |
168 | omap_mux_init_signal("hsusb3_tll_clk", | |
169 | OMAP_PIN_INPUT_PULLDOWN); | |
170 | omap_mux_init_signal("hsusb3_tll_dir", | |
171 | OMAP_PIN_INPUT_PULLDOWN); | |
172 | omap_mux_init_signal("hsusb3_tll_nxt", | |
173 | OMAP_PIN_INPUT_PULLDOWN); | |
174 | omap_mux_init_signal("hsusb3_tll_data0", | |
175 | OMAP_PIN_INPUT_PULLDOWN); | |
176 | omap_mux_init_signal("hsusb3_tll_data1", | |
177 | OMAP_PIN_INPUT_PULLDOWN); | |
178 | omap_mux_init_signal("hsusb3_tll_data2", | |
179 | OMAP_PIN_INPUT_PULLDOWN); | |
180 | omap_mux_init_signal("hsusb3_tll_data3", | |
181 | OMAP_PIN_INPUT_PULLDOWN); | |
182 | omap_mux_init_signal("hsusb3_tll_data4", | |
183 | OMAP_PIN_INPUT_PULLDOWN); | |
184 | omap_mux_init_signal("hsusb3_tll_data5", | |
185 | OMAP_PIN_INPUT_PULLDOWN); | |
186 | omap_mux_init_signal("hsusb3_tll_data6", | |
187 | OMAP_PIN_INPUT_PULLDOWN); | |
188 | omap_mux_init_signal("hsusb3_tll_data7", | |
189 | OMAP_PIN_INPUT_PULLDOWN); | |
58a5491c | 190 | break; |
181b250c | 191 | case OMAP_USBHS_PORT_MODE_UNUSED: |
58a5491c FB |
192 | /* FALLTHROUGH */ |
193 | default: | |
194 | break; | |
195 | } | |
196 | ||
197 | return; | |
198 | } | |
199 | ||
1512f0db IG |
200 | static |
201 | void __init setup_4430ehci_io_mux(const enum usbhs_omap_port_mode *port_mode) | |
becf0737 AG |
202 | { |
203 | switch (port_mode[0]) { | |
181b250c | 204 | case OMAP_EHCI_PORT_MODE_PHY: |
becf0737 AG |
205 | omap_mux_init_signal("usbb1_ulpiphy_stp", |
206 | OMAP_PIN_OUTPUT); | |
207 | omap_mux_init_signal("usbb1_ulpiphy_clk", | |
208 | OMAP_PIN_INPUT_PULLDOWN); | |
209 | omap_mux_init_signal("usbb1_ulpiphy_dir", | |
210 | OMAP_PIN_INPUT_PULLDOWN); | |
211 | omap_mux_init_signal("usbb1_ulpiphy_nxt", | |
212 | OMAP_PIN_INPUT_PULLDOWN); | |
213 | omap_mux_init_signal("usbb1_ulpiphy_dat0", | |
214 | OMAP_PIN_INPUT_PULLDOWN); | |
215 | omap_mux_init_signal("usbb1_ulpiphy_dat1", | |
216 | OMAP_PIN_INPUT_PULLDOWN); | |
217 | omap_mux_init_signal("usbb1_ulpiphy_dat2", | |
218 | OMAP_PIN_INPUT_PULLDOWN); | |
219 | omap_mux_init_signal("usbb1_ulpiphy_dat3", | |
220 | OMAP_PIN_INPUT_PULLDOWN); | |
221 | omap_mux_init_signal("usbb1_ulpiphy_dat4", | |
222 | OMAP_PIN_INPUT_PULLDOWN); | |
223 | omap_mux_init_signal("usbb1_ulpiphy_dat5", | |
224 | OMAP_PIN_INPUT_PULLDOWN); | |
225 | omap_mux_init_signal("usbb1_ulpiphy_dat6", | |
226 | OMAP_PIN_INPUT_PULLDOWN); | |
227 | omap_mux_init_signal("usbb1_ulpiphy_dat7", | |
228 | OMAP_PIN_INPUT_PULLDOWN); | |
229 | break; | |
181b250c | 230 | case OMAP_EHCI_PORT_MODE_TLL: |
becf0737 AG |
231 | omap_mux_init_signal("usbb1_ulpitll_stp", |
232 | OMAP_PIN_INPUT_PULLUP); | |
233 | omap_mux_init_signal("usbb1_ulpitll_clk", | |
234 | OMAP_PIN_INPUT_PULLDOWN); | |
235 | omap_mux_init_signal("usbb1_ulpitll_dir", | |
236 | OMAP_PIN_INPUT_PULLDOWN); | |
237 | omap_mux_init_signal("usbb1_ulpitll_nxt", | |
238 | OMAP_PIN_INPUT_PULLDOWN); | |
239 | omap_mux_init_signal("usbb1_ulpitll_dat0", | |
240 | OMAP_PIN_INPUT_PULLDOWN); | |
241 | omap_mux_init_signal("usbb1_ulpitll_dat1", | |
242 | OMAP_PIN_INPUT_PULLDOWN); | |
243 | omap_mux_init_signal("usbb1_ulpitll_dat2", | |
244 | OMAP_PIN_INPUT_PULLDOWN); | |
245 | omap_mux_init_signal("usbb1_ulpitll_dat3", | |
246 | OMAP_PIN_INPUT_PULLDOWN); | |
247 | omap_mux_init_signal("usbb1_ulpitll_dat4", | |
248 | OMAP_PIN_INPUT_PULLDOWN); | |
249 | omap_mux_init_signal("usbb1_ulpitll_dat5", | |
250 | OMAP_PIN_INPUT_PULLDOWN); | |
251 | omap_mux_init_signal("usbb1_ulpitll_dat6", | |
252 | OMAP_PIN_INPUT_PULLDOWN); | |
253 | omap_mux_init_signal("usbb1_ulpitll_dat7", | |
254 | OMAP_PIN_INPUT_PULLDOWN); | |
255 | break; | |
181b250c | 256 | case OMAP_USBHS_PORT_MODE_UNUSED: |
becf0737 AG |
257 | default: |
258 | break; | |
259 | } | |
260 | switch (port_mode[1]) { | |
181b250c | 261 | case OMAP_EHCI_PORT_MODE_PHY: |
becf0737 AG |
262 | omap_mux_init_signal("usbb2_ulpiphy_stp", |
263 | OMAP_PIN_OUTPUT); | |
264 | omap_mux_init_signal("usbb2_ulpiphy_clk", | |
265 | OMAP_PIN_INPUT_PULLDOWN); | |
266 | omap_mux_init_signal("usbb2_ulpiphy_dir", | |
267 | OMAP_PIN_INPUT_PULLDOWN); | |
268 | omap_mux_init_signal("usbb2_ulpiphy_nxt", | |
269 | OMAP_PIN_INPUT_PULLDOWN); | |
270 | omap_mux_init_signal("usbb2_ulpiphy_dat0", | |
271 | OMAP_PIN_INPUT_PULLDOWN); | |
272 | omap_mux_init_signal("usbb2_ulpiphy_dat1", | |
273 | OMAP_PIN_INPUT_PULLDOWN); | |
274 | omap_mux_init_signal("usbb2_ulpiphy_dat2", | |
275 | OMAP_PIN_INPUT_PULLDOWN); | |
276 | omap_mux_init_signal("usbb2_ulpiphy_dat3", | |
277 | OMAP_PIN_INPUT_PULLDOWN); | |
278 | omap_mux_init_signal("usbb2_ulpiphy_dat4", | |
279 | OMAP_PIN_INPUT_PULLDOWN); | |
280 | omap_mux_init_signal("usbb2_ulpiphy_dat5", | |
281 | OMAP_PIN_INPUT_PULLDOWN); | |
282 | omap_mux_init_signal("usbb2_ulpiphy_dat6", | |
283 | OMAP_PIN_INPUT_PULLDOWN); | |
284 | omap_mux_init_signal("usbb2_ulpiphy_dat7", | |
285 | OMAP_PIN_INPUT_PULLDOWN); | |
286 | break; | |
181b250c | 287 | case OMAP_EHCI_PORT_MODE_TLL: |
becf0737 AG |
288 | omap_mux_init_signal("usbb2_ulpitll_stp", |
289 | OMAP_PIN_INPUT_PULLUP); | |
290 | omap_mux_init_signal("usbb2_ulpitll_clk", | |
291 | OMAP_PIN_INPUT_PULLDOWN); | |
292 | omap_mux_init_signal("usbb2_ulpitll_dir", | |
293 | OMAP_PIN_INPUT_PULLDOWN); | |
294 | omap_mux_init_signal("usbb2_ulpitll_nxt", | |
295 | OMAP_PIN_INPUT_PULLDOWN); | |
296 | omap_mux_init_signal("usbb2_ulpitll_dat0", | |
297 | OMAP_PIN_INPUT_PULLDOWN); | |
298 | omap_mux_init_signal("usbb2_ulpitll_dat1", | |
299 | OMAP_PIN_INPUT_PULLDOWN); | |
300 | omap_mux_init_signal("usbb2_ulpitll_dat2", | |
301 | OMAP_PIN_INPUT_PULLDOWN); | |
302 | omap_mux_init_signal("usbb2_ulpitll_dat3", | |
303 | OMAP_PIN_INPUT_PULLDOWN); | |
304 | omap_mux_init_signal("usbb2_ulpitll_dat4", | |
305 | OMAP_PIN_INPUT_PULLDOWN); | |
306 | omap_mux_init_signal("usbb2_ulpitll_dat5", | |
307 | OMAP_PIN_INPUT_PULLDOWN); | |
308 | omap_mux_init_signal("usbb2_ulpitll_dat6", | |
309 | OMAP_PIN_INPUT_PULLDOWN); | |
310 | omap_mux_init_signal("usbb2_ulpitll_dat7", | |
311 | OMAP_PIN_INPUT_PULLDOWN); | |
312 | break; | |
181b250c | 313 | case OMAP_USBHS_PORT_MODE_UNUSED: |
becf0737 AG |
314 | default: |
315 | break; | |
316 | } | |
317 | } | |
318 | ||
1512f0db | 319 | static void __init setup_ohci_io_mux(const enum usbhs_omap_port_mode *port_mode) |
95344fcc AG |
320 | { |
321 | switch (port_mode[0]) { | |
322 | case OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0: | |
323 | case OMAP_OHCI_PORT_MODE_PHY_6PIN_DPDM: | |
324 | case OMAP_OHCI_PORT_MODE_TLL_6PIN_DATSE0: | |
325 | case OMAP_OHCI_PORT_MODE_TLL_6PIN_DPDM: | |
326 | omap_mux_init_signal("mm1_rxdp", | |
327 | OMAP_PIN_INPUT_PULLDOWN); | |
328 | omap_mux_init_signal("mm1_rxdm", | |
329 | OMAP_PIN_INPUT_PULLDOWN); | |
330 | /* FALLTHROUGH */ | |
331 | case OMAP_OHCI_PORT_MODE_PHY_4PIN_DPDM: | |
332 | case OMAP_OHCI_PORT_MODE_TLL_4PIN_DPDM: | |
333 | omap_mux_init_signal("mm1_rxrcv", | |
334 | OMAP_PIN_INPUT_PULLDOWN); | |
335 | /* FALLTHROUGH */ | |
336 | case OMAP_OHCI_PORT_MODE_PHY_3PIN_DATSE0: | |
337 | case OMAP_OHCI_PORT_MODE_TLL_3PIN_DATSE0: | |
338 | omap_mux_init_signal("mm1_txen_n", OMAP_PIN_OUTPUT); | |
339 | /* FALLTHROUGH */ | |
340 | case OMAP_OHCI_PORT_MODE_TLL_2PIN_DATSE0: | |
341 | case OMAP_OHCI_PORT_MODE_TLL_2PIN_DPDM: | |
342 | omap_mux_init_signal("mm1_txse0", | |
343 | OMAP_PIN_INPUT_PULLDOWN); | |
344 | omap_mux_init_signal("mm1_txdat", | |
345 | OMAP_PIN_INPUT_PULLDOWN); | |
346 | break; | |
181b250c | 347 | case OMAP_USBHS_PORT_MODE_UNUSED: |
95344fcc AG |
348 | /* FALLTHROUGH */ |
349 | default: | |
350 | break; | |
351 | } | |
352 | switch (port_mode[1]) { | |
353 | case OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0: | |
354 | case OMAP_OHCI_PORT_MODE_PHY_6PIN_DPDM: | |
355 | case OMAP_OHCI_PORT_MODE_TLL_6PIN_DATSE0: | |
356 | case OMAP_OHCI_PORT_MODE_TLL_6PIN_DPDM: | |
357 | omap_mux_init_signal("mm2_rxdp", | |
358 | OMAP_PIN_INPUT_PULLDOWN); | |
359 | omap_mux_init_signal("mm2_rxdm", | |
360 | OMAP_PIN_INPUT_PULLDOWN); | |
361 | /* FALLTHROUGH */ | |
362 | case OMAP_OHCI_PORT_MODE_PHY_4PIN_DPDM: | |
363 | case OMAP_OHCI_PORT_MODE_TLL_4PIN_DPDM: | |
364 | omap_mux_init_signal("mm2_rxrcv", | |
365 | OMAP_PIN_INPUT_PULLDOWN); | |
366 | /* FALLTHROUGH */ | |
367 | case OMAP_OHCI_PORT_MODE_PHY_3PIN_DATSE0: | |
368 | case OMAP_OHCI_PORT_MODE_TLL_3PIN_DATSE0: | |
369 | omap_mux_init_signal("mm2_txen_n", OMAP_PIN_OUTPUT); | |
370 | /* FALLTHROUGH */ | |
371 | case OMAP_OHCI_PORT_MODE_TLL_2PIN_DATSE0: | |
372 | case OMAP_OHCI_PORT_MODE_TLL_2PIN_DPDM: | |
373 | omap_mux_init_signal("mm2_txse0", | |
374 | OMAP_PIN_INPUT_PULLDOWN); | |
375 | omap_mux_init_signal("mm2_txdat", | |
376 | OMAP_PIN_INPUT_PULLDOWN); | |
377 | break; | |
181b250c | 378 | case OMAP_USBHS_PORT_MODE_UNUSED: |
95344fcc AG |
379 | /* FALLTHROUGH */ |
380 | default: | |
381 | break; | |
382 | } | |
383 | switch (port_mode[2]) { | |
384 | case OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0: | |
385 | case OMAP_OHCI_PORT_MODE_PHY_6PIN_DPDM: | |
386 | case OMAP_OHCI_PORT_MODE_TLL_6PIN_DATSE0: | |
387 | case OMAP_OHCI_PORT_MODE_TLL_6PIN_DPDM: | |
388 | omap_mux_init_signal("mm3_rxdp", | |
389 | OMAP_PIN_INPUT_PULLDOWN); | |
390 | omap_mux_init_signal("mm3_rxdm", | |
391 | OMAP_PIN_INPUT_PULLDOWN); | |
392 | /* FALLTHROUGH */ | |
393 | case OMAP_OHCI_PORT_MODE_PHY_4PIN_DPDM: | |
394 | case OMAP_OHCI_PORT_MODE_TLL_4PIN_DPDM: | |
395 | omap_mux_init_signal("mm3_rxrcv", | |
396 | OMAP_PIN_INPUT_PULLDOWN); | |
397 | /* FALLTHROUGH */ | |
398 | case OMAP_OHCI_PORT_MODE_PHY_3PIN_DATSE0: | |
399 | case OMAP_OHCI_PORT_MODE_TLL_3PIN_DATSE0: | |
400 | omap_mux_init_signal("mm3_txen_n", OMAP_PIN_OUTPUT); | |
401 | /* FALLTHROUGH */ | |
402 | case OMAP_OHCI_PORT_MODE_TLL_2PIN_DATSE0: | |
403 | case OMAP_OHCI_PORT_MODE_TLL_2PIN_DPDM: | |
404 | omap_mux_init_signal("mm3_txse0", | |
405 | OMAP_PIN_INPUT_PULLDOWN); | |
406 | omap_mux_init_signal("mm3_txdat", | |
407 | OMAP_PIN_INPUT_PULLDOWN); | |
408 | break; | |
181b250c | 409 | case OMAP_USBHS_PORT_MODE_UNUSED: |
95344fcc AG |
410 | /* FALLTHROUGH */ |
411 | default: | |
412 | break; | |
413 | } | |
414 | } | |
415 | ||
1512f0db IG |
416 | static |
417 | void __init setup_4430ohci_io_mux(const enum usbhs_omap_port_mode *port_mode) | |
2236396d KM |
418 | { |
419 | switch (port_mode[0]) { | |
420 | case OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0: | |
421 | case OMAP_OHCI_PORT_MODE_PHY_6PIN_DPDM: | |
422 | case OMAP_OHCI_PORT_MODE_TLL_6PIN_DATSE0: | |
423 | case OMAP_OHCI_PORT_MODE_TLL_6PIN_DPDM: | |
424 | omap_mux_init_signal("usbb1_mm_rxdp", | |
425 | OMAP_PIN_INPUT_PULLDOWN); | |
426 | omap_mux_init_signal("usbb1_mm_rxdm", | |
427 | OMAP_PIN_INPUT_PULLDOWN); | |
428 | ||
429 | case OMAP_OHCI_PORT_MODE_PHY_4PIN_DPDM: | |
430 | case OMAP_OHCI_PORT_MODE_TLL_4PIN_DPDM: | |
431 | omap_mux_init_signal("usbb1_mm_rxrcv", | |
432 | OMAP_PIN_INPUT_PULLDOWN); | |
433 | ||
434 | case OMAP_OHCI_PORT_MODE_PHY_3PIN_DATSE0: | |
435 | case OMAP_OHCI_PORT_MODE_TLL_3PIN_DATSE0: | |
436 | omap_mux_init_signal("usbb1_mm_txen", | |
437 | OMAP_PIN_INPUT_PULLDOWN); | |
438 | ||
439 | ||
440 | case OMAP_OHCI_PORT_MODE_TLL_2PIN_DATSE0: | |
441 | case OMAP_OHCI_PORT_MODE_TLL_2PIN_DPDM: | |
442 | omap_mux_init_signal("usbb1_mm_txdat", | |
443 | OMAP_PIN_INPUT_PULLDOWN); | |
444 | omap_mux_init_signal("usbb1_mm_txse0", | |
445 | OMAP_PIN_INPUT_PULLDOWN); | |
446 | break; | |
447 | ||
448 | case OMAP_USBHS_PORT_MODE_UNUSED: | |
449 | default: | |
450 | break; | |
451 | } | |
452 | ||
453 | switch (port_mode[1]) { | |
454 | case OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0: | |
455 | case OMAP_OHCI_PORT_MODE_PHY_6PIN_DPDM: | |
456 | case OMAP_OHCI_PORT_MODE_TLL_6PIN_DATSE0: | |
457 | case OMAP_OHCI_PORT_MODE_TLL_6PIN_DPDM: | |
458 | omap_mux_init_signal("usbb2_mm_rxdp", | |
459 | OMAP_PIN_INPUT_PULLDOWN); | |
460 | omap_mux_init_signal("usbb2_mm_rxdm", | |
461 | OMAP_PIN_INPUT_PULLDOWN); | |
462 | ||
463 | case OMAP_OHCI_PORT_MODE_PHY_4PIN_DPDM: | |
464 | case OMAP_OHCI_PORT_MODE_TLL_4PIN_DPDM: | |
465 | omap_mux_init_signal("usbb2_mm_rxrcv", | |
466 | OMAP_PIN_INPUT_PULLDOWN); | |
467 | ||
468 | case OMAP_OHCI_PORT_MODE_PHY_3PIN_DATSE0: | |
469 | case OMAP_OHCI_PORT_MODE_TLL_3PIN_DATSE0: | |
470 | omap_mux_init_signal("usbb2_mm_txen", | |
471 | OMAP_PIN_INPUT_PULLDOWN); | |
472 | ||
473 | ||
474 | case OMAP_OHCI_PORT_MODE_TLL_2PIN_DATSE0: | |
475 | case OMAP_OHCI_PORT_MODE_TLL_2PIN_DPDM: | |
476 | omap_mux_init_signal("usbb2_mm_txdat", | |
477 | OMAP_PIN_INPUT_PULLDOWN); | |
478 | omap_mux_init_signal("usbb2_mm_txse0", | |
479 | OMAP_PIN_INPUT_PULLDOWN); | |
480 | break; | |
481 | ||
482 | case OMAP_USBHS_PORT_MODE_UNUSED: | |
483 | default: | |
484 | break; | |
485 | } | |
486 | } | |
487 | ||
2236396d KM |
488 | void __init usbhs_init(const struct usbhs_omap_board_data *pdata) |
489 | { | |
50b2a9bd | 490 | struct omap_hwmod *oh[2]; |
abe763f2 | 491 | struct platform_device *pdev; |
50b2a9bd KM |
492 | int bus_id = -1; |
493 | int i; | |
2236396d KM |
494 | |
495 | for (i = 0; i < OMAP3_HS_USB_PORTS; i++) { | |
496 | usbhs_data.port_mode[i] = pdata->port_mode[i]; | |
497 | ohci_data.port_mode[i] = pdata->port_mode[i]; | |
498 | ehci_data.port_mode[i] = pdata->port_mode[i]; | |
499 | ehci_data.reset_gpio_port[i] = pdata->reset_gpio_port[i]; | |
500 | ehci_data.regulator[i] = pdata->regulator[i]; | |
501 | } | |
502 | ehci_data.phy_reset = pdata->phy_reset; | |
503 | ohci_data.es2_compatibility = pdata->es2_compatibility; | |
504 | usbhs_data.ehci_data = &ehci_data; | |
505 | usbhs_data.ohci_data = &ohci_data; | |
506 | ||
507 | if (cpu_is_omap34xx()) { | |
2236396d KM |
508 | setup_ehci_io_mux(pdata->port_mode); |
509 | setup_ohci_io_mux(pdata->port_mode); | |
510 | } else if (cpu_is_omap44xx()) { | |
2236396d KM |
511 | setup_4430ehci_io_mux(pdata->port_mode); |
512 | setup_4430ohci_io_mux(pdata->port_mode); | |
513 | } | |
514 | ||
50b2a9bd KM |
515 | oh[0] = omap_hwmod_lookup(USBHS_UHH_HWMODNAME); |
516 | if (!oh[0]) { | |
517 | pr_err("Could not look up %s\n", USBHS_UHH_HWMODNAME); | |
518 | return; | |
2236396d KM |
519 | } |
520 | ||
50b2a9bd KM |
521 | oh[1] = omap_hwmod_lookup(USBHS_TLL_HWMODNAME); |
522 | if (!oh[1]) { | |
523 | pr_err("Could not look up %s\n", USBHS_TLL_HWMODNAME); | |
524 | return; | |
525 | } | |
2236396d | 526 | |
abe763f2 | 527 | pdev = omap_device_build_ss(OMAP_USBHS_DEVICE, bus_id, oh, 2, |
50b2a9bd KM |
528 | (void *)&usbhs_data, sizeof(usbhs_data), |
529 | omap_uhhtll_latency, | |
530 | ARRAY_SIZE(omap_uhhtll_latency), false); | |
abe763f2 | 531 | if (IS_ERR(pdev)) { |
50b2a9bd KM |
532 | pr_err("Could not build hwmod devices %s,%s\n", |
533 | USBHS_UHH_HWMODNAME, USBHS_TLL_HWMODNAME); | |
534 | return; | |
535 | } | |
2236396d KM |
536 | } |
537 | ||
95344fcc AG |
538 | #else |
539 | ||
2236396d KM |
540 | void __init usbhs_init(const struct usbhs_omap_board_data *pdata) |
541 | { | |
542 | } | |
543 | ||
2236396d | 544 | #endif |