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c0718df4 PW |
1 | /* |
2 | * OMAP3/4 Voltage Processor (VP) structure and macro definitions | |
3 | * | |
4 | * Copyright (C) 2007, 2010 Texas Instruments, Inc. | |
5 | * Rajendra Nayak <rnayak@ti.com> | |
6 | * Lesly A M <x0080970@ti.com> | |
7 | * Thara Gopinath <thara@ti.com> | |
8 | * | |
9 | * Copyright (C) 2008, 2011 Nokia Corporation | |
10 | * Kalle Jokiniemi | |
11 | * Paul Walmsley | |
12 | * | |
13 | * This program is free software; you can redistribute it and/or | |
14 | * modify it under the terms of the GNU General Public License version | |
15 | * 2 as published by the Free Software Foundation. | |
16 | */ | |
17 | #ifndef __ARCH_ARM_MACH_OMAP2_VP_H | |
18 | #define __ARCH_ARM_MACH_OMAP2_VP_H | |
19 | ||
20 | #include <linux/kernel.h> | |
21 | ||
01f48d30 KH |
22 | struct voltagedomain; |
23 | ||
c0718df4 PW |
24 | /* XXX document */ |
25 | #define VP_IDLE_TIMEOUT 200 | |
26 | #define VP_TRANXDONE_TIMEOUT 300 | |
27 | ||
58aaa599 KH |
28 | /** |
29 | * struct omap_vp_ops - per-VP operations | |
30 | * @check_txdone: check for VP transaction done | |
31 | * @clear_txdone: clear VP transaction done status | |
32 | */ | |
33 | struct omap_vp_ops { | |
34 | u32 (*check_txdone)(u8 vp_id); | |
35 | void (*clear_txdone)(u8 vp_id); | |
36 | }; | |
c0718df4 PW |
37 | |
38 | /** | |
b7ea803e | 39 | * struct omap_vp_common - register data common to all VDDs |
0ec3041e | 40 | * @vpconfig_erroroffset_mask: ERROROFFSET bitmask in the PRM_VP*_CONFIG reg |
c0718df4 PW |
41 | * @vpconfig_errorgain_mask: ERRORGAIN bitmask in the PRM_VP*_CONFIG reg |
42 | * @vpconfig_initvoltage_mask: INITVOLTAGE bitmask in the PRM_VP*_CONFIG reg | |
0ec3041e | 43 | * @vpconfig_timeouten: TIMEOUT bitmask in the PRM_VP*_CONFIG reg |
c0718df4 PW |
44 | * @vpconfig_initvdd: INITVDD bitmask in the PRM_VP*_CONFIG reg |
45 | * @vpconfig_forceupdate: FORCEUPDATE bitmask in the PRM_VP*_CONFIG reg | |
46 | * @vpconfig_vpenable: VPENABLE bitmask in the PRM_VP*_CONFIG reg | |
47 | * @vpconfig_erroroffset_shift: ERROROFFSET field shift in PRM_VP*_CONFIG reg | |
48 | * @vpconfig_errorgain_shift: ERRORGAIN field shift in PRM_VP*_CONFIG reg | |
49 | * @vpconfig_initvoltage_shift: INITVOLTAGE field shift in PRM_VP*_CONFIG reg | |
0ec3041e KH |
50 | * @vstepmin_stepmin_shift: VSTEPMIN field shift in the PRM_VP*_VSTEPMIN reg |
51 | * @vstepmin_smpswaittimemin_shift: SMPSWAITTIMEMIN field shift in PRM_VP*_VSTEPMIN reg | |
52 | * @vstepmax_stepmax_shift: VSTEPMAX field shift in the PRM_VP*_VSTEPMAX reg | |
53 | * @vstepmax_smpswaittimemax_shift: SMPSWAITTIMEMAX field shift in PRM_VP*_VSTEPMAX reg | |
54 | * @vlimitto_vddmin_shift: VDDMIN field shift in PRM_VP*_VLIMITTO reg | |
55 | * @vlimitto_vddmax_shift: VDDMAX field shift in PRM_VP*_VLIMITTO reg | |
56 | * @vlimitto_timeout_shift: TIMEOUT field shift in PRM_VP*_VLIMITTO reg | |
bea30ed6 | 57 | * @vpvoltage_mask: VPVOLTAGE field mask in PRM_VP*_VOLTAGE reg |
c0718df4 | 58 | */ |
b7ea803e | 59 | struct omap_vp_common { |
0ec3041e | 60 | u32 vpconfig_erroroffset_mask; |
c0718df4 PW |
61 | u32 vpconfig_errorgain_mask; |
62 | u32 vpconfig_initvoltage_mask; | |
0ec3041e KH |
63 | u8 vpconfig_timeouten; |
64 | u8 vpconfig_initvdd; | |
65 | u8 vpconfig_forceupdate; | |
66 | u8 vpconfig_vpenable; | |
c0718df4 PW |
67 | u8 vstepmin_stepmin_shift; |
68 | u8 vstepmin_smpswaittimemin_shift; | |
69 | u8 vstepmax_stepmax_shift; | |
70 | u8 vstepmax_smpswaittimemax_shift; | |
71 | u8 vlimitto_vddmin_shift; | |
72 | u8 vlimitto_vddmax_shift; | |
73 | u8 vlimitto_timeout_shift; | |
bea30ed6 | 74 | u8 vpvoltage_mask; |
c0718df4 | 75 | |
58aaa599 | 76 | const struct omap_vp_ops *ops; |
c0718df4 PW |
77 | }; |
78 | ||
79 | /** | |
b7ea803e KH |
80 | * struct omap_vp_instance - VP register offsets (per-VDD) |
81 | * @common: pointer to struct omap_vp_common * for this SoC | |
c0718df4 PW |
82 | * @vpconfig: PRM_VP*_CONFIG reg offset from PRM start |
83 | * @vstepmin: PRM_VP*_VSTEPMIN reg offset from PRM start | |
84 | * @vlimitto: PRM_VP*_VLIMITTO reg offset from PRM start | |
85 | * @vstatus: PRM_VP*_VSTATUS reg offset from PRM start | |
86 | * @voltage: PRM_VP*_VOLTAGE reg offset from PRM start | |
58aaa599 | 87 | * @id: Unique identifier for VP instance. |
b7ea803e | 88 | * @enabled: flag to keep track of whether vp is enabled or not |
c0718df4 PW |
89 | * |
90 | * XXX vp_common is probably not needed since it is per-SoC | |
91 | */ | |
b7ea803e KH |
92 | struct omap_vp_instance { |
93 | const struct omap_vp_common *common; | |
c0718df4 PW |
94 | u8 vpconfig; |
95 | u8 vstepmin; | |
96 | u8 vstepmax; | |
97 | u8 vlimitto; | |
98 | u8 vstatus; | |
99 | u8 voltage; | |
58aaa599 | 100 | u8 id; |
b7ea803e | 101 | bool enabled; |
c0718df4 PW |
102 | }; |
103 | ||
b7ea803e KH |
104 | extern struct omap_vp_instance omap3_vp_mpu; |
105 | extern struct omap_vp_instance omap3_vp_core; | |
c0718df4 | 106 | |
b7ea803e KH |
107 | extern struct omap_vp_instance omap4_vp_mpu; |
108 | extern struct omap_vp_instance omap4_vp_iva; | |
109 | extern struct omap_vp_instance omap4_vp_core; | |
c0718df4 | 110 | |
8b5d8c0d TK |
111 | extern struct omap_vp_param omap3_mpu_vp_data; |
112 | extern struct omap_vp_param omap3_core_vp_data; | |
113 | ||
114 | extern struct omap_vp_param omap4_mpu_vp_data; | |
115 | extern struct omap_vp_param omap4_iva_vp_data; | |
116 | extern struct omap_vp_param omap4_core_vp_data; | |
117 | ||
01f48d30 KH |
118 | void omap_vp_init(struct voltagedomain *voltdm); |
119 | void omap_vp_enable(struct voltagedomain *voltdm); | |
120 | void omap_vp_disable(struct voltagedomain *voltdm); | |
01f48d30 KH |
121 | int omap_vp_forceupdate_scale(struct voltagedomain *voltdm, |
122 | unsigned long target_volt); | |
76ea7424 KH |
123 | int omap_vp_update_errorgain(struct voltagedomain *voltdm, |
124 | unsigned long target_volt); | |
01f48d30 | 125 | |
c0718df4 | 126 | #endif |