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Linux 2.6.25-rc4
[deliverable/linux.git] / arch / arm / mach-orion / common.c
CommitLineData
585cf175
TP		 1/*
2 * arch/arm/mach-orion/common.c
3 *
4 * Core functions for Marvell Orion System On Chip
5 *
6 * Maintainer: Tzachi Perelstein <tzachi@marvell.com>
7 *
8 * This file is licensed under the terms of the GNU General Public
9 * License version 2. This program is licensed "as is" without any
10 * warranty of any kind, whether express or implied.
11 */
12
13#include <linux/kernel.h>
14#include <linux/init.h>
ca26f7d3
TP		 15#include <linux/platform_device.h>
16#include <linux/serial_8250.h>
e07c9d85 17#include <linux/mv643xx_eth.h>
144aa3db 18#include <linux/mv643xx_i2c.h>
585cf175 19#include <asm/page.h>
c67de5b3 20#include <asm/timex.h>
585cf175 21#include <asm/mach/map.h>
f244baa3 22#include <asm/arch/hardware.h>
585cf175
TP		 23#include "common.h"
24
25/*****************************************************************************
26 * I/O Address Mapping
27 ****************************************************************************/
28static struct map_desc orion_io_desc[] __initdata = {
29 {
7f74c2c7
LB		 30 .virtual = ORION_REGS_VIRT_BASE,
31 .pfn = __phys_to_pfn(ORION_REGS_PHYS_BASE),
585cf175
TP		 32 .length = ORION_REGS_SIZE,
33 .type = MT_DEVICE
34 },
35 {
7f74c2c7
LB		 36 .virtual = ORION_PCIE_IO_VIRT_BASE,
37 .pfn = __phys_to_pfn(ORION_PCIE_IO_PHYS_BASE),
585cf175
TP		 38 .length = ORION_PCIE_IO_SIZE,
39 .type = MT_DEVICE
40 },
41 {
7f74c2c7
LB		 42 .virtual = ORION_PCI_IO_VIRT_BASE,
43 .pfn = __phys_to_pfn(ORION_PCI_IO_PHYS_BASE),
585cf175
TP		 44 .length = ORION_PCI_IO_SIZE,
45 .type = MT_DEVICE
46 },
47 {
7f74c2c7
LB		 48 .virtual = ORION_PCIE_WA_VIRT_BASE,
49 .pfn = __phys_to_pfn(ORION_PCIE_WA_PHYS_BASE),
585cf175
TP		 50 .length = ORION_PCIE_WA_SIZE,
51 .type = MT_DEVICE
52 },
53};
54
55void __init orion_map_io(void)
56{
57 iotable_init(orion_io_desc, ARRAY_SIZE(orion_io_desc));
58}
c67de5b3 59
ca26f7d3
TP		 60/*****************************************************************************
61 * UART
62 ****************************************************************************/
63
64static struct resource orion_uart_resources[] = {
65 {
7f74c2c7
LB		 66 .start = UART0_PHYS_BASE,
67 .end = UART0_PHYS_BASE + 0xff,
ca26f7d3
TP		 68 .flags = IORESOURCE_MEM,
69 },
70 {
71 .start = IRQ_ORION_UART0,
72 .end = IRQ_ORION_UART0,
73 .flags = IORESOURCE_IRQ,
74 },
75 {
7f74c2c7
LB		 76 .start = UART1_PHYS_BASE,
77 .end = UART1_PHYS_BASE + 0xff,
ca26f7d3
TP		 78 .flags = IORESOURCE_MEM,
79 },
80 {
81 .start = IRQ_ORION_UART1,
82 .end = IRQ_ORION_UART1,
83 .flags = IORESOURCE_IRQ,
84 },
85};
86
87static struct plat_serial8250_port orion_uart_data[] = {
88 {
7f74c2c7
LB		 89 .mapbase = UART0_PHYS_BASE,
90 .membase = (char *)UART0_VIRT_BASE,
ca26f7d3
TP		 91 .irq = IRQ_ORION_UART0,
92 .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
93 .iotype = UPIO_MEM,
94 .regshift = 2,
95 .uartclk = ORION_TCLK,
96 },
97 {
7f74c2c7
LB		 98 .mapbase = UART1_PHYS_BASE,
99 .membase = (char *)UART1_VIRT_BASE,
ca26f7d3
TP		 100 .irq = IRQ_ORION_UART1,
101 .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
102 .iotype = UPIO_MEM,
103 .regshift = 2,
104 .uartclk = ORION_TCLK,
105 },
106 { },
107};
108
109static struct platform_device orion_uart = {
110 .name = "serial8250",
111 .id = PLAT8250_DEV_PLATFORM,
112 .dev = {
113 .platform_data = orion_uart_data,
114 },
115 .resource = orion_uart_resources,
116 .num_resources = ARRAY_SIZE(orion_uart_resources),
117};
118
119/*******************************************************************************
120 * USB Controller - 2 interfaces
121 ******************************************************************************/
122
123static struct resource orion_ehci0_resources[] = {
124 {
7f74c2c7
LB		 125 .start = ORION_USB0_PHYS_BASE,
126 .end = ORION_USB0_PHYS_BASE + SZ_4K,
ca26f7d3
TP		 127 .flags = IORESOURCE_MEM,
128 },
129 {
130 .start = IRQ_ORION_USB0_CTRL,
131 .end = IRQ_ORION_USB0_CTRL,
132 .flags = IORESOURCE_IRQ,
133 },
134};
135
136static struct resource orion_ehci1_resources[] = {
137 {
7f74c2c7
LB		 138 .start = ORION_USB1_PHYS_BASE,
139 .end = ORION_USB1_PHYS_BASE + SZ_4K,
ca26f7d3
TP		 140 .flags = IORESOURCE_MEM,
141 },
142 {
143 .start = IRQ_ORION_USB1_CTRL,
144 .end = IRQ_ORION_USB1_CTRL,
145 .flags = IORESOURCE_IRQ,
146 },
147};
148
149static u64 ehci_dmamask = 0xffffffffUL;
150
151static struct platform_device orion_ehci0 = {
152 .name = "orion-ehci",
153 .id = 0,
154 .dev = {
155 .dma_mask = &ehci_dmamask,
156 .coherent_dma_mask = 0xffffffff,
157 },
158 .resource = orion_ehci0_resources,
159 .num_resources = ARRAY_SIZE(orion_ehci0_resources),
160};
161
162static struct platform_device orion_ehci1 = {
163 .name = "orion-ehci",
164 .id = 1,
165 .dev = {
166 .dma_mask = &ehci_dmamask,
167 .coherent_dma_mask = 0xffffffff,
168 },
169 .resource = orion_ehci1_resources,
170 .num_resources = ARRAY_SIZE(orion_ehci1_resources),
171};
172
e07c9d85
TP		 173/*****************************************************************************
174 * Gigabit Ethernet port
175 * (The Orion and Discovery (MV643xx) families use the same Ethernet driver)
176 ****************************************************************************/
177
178static struct resource orion_eth_shared_resources[] = {
179 {
7f74c2c7
LB		 180 .start = ORION_ETH_PHYS_BASE,
181 .end = ORION_ETH_PHYS_BASE + 0xffff,
e07c9d85
TP		 182 .flags = IORESOURCE_MEM,
183 },
184};
185
186static struct platform_device orion_eth_shared = {
187 .name = MV643XX_ETH_SHARED_NAME,
188 .id = 0,
189 .num_resources = 1,
190 .resource = orion_eth_shared_resources,
191};
192
193static struct resource orion_eth_resources[] = {
194 {
195 .name = "eth irq",
196 .start = IRQ_ORION_ETH_SUM,
197 .end = IRQ_ORION_ETH_SUM,
198 .flags = IORESOURCE_IRQ,
199 }
200};
201
202static struct platform_device orion_eth = {
203 .name = MV643XX_ETH_NAME,
204 .id = 0,
205 .num_resources = 1,
206 .resource = orion_eth_resources,
207};
208
209void __init orion_eth_init(struct mv643xx_eth_platform_data *eth_data)
210{
211 orion_eth.dev.platform_data = eth_data;
212 platform_device_register(&orion_eth_shared);
213 platform_device_register(&orion_eth);
214}
215
144aa3db
HVR		 216/*****************************************************************************
217 * I2C controller
218 * (The Orion and Discovery (MV643xx) families share the same I2C controller)
219 ****************************************************************************/
220
221static struct mv64xxx_i2c_pdata orion_i2c_pdata = {
222 .freq_m = 8, /* assumes 166 MHz TCLK */
223 .freq_n = 3,
224 .timeout = 1000, /* Default timeout of 1 second */
225};
226
227static struct resource orion_i2c_resources[] = {
228 {
229 .name = "i2c base",
7f74c2c7
LB		 230 .start = I2C_PHYS_BASE,
231 .end = I2C_PHYS_BASE + 0x20 -1,
144aa3db
HVR		 232 .flags = IORESOURCE_MEM,
233 },
234 {
235 .name = "i2c irq",
236 .start = IRQ_ORION_I2C,
237 .end = IRQ_ORION_I2C,
238 .flags = IORESOURCE_IRQ,
239 },
240};
241
242static struct platform_device orion_i2c = {
243 .name = MV64XXX_I2C_CTLR_NAME,
244 .id = 0,
245 .num_resources = ARRAY_SIZE(orion_i2c_resources),
246 .resource = orion_i2c_resources,
247 .dev = {
248 .platform_data = &orion_i2c_pdata,
249 },
250};
251
f244baa3
SB		 252/*****************************************************************************
253 * Sata port
254 ****************************************************************************/
255static struct resource orion_sata_resources[] = {
256 {
257 .name = "sata base",
7f74c2c7
LB		 258 .start = ORION_SATA_PHYS_BASE,
259 .end = ORION_SATA_PHYS_BASE + 0x5000 - 1,
f244baa3
SB		 260 .flags = IORESOURCE_MEM,
261 },
262 {
263 .name = "sata irq",
264 .start = IRQ_ORION_SATA,
265 .end = IRQ_ORION_SATA,
266 .flags = IORESOURCE_IRQ,
267 },
268};
269
270static struct platform_device orion_sata = {
271 .name = "sata_mv",
272 .id = 0,
273 .dev = {
274 .coherent_dma_mask = 0xffffffff,
275 },
276 .num_resources = ARRAY_SIZE(orion_sata_resources),
277 .resource = orion_sata_resources,
278};
279
280void __init orion_sata_init(struct mv_sata_platform_data *sata_data)
281{
282 orion_sata.dev.platform_data = sata_data;
283 platform_device_register(&orion_sata);
284}
285
c67de5b3
TP		 286/*****************************************************************************
287 * General
288 ****************************************************************************/
289
290/*
291 * Identify device ID and rev from PCIE configuration header space '0'.
292 */
293static void orion_id(u32 *dev, u32 *rev, char **dev_name)
294{
295 orion_pcie_id(dev, rev);
296
297 if (*dev == MV88F5281_DEV_ID) {
298 if (*rev == MV88F5281_REV_D2) {
299 *dev_name = "MV88F5281-D2";
300 } else if (*rev == MV88F5281_REV_D1) {
301 *dev_name = "MV88F5281-D1";
302 } else {
303 *dev_name = "MV88F5281-Rev-Unsupported";
304 }
305 } else if (*dev == MV88F5182_DEV_ID) {
306 if (*rev == MV88F5182_REV_A2) {
307 *dev_name = "MV88F5182-A2";
308 } else {
309 *dev_name = "MV88F5182-Rev-Unsupported";
310 }
c9e3de94
HVR		 311 } else if (*dev == MV88F5181_DEV_ID) {
312 if (*rev == MV88F5181_REV_B1) {
313 *dev_name = "MV88F5181-Rev-B1";
314 } else {
315 *dev_name = "MV88F5181-Rev-Unsupported";
316 }
c67de5b3
TP		 317 } else {
318 *dev_name = "Device-Unknown";
319 }
320}
321
322void __init orion_init(void)
323{
324 char *dev_name;
325 u32 dev, rev;
326
327 orion_id(&dev, &rev, &dev_name);
328 printk(KERN_INFO "Orion ID: %s. TCLK=%d.\n", dev_name, ORION_TCLK);
329
330 /*
331 * Setup Orion address map
332 */
333 orion_setup_cpu_wins();
334 orion_setup_usb_wins();
335 orion_setup_eth_wins();
336 orion_setup_pci_wins();
337 orion_setup_pcie_wins();
338 if (dev == MV88F5182_DEV_ID)
339 orion_setup_sata_wins();
ca26f7d3
TP		 340
341 /*
342 * REgister devices
343 */
344 platform_device_register(&orion_uart);
345 platform_device_register(&orion_ehci0);
346 if (dev == MV88F5182_DEV_ID)
347 platform_device_register(&orion_ehci1);
144aa3db 348 platform_device_register(&orion_i2c);
c67de5b3 349}
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