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8f58de7c | 1 | #include <linux/module.h> |
2 | #include <linux/kernel.h> | |
3 | #include <linux/init.h> | |
4 | #include <linux/platform_device.h> | |
5 | #include <linux/dma-mapping.h> | |
8348c259 | 6 | #include <linux/spi/pxa2xx_spi.h> |
b459396e | 7 | #include <linux/i2c/pxa-i2c.h> |
8f58de7c | 8 | |
09a5358d | 9 | #include <asm/pmu.h> |
a09e64fb | 10 | #include <mach/udc.h> |
69f22be7 | 11 | #include <mach/pxa3xx-u2d.h> |
a09e64fb RK |
12 | #include <mach/pxafb.h> |
13 | #include <mach/mmc.h> | |
14 | #include <mach/irda.h> | |
a09e64fb | 15 | #include <mach/ohci.h> |
4a2490ea | 16 | #include <plat/pxa27x_keypad.h> |
a09e64fb RK |
17 | #include <mach/camera.h> |
18 | #include <mach/audio.h> | |
75e874c6 | 19 | #include <mach/hardware.h> |
82b95ecb | 20 | #include <plat/pxa3xx_nand.h> |
8f58de7c | 21 | |
22 | #include "devices.h" | |
bc3a5959 | 23 | #include "generic.h" |
8f58de7c | 24 | |
25 | void __init pxa_register_device(struct platform_device *dev, void *data) | |
26 | { | |
27 | int ret; | |
28 | ||
29 | dev->dev.platform_data = data; | |
30 | ||
31 | ret = platform_device_register(dev); | |
32 | if (ret) | |
33 | dev_err(&dev->dev, "unable to register device: %d\n", ret); | |
34 | } | |
35 | ||
09a5358d EM |
36 | static struct resource pxa_resource_pmu = { |
37 | .start = IRQ_PMU, | |
38 | .end = IRQ_PMU, | |
39 | .flags = IORESOURCE_IRQ, | |
40 | }; | |
41 | ||
42 | struct platform_device pxa_device_pmu = { | |
43 | .name = "arm-pmu", | |
44 | .id = ARM_PMU_DEVICE_CPU, | |
45 | .resource = &pxa_resource_pmu, | |
46 | .num_resources = 1, | |
47 | }; | |
48 | ||
8f58de7c | 49 | static struct resource pxamci_resources[] = { |
50 | [0] = { | |
51 | .start = 0x41100000, | |
52 | .end = 0x41100fff, | |
53 | .flags = IORESOURCE_MEM, | |
54 | }, | |
55 | [1] = { | |
56 | .start = IRQ_MMC, | |
57 | .end = IRQ_MMC, | |
58 | .flags = IORESOURCE_IRQ, | |
59 | }, | |
60 | [2] = { | |
61 | .start = 21, | |
62 | .end = 21, | |
63 | .flags = IORESOURCE_DMA, | |
64 | }, | |
65 | [3] = { | |
66 | .start = 22, | |
67 | .end = 22, | |
68 | .flags = IORESOURCE_DMA, | |
69 | }, | |
70 | }; | |
71 | ||
72 | static u64 pxamci_dmamask = 0xffffffffUL; | |
73 | ||
74 | struct platform_device pxa_device_mci = { | |
75 | .name = "pxa2xx-mci", | |
fafc9d3f | 76 | .id = 0, |
8f58de7c | 77 | .dev = { |
78 | .dma_mask = &pxamci_dmamask, | |
79 | .coherent_dma_mask = 0xffffffff, | |
80 | }, | |
81 | .num_resources = ARRAY_SIZE(pxamci_resources), | |
82 | .resource = pxamci_resources, | |
83 | }; | |
84 | ||
85 | void __init pxa_set_mci_info(struct pxamci_platform_data *info) | |
86 | { | |
87 | pxa_register_device(&pxa_device_mci, info); | |
88 | } | |
89 | ||
90 | ||
1257629b PZ |
91 | static struct pxa2xx_udc_mach_info pxa_udc_info = { |
92 | .gpio_pullup = -1, | |
1257629b | 93 | }; |
8f58de7c | 94 | |
95 | void __init pxa_set_udc_info(struct pxa2xx_udc_mach_info *info) | |
96 | { | |
97 | memcpy(&pxa_udc_info, info, sizeof *info); | |
98 | } | |
99 | ||
100 | static struct resource pxa2xx_udc_resources[] = { | |
101 | [0] = { | |
102 | .start = 0x40600000, | |
103 | .end = 0x4060ffff, | |
104 | .flags = IORESOURCE_MEM, | |
105 | }, | |
106 | [1] = { | |
107 | .start = IRQ_USB, | |
108 | .end = IRQ_USB, | |
109 | .flags = IORESOURCE_IRQ, | |
110 | }, | |
111 | }; | |
112 | ||
113 | static u64 udc_dma_mask = ~(u32)0; | |
114 | ||
7a857620 PZ |
115 | struct platform_device pxa25x_device_udc = { |
116 | .name = "pxa25x-udc", | |
117 | .id = -1, | |
118 | .resource = pxa2xx_udc_resources, | |
119 | .num_resources = ARRAY_SIZE(pxa2xx_udc_resources), | |
120 | .dev = { | |
121 | .platform_data = &pxa_udc_info, | |
122 | .dma_mask = &udc_dma_mask, | |
123 | } | |
124 | }; | |
125 | ||
126 | struct platform_device pxa27x_device_udc = { | |
127 | .name = "pxa27x-udc", | |
8f58de7c | 128 | .id = -1, |
129 | .resource = pxa2xx_udc_resources, | |
130 | .num_resources = ARRAY_SIZE(pxa2xx_udc_resources), | |
131 | .dev = { | |
132 | .platform_data = &pxa_udc_info, | |
133 | .dma_mask = &udc_dma_mask, | |
134 | } | |
135 | }; | |
136 | ||
69f22be7 IG |
137 | #ifdef CONFIG_PXA3xx |
138 | static struct resource pxa3xx_u2d_resources[] = { | |
139 | [0] = { | |
140 | .start = 0x54100000, | |
141 | .end = 0x54100fff, | |
142 | .flags = IORESOURCE_MEM, | |
143 | }, | |
144 | [1] = { | |
145 | .start = IRQ_USB2, | |
146 | .end = IRQ_USB2, | |
147 | .flags = IORESOURCE_IRQ, | |
148 | }, | |
149 | }; | |
150 | ||
151 | struct platform_device pxa3xx_device_u2d = { | |
152 | .name = "pxa3xx-u2d", | |
153 | .id = -1, | |
154 | .resource = pxa3xx_u2d_resources, | |
155 | .num_resources = ARRAY_SIZE(pxa3xx_u2d_resources), | |
156 | }; | |
157 | ||
158 | void __init pxa3xx_set_u2d_info(struct pxa3xx_u2d_platform_data *info) | |
159 | { | |
160 | pxa_register_device(&pxa3xx_device_u2d, info); | |
161 | } | |
162 | #endif /* CONFIG_PXA3xx */ | |
163 | ||
8f58de7c | 164 | static struct resource pxafb_resources[] = { |
165 | [0] = { | |
166 | .start = 0x44000000, | |
167 | .end = 0x4400ffff, | |
168 | .flags = IORESOURCE_MEM, | |
169 | }, | |
170 | [1] = { | |
171 | .start = IRQ_LCD, | |
172 | .end = IRQ_LCD, | |
173 | .flags = IORESOURCE_IRQ, | |
174 | }, | |
175 | }; | |
176 | ||
177 | static u64 fb_dma_mask = ~(u64)0; | |
178 | ||
179 | struct platform_device pxa_device_fb = { | |
180 | .name = "pxa2xx-fb", | |
181 | .id = -1, | |
182 | .dev = { | |
183 | .dma_mask = &fb_dma_mask, | |
184 | .coherent_dma_mask = 0xffffffff, | |
185 | }, | |
186 | .num_resources = ARRAY_SIZE(pxafb_resources), | |
187 | .resource = pxafb_resources, | |
188 | }; | |
189 | ||
4321e1a1 | 190 | void __init pxa_set_fb_info(struct device *parent, struct pxafb_mach_info *info) |
8f58de7c | 191 | { |
4321e1a1 | 192 | pxa_device_fb.dev.parent = parent; |
8f58de7c | 193 | pxa_register_device(&pxa_device_fb, info); |
194 | } | |
195 | ||
8f58de7c | 196 | static struct resource pxa_resource_ffuart[] = { |
197 | { | |
02f65262 EM |
198 | .start = 0x40100000, |
199 | .end = 0x40100023, | |
8f58de7c | 200 | .flags = IORESOURCE_MEM, |
201 | }, { | |
202 | .start = IRQ_FFUART, | |
203 | .end = IRQ_FFUART, | |
204 | .flags = IORESOURCE_IRQ, | |
205 | } | |
206 | }; | |
207 | ||
cc155c6f | 208 | struct platform_device pxa_device_ffuart = { |
8f58de7c | 209 | .name = "pxa2xx-uart", |
210 | .id = 0, | |
211 | .resource = pxa_resource_ffuart, | |
212 | .num_resources = ARRAY_SIZE(pxa_resource_ffuart), | |
213 | }; | |
214 | ||
cc155c6f RK |
215 | void __init pxa_set_ffuart_info(void *info) |
216 | { | |
217 | pxa_register_device(&pxa_device_ffuart, info); | |
218 | } | |
219 | ||
8f58de7c | 220 | static struct resource pxa_resource_btuart[] = { |
221 | { | |
02f65262 EM |
222 | .start = 0x40200000, |
223 | .end = 0x40200023, | |
8f58de7c | 224 | .flags = IORESOURCE_MEM, |
225 | }, { | |
226 | .start = IRQ_BTUART, | |
227 | .end = IRQ_BTUART, | |
228 | .flags = IORESOURCE_IRQ, | |
229 | } | |
230 | }; | |
231 | ||
232 | struct platform_device pxa_device_btuart = { | |
233 | .name = "pxa2xx-uart", | |
234 | .id = 1, | |
235 | .resource = pxa_resource_btuart, | |
236 | .num_resources = ARRAY_SIZE(pxa_resource_btuart), | |
237 | }; | |
238 | ||
cc155c6f RK |
239 | void __init pxa_set_btuart_info(void *info) |
240 | { | |
241 | pxa_register_device(&pxa_device_btuart, info); | |
242 | } | |
243 | ||
8f58de7c | 244 | static struct resource pxa_resource_stuart[] = { |
245 | { | |
02f65262 EM |
246 | .start = 0x40700000, |
247 | .end = 0x40700023, | |
8f58de7c | 248 | .flags = IORESOURCE_MEM, |
249 | }, { | |
250 | .start = IRQ_STUART, | |
251 | .end = IRQ_STUART, | |
252 | .flags = IORESOURCE_IRQ, | |
253 | } | |
254 | }; | |
255 | ||
256 | struct platform_device pxa_device_stuart = { | |
257 | .name = "pxa2xx-uart", | |
258 | .id = 2, | |
259 | .resource = pxa_resource_stuart, | |
260 | .num_resources = ARRAY_SIZE(pxa_resource_stuart), | |
261 | }; | |
262 | ||
cc155c6f RK |
263 | void __init pxa_set_stuart_info(void *info) |
264 | { | |
265 | pxa_register_device(&pxa_device_stuart, info); | |
266 | } | |
267 | ||
8f58de7c | 268 | static struct resource pxa_resource_hwuart[] = { |
269 | { | |
02f65262 EM |
270 | .start = 0x41600000, |
271 | .end = 0x4160002F, | |
8f58de7c | 272 | .flags = IORESOURCE_MEM, |
273 | }, { | |
274 | .start = IRQ_HWUART, | |
275 | .end = IRQ_HWUART, | |
276 | .flags = IORESOURCE_IRQ, | |
277 | } | |
278 | }; | |
279 | ||
280 | struct platform_device pxa_device_hwuart = { | |
281 | .name = "pxa2xx-uart", | |
282 | .id = 3, | |
283 | .resource = pxa_resource_hwuart, | |
284 | .num_resources = ARRAY_SIZE(pxa_resource_hwuart), | |
285 | }; | |
286 | ||
cc155c6f RK |
287 | void __init pxa_set_hwuart_info(void *info) |
288 | { | |
289 | if (cpu_is_pxa255()) | |
290 | pxa_register_device(&pxa_device_hwuart, info); | |
291 | else | |
292 | pr_info("UART: Ignoring attempt to register HWUART on non-PXA255 hardware"); | |
293 | } | |
294 | ||
8f58de7c | 295 | static struct resource pxai2c_resources[] = { |
296 | { | |
297 | .start = 0x40301680, | |
298 | .end = 0x403016a3, | |
299 | .flags = IORESOURCE_MEM, | |
300 | }, { | |
301 | .start = IRQ_I2C, | |
302 | .end = IRQ_I2C, | |
303 | .flags = IORESOURCE_IRQ, | |
304 | }, | |
305 | }; | |
306 | ||
307 | struct platform_device pxa_device_i2c = { | |
308 | .name = "pxa2xx-i2c", | |
309 | .id = 0, | |
310 | .resource = pxai2c_resources, | |
311 | .num_resources = ARRAY_SIZE(pxai2c_resources), | |
312 | }; | |
313 | ||
314 | void __init pxa_set_i2c_info(struct i2c_pxa_platform_data *info) | |
315 | { | |
316 | pxa_register_device(&pxa_device_i2c, info); | |
317 | } | |
318 | ||
99464293 EM |
319 | #ifdef CONFIG_PXA27x |
320 | static struct resource pxa27x_resources_i2c_power[] = { | |
321 | { | |
322 | .start = 0x40f00180, | |
323 | .end = 0x40f001a3, | |
324 | .flags = IORESOURCE_MEM, | |
325 | }, { | |
326 | .start = IRQ_PWRI2C, | |
327 | .end = IRQ_PWRI2C, | |
328 | .flags = IORESOURCE_IRQ, | |
329 | }, | |
330 | }; | |
331 | ||
332 | struct platform_device pxa27x_device_i2c_power = { | |
333 | .name = "pxa2xx-i2c", | |
334 | .id = 1, | |
335 | .resource = pxa27x_resources_i2c_power, | |
336 | .num_resources = ARRAY_SIZE(pxa27x_resources_i2c_power), | |
337 | }; | |
338 | #endif | |
339 | ||
8f58de7c | 340 | static struct resource pxai2s_resources[] = { |
341 | { | |
342 | .start = 0x40400000, | |
343 | .end = 0x40400083, | |
344 | .flags = IORESOURCE_MEM, | |
345 | }, { | |
346 | .start = IRQ_I2S, | |
347 | .end = IRQ_I2S, | |
348 | .flags = IORESOURCE_IRQ, | |
349 | }, | |
350 | }; | |
351 | ||
352 | struct platform_device pxa_device_i2s = { | |
353 | .name = "pxa2xx-i2s", | |
354 | .id = -1, | |
355 | .resource = pxai2s_resources, | |
356 | .num_resources = ARRAY_SIZE(pxai2s_resources), | |
357 | }; | |
358 | ||
f0fba2ad LG |
359 | struct platform_device pxa_device_asoc_ssp1 = { |
360 | .name = "pxa-ssp-dai", | |
361 | .id = 0, | |
362 | }; | |
363 | ||
364 | struct platform_device pxa_device_asoc_ssp2= { | |
365 | .name = "pxa-ssp-dai", | |
366 | .id = 1, | |
367 | }; | |
368 | ||
369 | struct platform_device pxa_device_asoc_ssp3 = { | |
370 | .name = "pxa-ssp-dai", | |
371 | .id = 2, | |
372 | }; | |
373 | ||
374 | struct platform_device pxa_device_asoc_ssp4 = { | |
375 | .name = "pxa-ssp-dai", | |
376 | .id = 3, | |
377 | }; | |
378 | ||
379 | struct platform_device pxa_device_asoc_platform = { | |
380 | .name = "pxa-pcm-audio", | |
381 | .id = -1, | |
382 | }; | |
383 | ||
8f58de7c | 384 | static u64 pxaficp_dmamask = ~(u32)0; |
385 | ||
386 | struct platform_device pxa_device_ficp = { | |
387 | .name = "pxa2xx-ir", | |
388 | .id = -1, | |
389 | .dev = { | |
390 | .dma_mask = &pxaficp_dmamask, | |
391 | .coherent_dma_mask = 0xffffffff, | |
392 | }, | |
393 | }; | |
394 | ||
395 | void __init pxa_set_ficp_info(struct pxaficp_platform_data *info) | |
396 | { | |
397 | pxa_register_device(&pxa_device_ficp, info); | |
398 | } | |
399 | ||
72493146 RJ |
400 | static struct resource pxa_rtc_resources[] = { |
401 | [0] = { | |
402 | .start = 0x40900000, | |
403 | .end = 0x40900000 + 0x3b, | |
404 | .flags = IORESOURCE_MEM, | |
405 | }, | |
406 | [1] = { | |
407 | .start = IRQ_RTC1Hz, | |
408 | .end = IRQ_RTC1Hz, | |
409 | .flags = IORESOURCE_IRQ, | |
410 | }, | |
411 | [2] = { | |
412 | .start = IRQ_RTCAlrm, | |
413 | .end = IRQ_RTCAlrm, | |
414 | .flags = IORESOURCE_IRQ, | |
415 | }, | |
416 | }; | |
417 | ||
418 | struct platform_device sa1100_device_rtc = { | |
8f58de7c | 419 | .name = "sa1100-rtc", |
420 | .id = -1, | |
421 | }; | |
422 | ||
72493146 RJ |
423 | struct platform_device pxa_device_rtc = { |
424 | .name = "pxa-rtc", | |
425 | .id = -1, | |
426 | .num_resources = ARRAY_SIZE(pxa_rtc_resources), | |
427 | .resource = pxa_rtc_resources, | |
428 | }; | |
429 | ||
9f19d638 MB |
430 | static struct resource pxa_ac97_resources[] = { |
431 | [0] = { | |
432 | .start = 0x40500000, | |
433 | .end = 0x40500000 + 0xfff, | |
434 | .flags = IORESOURCE_MEM, | |
435 | }, | |
436 | [1] = { | |
437 | .start = IRQ_AC97, | |
438 | .end = IRQ_AC97, | |
439 | .flags = IORESOURCE_IRQ, | |
440 | }, | |
441 | }; | |
442 | ||
443 | static u64 pxa_ac97_dmamask = 0xffffffffUL; | |
444 | ||
445 | struct platform_device pxa_device_ac97 = { | |
446 | .name = "pxa2xx-ac97", | |
447 | .id = -1, | |
448 | .dev = { | |
449 | .dma_mask = &pxa_ac97_dmamask, | |
450 | .coherent_dma_mask = 0xffffffff, | |
451 | }, | |
452 | .num_resources = ARRAY_SIZE(pxa_ac97_resources), | |
453 | .resource = pxa_ac97_resources, | |
454 | }; | |
455 | ||
456 | void __init pxa_set_ac97_info(pxa2xx_audio_ops_t *ops) | |
457 | { | |
458 | pxa_register_device(&pxa_device_ac97, ops); | |
459 | } | |
460 | ||
8f58de7c | 461 | #ifdef CONFIG_PXA25x |
462 | ||
75540c1a | 463 | static struct resource pxa25x_resource_pwm0[] = { |
464 | [0] = { | |
465 | .start = 0x40b00000, | |
466 | .end = 0x40b0000f, | |
467 | .flags = IORESOURCE_MEM, | |
468 | }, | |
469 | }; | |
470 | ||
471 | struct platform_device pxa25x_device_pwm0 = { | |
472 | .name = "pxa25x-pwm", | |
473 | .id = 0, | |
474 | .resource = pxa25x_resource_pwm0, | |
475 | .num_resources = ARRAY_SIZE(pxa25x_resource_pwm0), | |
476 | }; | |
477 | ||
478 | static struct resource pxa25x_resource_pwm1[] = { | |
479 | [0] = { | |
480 | .start = 0x40c00000, | |
481 | .end = 0x40c0000f, | |
482 | .flags = IORESOURCE_MEM, | |
483 | }, | |
484 | }; | |
485 | ||
486 | struct platform_device pxa25x_device_pwm1 = { | |
487 | .name = "pxa25x-pwm", | |
488 | .id = 1, | |
489 | .resource = pxa25x_resource_pwm1, | |
490 | .num_resources = ARRAY_SIZE(pxa25x_resource_pwm1), | |
491 | }; | |
492 | ||
8f58de7c | 493 | static u64 pxa25x_ssp_dma_mask = DMA_BIT_MASK(32); |
494 | ||
495 | static struct resource pxa25x_resource_ssp[] = { | |
496 | [0] = { | |
497 | .start = 0x41000000, | |
498 | .end = 0x4100001f, | |
499 | .flags = IORESOURCE_MEM, | |
500 | }, | |
501 | [1] = { | |
502 | .start = IRQ_SSP, | |
503 | .end = IRQ_SSP, | |
504 | .flags = IORESOURCE_IRQ, | |
505 | }, | |
506 | [2] = { | |
507 | /* DRCMR for RX */ | |
508 | .start = 13, | |
509 | .end = 13, | |
510 | .flags = IORESOURCE_DMA, | |
511 | }, | |
512 | [3] = { | |
513 | /* DRCMR for TX */ | |
514 | .start = 14, | |
515 | .end = 14, | |
516 | .flags = IORESOURCE_DMA, | |
517 | }, | |
518 | }; | |
519 | ||
520 | struct platform_device pxa25x_device_ssp = { | |
521 | .name = "pxa25x-ssp", | |
522 | .id = 0, | |
523 | .dev = { | |
524 | .dma_mask = &pxa25x_ssp_dma_mask, | |
525 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
526 | }, | |
527 | .resource = pxa25x_resource_ssp, | |
528 | .num_resources = ARRAY_SIZE(pxa25x_resource_ssp), | |
529 | }; | |
530 | ||
531 | static u64 pxa25x_nssp_dma_mask = DMA_BIT_MASK(32); | |
532 | ||
533 | static struct resource pxa25x_resource_nssp[] = { | |
534 | [0] = { | |
535 | .start = 0x41400000, | |
536 | .end = 0x4140002f, | |
537 | .flags = IORESOURCE_MEM, | |
538 | }, | |
539 | [1] = { | |
540 | .start = IRQ_NSSP, | |
541 | .end = IRQ_NSSP, | |
542 | .flags = IORESOURCE_IRQ, | |
543 | }, | |
544 | [2] = { | |
545 | /* DRCMR for RX */ | |
546 | .start = 15, | |
547 | .end = 15, | |
548 | .flags = IORESOURCE_DMA, | |
549 | }, | |
550 | [3] = { | |
551 | /* DRCMR for TX */ | |
552 | .start = 16, | |
553 | .end = 16, | |
554 | .flags = IORESOURCE_DMA, | |
555 | }, | |
556 | }; | |
557 | ||
558 | struct platform_device pxa25x_device_nssp = { | |
559 | .name = "pxa25x-nssp", | |
560 | .id = 1, | |
561 | .dev = { | |
562 | .dma_mask = &pxa25x_nssp_dma_mask, | |
563 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
564 | }, | |
565 | .resource = pxa25x_resource_nssp, | |
566 | .num_resources = ARRAY_SIZE(pxa25x_resource_nssp), | |
567 | }; | |
568 | ||
569 | static u64 pxa25x_assp_dma_mask = DMA_BIT_MASK(32); | |
570 | ||
571 | static struct resource pxa25x_resource_assp[] = { | |
572 | [0] = { | |
573 | .start = 0x41500000, | |
574 | .end = 0x4150002f, | |
575 | .flags = IORESOURCE_MEM, | |
576 | }, | |
577 | [1] = { | |
578 | .start = IRQ_ASSP, | |
579 | .end = IRQ_ASSP, | |
580 | .flags = IORESOURCE_IRQ, | |
581 | }, | |
582 | [2] = { | |
583 | /* DRCMR for RX */ | |
584 | .start = 23, | |
585 | .end = 23, | |
586 | .flags = IORESOURCE_DMA, | |
587 | }, | |
588 | [3] = { | |
589 | /* DRCMR for TX */ | |
590 | .start = 24, | |
591 | .end = 24, | |
592 | .flags = IORESOURCE_DMA, | |
593 | }, | |
594 | }; | |
595 | ||
596 | struct platform_device pxa25x_device_assp = { | |
597 | /* ASSP is basically equivalent to NSSP */ | |
598 | .name = "pxa25x-nssp", | |
599 | .id = 2, | |
600 | .dev = { | |
601 | .dma_mask = &pxa25x_assp_dma_mask, | |
602 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
603 | }, | |
604 | .resource = pxa25x_resource_assp, | |
605 | .num_resources = ARRAY_SIZE(pxa25x_resource_assp), | |
606 | }; | |
607 | #endif /* CONFIG_PXA25x */ | |
608 | ||
609 | #if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx) | |
a4553358 | 610 | static struct resource pxa27x_resource_camera[] = { |
37320980 | 611 | [0] = { |
a4553358 HZ |
612 | .start = 0x50000000, |
613 | .end = 0x50000fff, | |
37320980 | 614 | .flags = IORESOURCE_MEM, |
615 | }, | |
616 | [1] = { | |
a4553358 HZ |
617 | .start = IRQ_CAMERA, |
618 | .end = IRQ_CAMERA, | |
37320980 | 619 | .flags = IORESOURCE_IRQ, |
620 | }, | |
621 | }; | |
622 | ||
a4553358 HZ |
623 | static u64 pxa27x_dma_mask_camera = DMA_BIT_MASK(32); |
624 | ||
625 | static struct platform_device pxa27x_device_camera = { | |
626 | .name = "pxa27x-camera", | |
627 | .id = 0, /* This is used to put cameras on this interface */ | |
628 | .dev = { | |
629 | .dma_mask = &pxa27x_dma_mask_camera, | |
630 | .coherent_dma_mask = 0xffffffff, | |
631 | }, | |
632 | .num_resources = ARRAY_SIZE(pxa27x_resource_camera), | |
633 | .resource = pxa27x_resource_camera, | |
37320980 | 634 | }; |
635 | ||
a4553358 | 636 | void __init pxa_set_camera_info(struct pxacamera_platform_data *info) |
37320980 | 637 | { |
a4553358 | 638 | pxa_register_device(&pxa27x_device_camera, info); |
37320980 | 639 | } |
640 | ||
ec68e45b | 641 | static u64 pxa27x_ohci_dma_mask = DMA_BIT_MASK(32); |
642 | ||
643 | static struct resource pxa27x_resource_ohci[] = { | |
644 | [0] = { | |
645 | .start = 0x4C000000, | |
646 | .end = 0x4C00ff6f, | |
647 | .flags = IORESOURCE_MEM, | |
648 | }, | |
649 | [1] = { | |
650 | .start = IRQ_USBH1, | |
651 | .end = IRQ_USBH1, | |
652 | .flags = IORESOURCE_IRQ, | |
653 | }, | |
654 | }; | |
655 | ||
656 | struct platform_device pxa27x_device_ohci = { | |
657 | .name = "pxa27x-ohci", | |
658 | .id = -1, | |
659 | .dev = { | |
660 | .dma_mask = &pxa27x_ohci_dma_mask, | |
661 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
662 | }, | |
663 | .num_resources = ARRAY_SIZE(pxa27x_resource_ohci), | |
664 | .resource = pxa27x_resource_ohci, | |
665 | }; | |
666 | ||
667 | void __init pxa_set_ohci_info(struct pxaohci_platform_data *info) | |
668 | { | |
669 | pxa_register_device(&pxa27x_device_ohci, info); | |
670 | } | |
a4553358 HZ |
671 | #endif /* CONFIG_PXA27x || CONFIG_PXA3xx */ |
672 | ||
673 | #if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx) || defined(CONFIG_PXA95x) | |
674 | static struct resource pxa27x_resource_keypad[] = { | |
675 | [0] = { | |
676 | .start = 0x41500000, | |
677 | .end = 0x4150004c, | |
678 | .flags = IORESOURCE_MEM, | |
679 | }, | |
680 | [1] = { | |
681 | .start = IRQ_KEYPAD, | |
682 | .end = IRQ_KEYPAD, | |
683 | .flags = IORESOURCE_IRQ, | |
684 | }, | |
685 | }; | |
686 | ||
687 | struct platform_device pxa27x_device_keypad = { | |
688 | .name = "pxa27x-keypad", | |
689 | .id = -1, | |
690 | .resource = pxa27x_resource_keypad, | |
691 | .num_resources = ARRAY_SIZE(pxa27x_resource_keypad), | |
692 | }; | |
693 | ||
694 | void __init pxa_set_keypad_info(struct pxa27x_keypad_platform_data *info) | |
695 | { | |
696 | pxa_register_device(&pxa27x_device_keypad, info); | |
697 | } | |
ec68e45b | 698 | |
8f58de7c | 699 | static u64 pxa27x_ssp1_dma_mask = DMA_BIT_MASK(32); |
700 | ||
701 | static struct resource pxa27x_resource_ssp1[] = { | |
702 | [0] = { | |
703 | .start = 0x41000000, | |
704 | .end = 0x4100003f, | |
705 | .flags = IORESOURCE_MEM, | |
706 | }, | |
707 | [1] = { | |
708 | .start = IRQ_SSP, | |
709 | .end = IRQ_SSP, | |
710 | .flags = IORESOURCE_IRQ, | |
711 | }, | |
712 | [2] = { | |
713 | /* DRCMR for RX */ | |
714 | .start = 13, | |
715 | .end = 13, | |
716 | .flags = IORESOURCE_DMA, | |
717 | }, | |
718 | [3] = { | |
719 | /* DRCMR for TX */ | |
720 | .start = 14, | |
721 | .end = 14, | |
722 | .flags = IORESOURCE_DMA, | |
723 | }, | |
724 | }; | |
725 | ||
726 | struct platform_device pxa27x_device_ssp1 = { | |
727 | .name = "pxa27x-ssp", | |
728 | .id = 0, | |
729 | .dev = { | |
730 | .dma_mask = &pxa27x_ssp1_dma_mask, | |
731 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
732 | }, | |
733 | .resource = pxa27x_resource_ssp1, | |
734 | .num_resources = ARRAY_SIZE(pxa27x_resource_ssp1), | |
735 | }; | |
736 | ||
737 | static u64 pxa27x_ssp2_dma_mask = DMA_BIT_MASK(32); | |
738 | ||
739 | static struct resource pxa27x_resource_ssp2[] = { | |
740 | [0] = { | |
741 | .start = 0x41700000, | |
742 | .end = 0x4170003f, | |
743 | .flags = IORESOURCE_MEM, | |
744 | }, | |
745 | [1] = { | |
746 | .start = IRQ_SSP2, | |
747 | .end = IRQ_SSP2, | |
748 | .flags = IORESOURCE_IRQ, | |
749 | }, | |
750 | [2] = { | |
751 | /* DRCMR for RX */ | |
752 | .start = 15, | |
753 | .end = 15, | |
754 | .flags = IORESOURCE_DMA, | |
755 | }, | |
756 | [3] = { | |
757 | /* DRCMR for TX */ | |
758 | .start = 16, | |
759 | .end = 16, | |
760 | .flags = IORESOURCE_DMA, | |
761 | }, | |
762 | }; | |
763 | ||
764 | struct platform_device pxa27x_device_ssp2 = { | |
765 | .name = "pxa27x-ssp", | |
766 | .id = 1, | |
767 | .dev = { | |
768 | .dma_mask = &pxa27x_ssp2_dma_mask, | |
769 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
770 | }, | |
771 | .resource = pxa27x_resource_ssp2, | |
772 | .num_resources = ARRAY_SIZE(pxa27x_resource_ssp2), | |
773 | }; | |
774 | ||
775 | static u64 pxa27x_ssp3_dma_mask = DMA_BIT_MASK(32); | |
776 | ||
777 | static struct resource pxa27x_resource_ssp3[] = { | |
778 | [0] = { | |
779 | .start = 0x41900000, | |
780 | .end = 0x4190003f, | |
781 | .flags = IORESOURCE_MEM, | |
782 | }, | |
783 | [1] = { | |
784 | .start = IRQ_SSP3, | |
785 | .end = IRQ_SSP3, | |
786 | .flags = IORESOURCE_IRQ, | |
787 | }, | |
788 | [2] = { | |
789 | /* DRCMR for RX */ | |
790 | .start = 66, | |
791 | .end = 66, | |
792 | .flags = IORESOURCE_DMA, | |
793 | }, | |
794 | [3] = { | |
795 | /* DRCMR for TX */ | |
796 | .start = 67, | |
797 | .end = 67, | |
798 | .flags = IORESOURCE_DMA, | |
799 | }, | |
800 | }; | |
801 | ||
802 | struct platform_device pxa27x_device_ssp3 = { | |
803 | .name = "pxa27x-ssp", | |
804 | .id = 2, | |
805 | .dev = { | |
806 | .dma_mask = &pxa27x_ssp3_dma_mask, | |
807 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
808 | }, | |
809 | .resource = pxa27x_resource_ssp3, | |
810 | .num_resources = ARRAY_SIZE(pxa27x_resource_ssp3), | |
811 | }; | |
3f3acefb | 812 | |
75540c1a | 813 | static struct resource pxa27x_resource_pwm0[] = { |
814 | [0] = { | |
815 | .start = 0x40b00000, | |
816 | .end = 0x40b0001f, | |
817 | .flags = IORESOURCE_MEM, | |
818 | }, | |
819 | }; | |
820 | ||
821 | struct platform_device pxa27x_device_pwm0 = { | |
822 | .name = "pxa27x-pwm", | |
823 | .id = 0, | |
824 | .resource = pxa27x_resource_pwm0, | |
825 | .num_resources = ARRAY_SIZE(pxa27x_resource_pwm0), | |
826 | }; | |
827 | ||
828 | static struct resource pxa27x_resource_pwm1[] = { | |
829 | [0] = { | |
830 | .start = 0x40c00000, | |
831 | .end = 0x40c0001f, | |
832 | .flags = IORESOURCE_MEM, | |
833 | }, | |
834 | }; | |
835 | ||
836 | struct platform_device pxa27x_device_pwm1 = { | |
837 | .name = "pxa27x-pwm", | |
838 | .id = 1, | |
839 | .resource = pxa27x_resource_pwm1, | |
840 | .num_resources = ARRAY_SIZE(pxa27x_resource_pwm1), | |
841 | }; | |
a4553358 | 842 | #endif /* CONFIG_PXA27x || CONFIG_PXA3xx || CONFIG_PXA95x*/ |
8f58de7c | 843 | |
844 | #ifdef CONFIG_PXA3xx | |
8d33b055 BW |
845 | static struct resource pxa3xx_resources_mci2[] = { |
846 | [0] = { | |
847 | .start = 0x42000000, | |
848 | .end = 0x42000fff, | |
849 | .flags = IORESOURCE_MEM, | |
850 | }, | |
851 | [1] = { | |
852 | .start = IRQ_MMC2, | |
853 | .end = IRQ_MMC2, | |
854 | .flags = IORESOURCE_IRQ, | |
855 | }, | |
856 | [2] = { | |
857 | .start = 93, | |
858 | .end = 93, | |
859 | .flags = IORESOURCE_DMA, | |
860 | }, | |
861 | [3] = { | |
862 | .start = 94, | |
863 | .end = 94, | |
864 | .flags = IORESOURCE_DMA, | |
865 | }, | |
866 | }; | |
867 | ||
868 | struct platform_device pxa3xx_device_mci2 = { | |
869 | .name = "pxa2xx-mci", | |
870 | .id = 1, | |
871 | .dev = { | |
872 | .dma_mask = &pxamci_dmamask, | |
873 | .coherent_dma_mask = 0xffffffff, | |
874 | }, | |
875 | .num_resources = ARRAY_SIZE(pxa3xx_resources_mci2), | |
876 | .resource = pxa3xx_resources_mci2, | |
877 | }; | |
878 | ||
879 | void __init pxa3xx_set_mci2_info(struct pxamci_platform_data *info) | |
880 | { | |
881 | pxa_register_device(&pxa3xx_device_mci2, info); | |
882 | } | |
883 | ||
5a1f21b1 BW |
884 | static struct resource pxa3xx_resources_mci3[] = { |
885 | [0] = { | |
886 | .start = 0x42500000, | |
887 | .end = 0x42500fff, | |
888 | .flags = IORESOURCE_MEM, | |
889 | }, | |
890 | [1] = { | |
891 | .start = IRQ_MMC3, | |
892 | .end = IRQ_MMC3, | |
893 | .flags = IORESOURCE_IRQ, | |
894 | }, | |
895 | [2] = { | |
896 | .start = 100, | |
897 | .end = 100, | |
898 | .flags = IORESOURCE_DMA, | |
899 | }, | |
900 | [3] = { | |
901 | .start = 101, | |
902 | .end = 101, | |
903 | .flags = IORESOURCE_DMA, | |
904 | }, | |
905 | }; | |
906 | ||
907 | struct platform_device pxa3xx_device_mci3 = { | |
908 | .name = "pxa2xx-mci", | |
909 | .id = 2, | |
910 | .dev = { | |
911 | .dma_mask = &pxamci_dmamask, | |
912 | .coherent_dma_mask = 0xffffffff, | |
913 | }, | |
914 | .num_resources = ARRAY_SIZE(pxa3xx_resources_mci3), | |
915 | .resource = pxa3xx_resources_mci3, | |
916 | }; | |
917 | ||
918 | void __init pxa3xx_set_mci3_info(struct pxamci_platform_data *info) | |
919 | { | |
920 | pxa_register_device(&pxa3xx_device_mci3, info); | |
921 | } | |
922 | ||
a4553358 HZ |
923 | static struct resource pxa3xx_resources_gcu[] = { |
924 | { | |
925 | .start = 0x54000000, | |
926 | .end = 0x54000fff, | |
927 | .flags = IORESOURCE_MEM, | |
928 | }, | |
929 | { | |
930 | .start = IRQ_GCU, | |
931 | .end = IRQ_GCU, | |
932 | .flags = IORESOURCE_IRQ, | |
933 | }, | |
934 | }; | |
935 | ||
936 | static u64 pxa3xx_gcu_dmamask = DMA_BIT_MASK(32); | |
937 | ||
938 | struct platform_device pxa3xx_device_gcu = { | |
939 | .name = "pxa3xx-gcu", | |
940 | .id = -1, | |
941 | .num_resources = ARRAY_SIZE(pxa3xx_resources_gcu), | |
942 | .resource = pxa3xx_resources_gcu, | |
943 | .dev = { | |
944 | .dma_mask = &pxa3xx_gcu_dmamask, | |
945 | .coherent_dma_mask = 0xffffffff, | |
946 | }, | |
947 | }; | |
948 | ||
949 | #endif /* CONFIG_PXA3xx */ | |
950 | ||
951 | #if defined(CONFIG_PXA3xx) || defined(CONFIG_PXA95x) | |
952 | static struct resource pxa3xx_resources_i2c_power[] = { | |
953 | { | |
954 | .start = 0x40f500c0, | |
955 | .end = 0x40f500d3, | |
956 | .flags = IORESOURCE_MEM, | |
957 | }, { | |
958 | .start = IRQ_PWRI2C, | |
959 | .end = IRQ_PWRI2C, | |
960 | .flags = IORESOURCE_IRQ, | |
961 | }, | |
962 | }; | |
963 | ||
964 | struct platform_device pxa3xx_device_i2c_power = { | |
965 | .name = "pxa3xx-pwri2c", | |
966 | .id = 1, | |
967 | .resource = pxa3xx_resources_i2c_power, | |
968 | .num_resources = ARRAY_SIZE(pxa3xx_resources_i2c_power), | |
969 | }; | |
970 | ||
9ae819a8 EM |
971 | static struct resource pxa3xx_resources_nand[] = { |
972 | [0] = { | |
973 | .start = 0x43100000, | |
974 | .end = 0x43100053, | |
975 | .flags = IORESOURCE_MEM, | |
976 | }, | |
977 | [1] = { | |
978 | .start = IRQ_NAND, | |
979 | .end = IRQ_NAND, | |
980 | .flags = IORESOURCE_IRQ, | |
981 | }, | |
982 | [2] = { | |
983 | /* DRCMR for Data DMA */ | |
984 | .start = 97, | |
985 | .end = 97, | |
986 | .flags = IORESOURCE_DMA, | |
987 | }, | |
988 | [3] = { | |
989 | /* DRCMR for Command DMA */ | |
990 | .start = 99, | |
991 | .end = 99, | |
992 | .flags = IORESOURCE_DMA, | |
993 | }, | |
994 | }; | |
995 | ||
996 | static u64 pxa3xx_nand_dma_mask = DMA_BIT_MASK(32); | |
997 | ||
998 | struct platform_device pxa3xx_device_nand = { | |
999 | .name = "pxa3xx-nand", | |
1000 | .id = -1, | |
1001 | .dev = { | |
1002 | .dma_mask = &pxa3xx_nand_dma_mask, | |
1003 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
1004 | }, | |
1005 | .num_resources = ARRAY_SIZE(pxa3xx_resources_nand), | |
1006 | .resource = pxa3xx_resources_nand, | |
1007 | }; | |
1008 | ||
1009 | void __init pxa3xx_set_nand_info(struct pxa3xx_nand_platform_data *info) | |
1010 | { | |
1011 | pxa_register_device(&pxa3xx_device_nand, info); | |
1012 | } | |
1ff2c33e | 1013 | |
a4553358 HZ |
1014 | static u64 pxa3xx_ssp4_dma_mask = DMA_BIT_MASK(32); |
1015 | ||
1016 | static struct resource pxa3xx_resource_ssp4[] = { | |
1017 | [0] = { | |
1018 | .start = 0x41a00000, | |
1019 | .end = 0x41a0003f, | |
1ff2c33e DM |
1020 | .flags = IORESOURCE_MEM, |
1021 | }, | |
a4553358 HZ |
1022 | [1] = { |
1023 | .start = IRQ_SSP4, | |
1024 | .end = IRQ_SSP4, | |
1ff2c33e DM |
1025 | .flags = IORESOURCE_IRQ, |
1026 | }, | |
a4553358 HZ |
1027 | [2] = { |
1028 | /* DRCMR for RX */ | |
1029 | .start = 2, | |
1030 | .end = 2, | |
1031 | .flags = IORESOURCE_DMA, | |
1032 | }, | |
1033 | [3] = { | |
1034 | /* DRCMR for TX */ | |
1035 | .start = 3, | |
1036 | .end = 3, | |
1037 | .flags = IORESOURCE_DMA, | |
1038 | }, | |
1ff2c33e DM |
1039 | }; |
1040 | ||
a4553358 HZ |
1041 | struct platform_device pxa3xx_device_ssp4 = { |
1042 | /* PXA3xx SSP is basically equivalent to PXA27x */ | |
1043 | .name = "pxa27x-ssp", | |
1044 | .id = 3, | |
1ff2c33e | 1045 | .dev = { |
a4553358 HZ |
1046 | .dma_mask = &pxa3xx_ssp4_dma_mask, |
1047 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
1ff2c33e | 1048 | }, |
a4553358 HZ |
1049 | .resource = pxa3xx_resource_ssp4, |
1050 | .num_resources = ARRAY_SIZE(pxa3xx_resource_ssp4), | |
1ff2c33e | 1051 | }; |
a4553358 | 1052 | #endif /* CONFIG_PXA3xx || CONFIG_PXA95x */ |
e172274c GL |
1053 | |
1054 | /* pxa2xx-spi platform-device ID equals respective SSP platform-device ID + 1. | |
1055 | * See comment in arch/arm/mach-pxa/ssp.c::ssp_probe() */ | |
1056 | void __init pxa2xx_set_spi_info(unsigned id, struct pxa2xx_spi_master *info) | |
1057 | { | |
1058 | struct platform_device *pd; | |
1059 | ||
1060 | pd = platform_device_alloc("pxa2xx-spi", id); | |
1061 | if (pd == NULL) { | |
1062 | printk(KERN_ERR "pxa2xx-spi: failed to allocate device id %d\n", | |
1063 | id); | |
1064 | return; | |
1065 | } | |
1066 | ||
1067 | pd->dev.platform_data = info; | |
1068 | platform_device_add(pd); | |
1069 | } |