[deliverable/linux.git] / arch / arm / mach-pxa / generic.c

/*
 *  linux/arch/arm/mach-pxa/generic.c
 *
 *  Author:	Nicolas Pitre
 *  Created:	Jun 15, 2001
 *  Copyright:	MontaVista Software Inc.
 *
 * Code common to all PXA machines.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * Since this file should be linked before any other machine specific file,
 * the __initcall() here will be executed first.  This serves as default
 * initialization stuff for PXA machines which can be overridden later if
 * need be.
 */
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/platform_device.h>
#include <linux/ioport.h>
#include <linux/pm.h>
#include <linux/string.h>

#include <asm/hardware.h>
#include <asm/irq.h>
#include <asm/system.h>
#include <asm/pgtable.h>
#include <asm/mach/map.h>

#include <asm/arch/pxa-regs.h>
#include <asm/arch/gpio.h>
#include <asm/arch/udc.h>
#include <asm/arch/pxafb.h>
#include <asm/arch/mmc.h>
#include <asm/arch/irda.h>
#include <asm/arch/i2c.h>

#include "devices.h"
#include "generic.h"

/*
 * Get the clock frequency as reflected by CCCR and the turbo flag.
 * We assume these values have been applied via a fcs.
 * If info is not 0 we also display the current settings.
 */
unsigned int get_clk_frequency_khz(int info)
{
	if (cpu_is_pxa21x() || cpu_is_pxa25x())
		return pxa25x_get_clk_frequency_khz(info);
	else
		return pxa27x_get_clk_frequency_khz(info);
}
EXPORT_SYMBOL(get_clk_frequency_khz);

/*
 * Return the current memory clock frequency in units of 10kHz
 */
unsigned int get_memclk_frequency_10khz(void)
{
	if (cpu_is_pxa21x() || cpu_is_pxa25x())
		return pxa25x_get_memclk_frequency_10khz();
	else
		return pxa27x_get_memclk_frequency_10khz();
}
EXPORT_SYMBOL(get_memclk_frequency_10khz);

/*
 * Handy function to set GPIO alternate functions
 */
int pxa_last_gpio;

int pxa_gpio_mode(int gpio_mode)
{
	unsigned long flags;
	int gpio = gpio_mode & GPIO_MD_MASK_NR;
	int fn = (gpio_mode & GPIO_MD_MASK_FN) >> 8;
	int gafr;

	if (gpio > pxa_last_gpio)
		return -EINVAL;

	local_irq_save(flags);
	if (gpio_mode & GPIO_DFLT_LOW)
		GPCR(gpio) = GPIO_bit(gpio);
	else if (gpio_mode & GPIO_DFLT_HIGH)
		GPSR(gpio) = GPIO_bit(gpio);
	if (gpio_mode & GPIO_MD_MASK_DIR)
		GPDR(gpio) |= GPIO_bit(gpio);
	else
		GPDR(gpio) &= ~GPIO_bit(gpio);
	gafr = GAFR(gpio) & ~(0x3 << (((gpio) & 0xf)*2));
	GAFR(gpio) = gafr |  (fn  << (((gpio) & 0xf)*2));
	local_irq_restore(flags);

	return 0;
}

EXPORT_SYMBOL(pxa_gpio_mode);

/*
 * Return GPIO level
 */
int pxa_gpio_get_value(unsigned gpio)
{
	return __gpio_get_value(gpio);
}

EXPORT_SYMBOL(pxa_gpio_get_value);

/*
 * Set output GPIO level
 */
void pxa_gpio_set_value(unsigned gpio, int value)
{
	__gpio_set_value(gpio, value);
}

EXPORT_SYMBOL(pxa_gpio_set_value);

/*
 * Routine to safely enable or disable a clock in the CKEN
 */
void __pxa_set_cken(int clock, int enable)
{
	unsigned long flags;
	local_irq_save(flags);

	if (enable)
		CKEN |= (1 << clock);
	else
		CKEN &= ~(1 << clock);

	local_irq_restore(flags);
}

EXPORT_SYMBOL(__pxa_set_cken);

/*
 * Intel PXA2xx internal register mapping.
 *
 * Note 1: not all PXA2xx variants implement all those addresses.
 *
 * Note 2: virtual 0xfffe0000-0xffffffff is reserved for the vector table
 *         and cache flush area.
 */
static struct map_desc standard_io_desc[] __initdata = {
  	{	/* Devs */
		.virtual	=  0xf2000000,
		.pfn		= __phys_to_pfn(0x40000000),
		.length		= 0x02000000,
		.type		= MT_DEVICE
	}, {	/* LCD */
		.virtual	=  0xf4000000,
		.pfn		= __phys_to_pfn(0x44000000),
		.length		= 0x00100000,
		.type		= MT_DEVICE
	}, {	/* Mem Ctl */
		.virtual	=  0xf6000000,
		.pfn		= __phys_to_pfn(0x48000000),
		.length		= 0x00100000,
		.type		= MT_DEVICE
	}, {	/* USB host */
		.virtual	=  0xf8000000,
		.pfn		= __phys_to_pfn(0x4c000000),
		.length		= 0x00100000,
		.type		= MT_DEVICE
	}, {	/* Camera */
		.virtual	=  0xfa000000,
		.pfn		= __phys_to_pfn(0x50000000),
		.length		= 0x00100000,
		.type		= MT_DEVICE
	}, {	/* IMem ctl */
		.virtual	=  0xfe000000,
		.pfn		= __phys_to_pfn(0x58000000),
		.length		= 0x00100000,
		.type		= MT_DEVICE
	}, {	/* UNCACHED_PHYS_0 */
		.virtual	= 0xff000000,
		.pfn		= __phys_to_pfn(0x00000000),
		.length		= 0x00100000,
		.type		= MT_DEVICE
	}
};

void __init pxa_map_io(void)
{
	iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc));
	get_clk_frequency_khz(1);
}


static struct resource pxamci_resources[] = {
	[0] = {
		.start	= 0x41100000,
		.end	= 0x41100fff,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_MMC,
		.end	= IRQ_MMC,
		.flags	= IORESOURCE_IRQ,
	},
};

static u64 pxamci_dmamask = 0xffffffffUL;

struct platform_device pxa_device_mci = {
	.name		= "pxa2xx-mci",
	.id		= -1,
	.dev		= {
		.dma_mask = &pxamci_dmamask,
		.coherent_dma_mask = 0xffffffff,
	},
	.num_resources	= ARRAY_SIZE(pxamci_resources),
	.resource	= pxamci_resources,
};

void __init pxa_set_mci_info(struct pxamci_platform_data *info)
{
	pxa_device_mci.dev.platform_data = info;
}


static struct pxa2xx_udc_mach_info pxa_udc_info;

void __init pxa_set_udc_info(struct pxa2xx_udc_mach_info *info)
{
	memcpy(&pxa_udc_info, info, sizeof *info);
}

static struct resource pxa2xx_udc_resources[] = {
	[0] = {
		.start	= 0x40600000,
		.end	= 0x4060ffff,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_USB,
		.end	= IRQ_USB,
		.flags	= IORESOURCE_IRQ,
	},
};

static u64 udc_dma_mask = ~(u32)0;

struct platform_device pxa_device_udc = {
	.name		= "pxa2xx-udc",
	.id		= -1,
	.resource	= pxa2xx_udc_resources,
	.num_resources	= ARRAY_SIZE(pxa2xx_udc_resources),
	.dev		=  {
		.platform_data	= &pxa_udc_info,
		.dma_mask	= &udc_dma_mask,
	}
};

static struct resource pxafb_resources[] = {
	[0] = {
		.start	= 0x44000000,
		.end	= 0x4400ffff,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_LCD,
		.end	= IRQ_LCD,
		.flags	= IORESOURCE_IRQ,
	},
};

static u64 fb_dma_mask = ~(u64)0;

struct platform_device pxa_device_fb = {
	.name		= "pxa2xx-fb",
	.id		= -1,
	.dev		= {
		.dma_mask	= &fb_dma_mask,
		.coherent_dma_mask = 0xffffffff,
	},
	.num_resources	= ARRAY_SIZE(pxafb_resources),
	.resource	= pxafb_resources,
};

void __init set_pxa_fb_info(struct pxafb_mach_info *info)
{
	pxa_device_fb.dev.platform_data = info;
}

void __init set_pxa_fb_parent(struct device *parent_dev)
{
	pxa_device_fb.dev.parent = parent_dev;
}

static struct resource pxa_resource_ffuart[] = {
	{
		.start	= __PREG(FFUART),
		.end	= __PREG(FFUART) + 35,
		.flags	= IORESOURCE_MEM,
	}, {
		.start	= IRQ_FFUART,
		.end	= IRQ_FFUART,
		.flags	= IORESOURCE_IRQ,
	}
};

struct platform_device pxa_device_ffuart= {
	.name		= "pxa2xx-uart",
	.id		= 0,
	.resource	= pxa_resource_ffuart,
	.num_resources	= ARRAY_SIZE(pxa_resource_ffuart),
};

static struct resource pxa_resource_btuart[] = {
	{
		.start	= __PREG(BTUART),
		.end	= __PREG(BTUART) + 35,
		.flags	= IORESOURCE_MEM,
	}, {
		.start	= IRQ_BTUART,
		.end	= IRQ_BTUART,
		.flags	= IORESOURCE_IRQ,
	}
};

struct platform_device pxa_device_btuart = {
	.name		= "pxa2xx-uart",
	.id		= 1,
	.resource	= pxa_resource_btuart,
	.num_resources	= ARRAY_SIZE(pxa_resource_btuart),
};

static struct resource pxa_resource_stuart[] = {
	{
		.start	= __PREG(STUART),
		.end	= __PREG(STUART) + 35,
		.flags	= IORESOURCE_MEM,
	}, {
		.start	= IRQ_STUART,
		.end	= IRQ_STUART,
		.flags	= IORESOURCE_IRQ,
	}
};

struct platform_device pxa_device_stuart = {
	.name		= "pxa2xx-uart",
	.id		= 2,
	.resource	= pxa_resource_stuart,
	.num_resources	= ARRAY_SIZE(pxa_resource_stuart),
};

static struct resource pxa_resource_hwuart[] = {
	{
		.start	= __PREG(HWUART),
		.end	= __PREG(HWUART) + 47,
		.flags	= IORESOURCE_MEM,
	}, {
		.start	= IRQ_HWUART,
		.end	= IRQ_HWUART,
		.flags	= IORESOURCE_IRQ,
	}
};

struct platform_device pxa_device_hwuart = {
	.name		= "pxa2xx-uart",
	.id		= 3,
	.resource	= pxa_resource_hwuart,
	.num_resources	= ARRAY_SIZE(pxa_resource_hwuart),
};

static struct resource pxai2c_resources[] = {
	{
		.start	= 0x40301680,
		.end	= 0x403016a3,
		.flags	= IORESOURCE_MEM,
	}, {
		.start	= IRQ_I2C,
		.end	= IRQ_I2C,
		.flags	= IORESOURCE_IRQ,
	},
};

struct platform_device pxa_device_i2c = {
	.name		= "pxa2xx-i2c",
	.id		= 0,
	.resource	= pxai2c_resources,
	.num_resources	= ARRAY_SIZE(pxai2c_resources),
};

void __init pxa_set_i2c_info(struct i2c_pxa_platform_data *info)
{
	pxa_device_i2c.dev.platform_data = info;
}

static struct resource pxai2s_resources[] = {
	{
		.start	= 0x40400000,
		.end	= 0x40400083,
		.flags	= IORESOURCE_MEM,
	}, {
		.start	= IRQ_I2S,
		.end	= IRQ_I2S,
		.flags	= IORESOURCE_IRQ,
	},
};

struct platform_device pxa_device_i2s = {
	.name		= "pxa2xx-i2s",
	.id		= -1,
	.resource	= pxai2s_resources,
	.num_resources	= ARRAY_SIZE(pxai2s_resources),
};

static u64 pxaficp_dmamask = ~(u32)0;

struct platform_device pxa_device_ficp = {
	.name		= "pxa2xx-ir",
	.id		= -1,
	.dev		= {
		.dma_mask = &pxaficp_dmamask,
		.coherent_dma_mask = 0xffffffff,
	},
};

void __init pxa_set_ficp_info(struct pxaficp_platform_data *info)
{
	pxa_device_ficp.dev.platform_data = info;
}

struct platform_device pxa_device_rtc = {
	.name		= "sa1100-rtc",
	.id		= -1,
};
Commit	Line	Data
1da177e4 LT	1	/*
	2	* linux/arch/arm/mach-pxa/generic.c
	3	*
	4	* Author: Nicolas Pitre
	5	* Created: Jun 15, 2001
	6	* Copyright: MontaVista Software Inc.
	7	*
	8	* Code common to all PXA machines.
	9	*
	10	* This program is free software; you can redistribute it and/or modify
	11	* it under the terms of the GNU General Public License version 2 as
	12	* published by the Free Software Foundation.
	13	*
	14	* Since this file should be linked before any other machine specific file,
	15	* the __initcall() here will be executed first. This serves as default
	16	* initialization stuff for PXA machines which can be overridden later if
	17	* need be.
	18	*/
	19	#include <linux/module.h>
	20	#include <linux/kernel.h>
	21	#include <linux/init.h>
	22	#include <linux/delay.h>
d052d1be	23	#include <linux/platform_device.h>
1da177e4 LT	24	#include <linux/ioport.h>
1da177e4 LT	25	#include <linux/pm.h>
4e57b681	26	#include <linux/string.h>
1da177e4 LT	27
	28	#include <asm/hardware.h>
	29	#include <asm/irq.h>
	30	#include <asm/system.h>
	31	#include <asm/pgtable.h>
	32	#include <asm/mach/map.h>
	33
	34	#include <asm/arch/pxa-regs.h>
3deac046	35	#include <asm/arch/gpio.h>
1da177e4 LT	36	#include <asm/arch/udc.h>
	37	#include <asm/arch/pxafb.h>
	38	#include <asm/arch/mmc.h>
6f475c01	39	#include <asm/arch/irda.h>
eb9181a2	40	#include <asm/arch/i2c.h>
1da177e4	41
46c41e62	42	#include "devices.h"
1da177e4 LT	43	#include "generic.h"
1da177e4 LT	44
15a40333 RK	45	/*
	46	* Get the clock frequency as reflected by CCCR and the turbo flag.
	47	* We assume these values have been applied via a fcs.
	48	* If info is not 0 we also display the current settings.
	49	*/
	50	unsigned int get_clk_frequency_khz(int info)
	51	{
	52	if (cpu_is_pxa21x() \|\| cpu_is_pxa25x())
	53	return pxa25x_get_clk_frequency_khz(info);
	54	else
	55	return pxa27x_get_clk_frequency_khz(info);
	56	}
	57	EXPORT_SYMBOL(get_clk_frequency_khz);
	58
	59	/*
	60	* Return the current memory clock frequency in units of 10kHz
	61	*/
	62	unsigned int get_memclk_frequency_10khz(void)
	63	{
	64	if (cpu_is_pxa21x() \|\| cpu_is_pxa25x())
	65	return pxa25x_get_memclk_frequency_10khz();
	66	else
	67	return pxa27x_get_memclk_frequency_10khz();
	68	}
	69	EXPORT_SYMBOL(get_memclk_frequency_10khz);
	70
1da177e4 LT	71	/*
	72	* Handy function to set GPIO alternate functions
	73	*/
30f0b408	74	int pxa_last_gpio;
1da177e4	75
3deac046	76	int pxa_gpio_mode(int gpio_mode)
1da177e4 LT	77	{
	78	unsigned long flags;
	79	int gpio = gpio_mode & GPIO_MD_MASK_NR;
	80	int fn = (gpio_mode & GPIO_MD_MASK_FN) >> 8;
	81	int gafr;
	82
30f0b408	83	if (gpio > pxa_last_gpio)
3deac046 PZ	84	return -EINVAL;
3deac046 PZ	85
1da177e4 LT	86	local_irq_save(flags);
	87	if (gpio_mode & GPIO_DFLT_LOW)
	88	GPCR(gpio) = GPIO_bit(gpio);
	89	else if (gpio_mode & GPIO_DFLT_HIGH)
	90	GPSR(gpio) = GPIO_bit(gpio);
	91	if (gpio_mode & GPIO_MD_MASK_DIR)
	92	GPDR(gpio) \|= GPIO_bit(gpio);
	93	else
	94	GPDR(gpio) &= ~GPIO_bit(gpio);
	95	gafr = GAFR(gpio) & ~(0x3 << (((gpio) & 0xf)*2));
	96	GAFR(gpio) = gafr \| (fn << (((gpio) & 0xf)*2));
	97	local_irq_restore(flags);
3deac046 PZ	98
3deac046 PZ	99	return 0;
1da177e4 LT	100	}
	101
	102	EXPORT_SYMBOL(pxa_gpio_mode);
	103
3deac046 PZ	104	/*
	105	* Return GPIO level
	106	*/
	107	int pxa_gpio_get_value(unsigned gpio)
	108	{
	109	return __gpio_get_value(gpio);
	110	}
	111
	112	EXPORT_SYMBOL(pxa_gpio_get_value);
	113
	114	/*
	115	* Set output GPIO level
	116	*/
	117	void pxa_gpio_set_value(unsigned gpio, int value)
	118	{
	119	__gpio_set_value(gpio, value);
	120	}
	121
	122	EXPORT_SYMBOL(pxa_gpio_set_value);
	123
1da177e4 LT	124	/*
	125	* Routine to safely enable or disable a clock in the CKEN
	126	*/
a7073b8b	127	void __pxa_set_cken(int clock, int enable)
1da177e4 LT	128	{
	129	unsigned long flags;
	130	local_irq_save(flags);
	131
	132	if (enable)
7053acbd	133	CKEN \|= (1 << clock);
1da177e4	134	else
7053acbd	135	CKEN &= ~(1 << clock);
1da177e4 LT	136
	137	local_irq_restore(flags);
	138	}
	139
a7073b8b	140	EXPORT_SYMBOL(__pxa_set_cken);
1da177e4 LT	141
	142	/*
	143	* Intel PXA2xx internal register mapping.
	144	*
	145	* Note 1: not all PXA2xx variants implement all those addresses.
	146	*
	147	* Note 2: virtual 0xfffe0000-0xffffffff is reserved for the vector table
	148	* and cache flush area.
	149	*/
	150	static struct map_desc standard_io_desc[] __initdata = {
6f9182eb DS	151	{ /* Devs */
	152	.virtual = 0xf2000000,
	153	.pfn = __phys_to_pfn(0x40000000),
	154	.length = 0x02000000,
	155	.type = MT_DEVICE
	156	}, { /* LCD */
	157	.virtual = 0xf4000000,
	158	.pfn = __phys_to_pfn(0x44000000),
	159	.length = 0x00100000,
	160	.type = MT_DEVICE
	161	}, { /* Mem Ctl */
	162	.virtual = 0xf6000000,
	163	.pfn = __phys_to_pfn(0x48000000),
	164	.length = 0x00100000,
	165	.type = MT_DEVICE
	166	}, { /* USB host */
	167	.virtual = 0xf8000000,
	168	.pfn = __phys_to_pfn(0x4c000000),
	169	.length = 0x00100000,
	170	.type = MT_DEVICE
	171	}, { /* Camera */
	172	.virtual = 0xfa000000,
	173	.pfn = __phys_to_pfn(0x50000000),
	174	.length = 0x00100000,
	175	.type = MT_DEVICE
	176	}, { /* IMem ctl */
	177	.virtual = 0xfe000000,
	178	.pfn = __phys_to_pfn(0x58000000),
	179	.length = 0x00100000,
	180	.type = MT_DEVICE
	181	}, { /* UNCACHED_PHYS_0 */
	182	.virtual = 0xff000000,
	183	.pfn = __phys_to_pfn(0x00000000),
	184	.length = 0x00100000,
	185	.type = MT_DEVICE
	186	}
1da177e4 LT	187	};
	188
	189	void __init pxa_map_io(void)
	190	{
	191	iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc));
	192	get_clk_frequency_khz(1);
	193	}
	194
	195
	196	static struct resource pxamci_resources[] = {
	197	[0] = {
	198	.start = 0x41100000,
	199	.end = 0x41100fff,
	200	.flags = IORESOURCE_MEM,
	201	},
	202	[1] = {
	203	.start = IRQ_MMC,
	204	.end = IRQ_MMC,
	205	.flags = IORESOURCE_IRQ,
	206	},
	207	};
	208
	209	static u64 pxamci_dmamask = 0xffffffffUL;
	210
e09d02e1	211	struct platform_device pxa_device_mci = {
1da177e4 LT	212	.name = "pxa2xx-mci",
	213	.id = -1,
	214	.dev = {
	215	.dma_mask = &pxamci_dmamask,
	216	.coherent_dma_mask = 0xffffffff,
	217	},
	218	.num_resources = ARRAY_SIZE(pxamci_resources),
	219	.resource = pxamci_resources,
	220	};
	221
	222	void __init pxa_set_mci_info(struct pxamci_platform_data *info)
	223	{
e09d02e1	224	pxa_device_mci.dev.platform_data = info;
1da177e4 LT	225	}
	226
	227
	228	static struct pxa2xx_udc_mach_info pxa_udc_info;
	229
	230	void __init pxa_set_udc_info(struct pxa2xx_udc_mach_info *info)
	231	{
	232	memcpy(&pxa_udc_info, info, sizeof *info);
	233	}
	234
	235	static struct resource pxa2xx_udc_resources[] = {
	236	[0] = {
	237	.start = 0x40600000,
	238	.end = 0x4060ffff,
	239	.flags = IORESOURCE_MEM,
	240	},
	241	[1] = {
	242	.start = IRQ_USB,
	243	.end = IRQ_USB,
	244	.flags = IORESOURCE_IRQ,
	245	},
	246	};
	247
	248	static u64 udc_dma_mask = ~(u32)0;
	249
e09d02e1	250	struct platform_device pxa_device_udc = {
1da177e4 LT	251	.name = "pxa2xx-udc",
	252	.id = -1,
	253	.resource = pxa2xx_udc_resources,
	254	.num_resources = ARRAY_SIZE(pxa2xx_udc_resources),
	255	.dev = {
	256	.platform_data = &pxa_udc_info,
	257	.dma_mask = &udc_dma_mask,
	258	}
	259	};
	260
1da177e4 LT	261	static struct resource pxafb_resources[] = {
	262	[0] = {
	263	.start = 0x44000000,
	264	.end = 0x4400ffff,
	265	.flags = IORESOURCE_MEM,
	266	},
	267	[1] = {
	268	.start = IRQ_LCD,
	269	.end = IRQ_LCD,
	270	.flags = IORESOURCE_IRQ,
	271	},
	272	};
	273
	274	static u64 fb_dma_mask = ~(u64)0;
	275
e09d02e1	276	struct platform_device pxa_device_fb = {
1da177e4 LT	277	.name = "pxa2xx-fb",
	278	.id = -1,
	279	.dev = {
1da177e4 LT	280	.dma_mask = &fb_dma_mask,
	281	.coherent_dma_mask = 0xffffffff,
	282	},
	283	.num_resources = ARRAY_SIZE(pxafb_resources),
	284	.resource = pxafb_resources,
	285	};
	286
d14b272b RP	287	void __init set_pxa_fb_info(struct pxafb_mach_info *info)
d14b272b RP	288	{
e09d02e1	289	pxa_device_fb.dev.platform_data = info;
d14b272b RP	290	}
d14b272b RP	291
cb38c569 RP	292	void __init set_pxa_fb_parent(struct device *parent_dev)
cb38c569 RP	293	{
e09d02e1	294	pxa_device_fb.dev.parent = parent_dev;
cb38c569 RP	295	}
cb38c569 RP	296
e259a3ae RK	297	static struct resource pxa_resource_ffuart[] = {
	298	{
	299	.start = __PREG(FFUART),
	300	.end = __PREG(FFUART) + 35,
	301	.flags = IORESOURCE_MEM,
	302	}, {
	303	.start = IRQ_FFUART,
	304	.end = IRQ_FFUART,
	305	.flags = IORESOURCE_IRQ,
	306	}
	307	};
	308
e09d02e1	309	struct platform_device pxa_device_ffuart= {
1da177e4 LT	310	.name = "pxa2xx-uart",
1da177e4 LT	311	.id = 0,
e259a3ae RK	312	.resource = pxa_resource_ffuart,
	313	.num_resources = ARRAY_SIZE(pxa_resource_ffuart),
	314	};
	315
	316	static struct resource pxa_resource_btuart[] = {
	317	{
	318	.start = __PREG(BTUART),
	319	.end = __PREG(BTUART) + 35,
	320	.flags = IORESOURCE_MEM,
	321	}, {
	322	.start = IRQ_BTUART,
	323	.end = IRQ_BTUART,
	324	.flags = IORESOURCE_IRQ,
	325	}
1da177e4	326	};
e259a3ae	327
e09d02e1	328	struct platform_device pxa_device_btuart = {
1da177e4 LT	329	.name = "pxa2xx-uart",
1da177e4 LT	330	.id = 1,
e259a3ae RK	331	.resource = pxa_resource_btuart,
e259a3ae RK	332	.num_resources = ARRAY_SIZE(pxa_resource_btuart),
1da177e4	333	};
e259a3ae RK	334
	335	static struct resource pxa_resource_stuart[] = {
	336	{
	337	.start = __PREG(STUART),
	338	.end = __PREG(STUART) + 35,
	339	.flags = IORESOURCE_MEM,
	340	}, {
	341	.start = IRQ_STUART,
	342	.end = IRQ_STUART,
	343	.flags = IORESOURCE_IRQ,
	344	}
	345	};
	346
e09d02e1	347	struct platform_device pxa_device_stuart = {
1da177e4 LT	348	.name = "pxa2xx-uart",
1da177e4 LT	349	.id = 2,
e259a3ae RK	350	.resource = pxa_resource_stuart,
e259a3ae RK	351	.num_resources = ARRAY_SIZE(pxa_resource_stuart),
1da177e4	352	};
e259a3ae RK	353
	354	static struct resource pxa_resource_hwuart[] = {
	355	{
	356	.start = __PREG(HWUART),
	357	.end = __PREG(HWUART) + 47,
	358	.flags = IORESOURCE_MEM,
	359	}, {
	360	.start = IRQ_HWUART,
	361	.end = IRQ_HWUART,
	362	.flags = IORESOURCE_IRQ,
	363	}
	364	};
	365
e09d02e1	366	struct platform_device pxa_device_hwuart = {
d9e29649 MR	367	.name = "pxa2xx-uart",
d9e29649 MR	368	.id = 3,
e259a3ae RK	369	.resource = pxa_resource_hwuart,
e259a3ae RK	370	.num_resources = ARRAY_SIZE(pxa_resource_hwuart),
d9e29649	371	};
1da177e4	372
34f3231f	373	static struct resource pxai2c_resources[] = {
bb9bffcb RK	374	{
	375	.start = 0x40301680,
	376	.end = 0x403016a3,
	377	.flags = IORESOURCE_MEM,
	378	}, {
	379	.start = IRQ_I2C,
	380	.end = IRQ_I2C,
	381	.flags = IORESOURCE_IRQ,
	382	},
	383	};
	384
e09d02e1	385	struct platform_device pxa_device_i2c = {
bb9bffcb RK	386	.name = "pxa2xx-i2c",
bb9bffcb RK	387	.id = 0,
34f3231f RK	388	.resource = pxai2c_resources,
34f3231f RK	389	.num_resources = ARRAY_SIZE(pxai2c_resources),
bb9bffcb RK	390	};
	391
	392	void __init pxa_set_i2c_info(struct i2c_pxa_platform_data *info)
	393	{
e09d02e1	394	pxa_device_i2c.dev.platform_data = info;
bb9bffcb RK	395	}
bb9bffcb RK	396
34f3231f	397	static struct resource pxai2s_resources[] = {
b2640b42 MR	398	{
	399	.start = 0x40400000,
	400	.end = 0x40400083,
	401	.flags = IORESOURCE_MEM,
	402	}, {
	403	.start = IRQ_I2S,
	404	.end = IRQ_I2S,
	405	.flags = IORESOURCE_IRQ,
	406	},
	407	};
	408
e09d02e1	409	struct platform_device pxa_device_i2s = {
b2640b42 MR	410	.name = "pxa2xx-i2s",
b2640b42 MR	411	.id = -1,
34f3231f RK	412	.resource = pxai2s_resources,
34f3231f RK	413	.num_resources = ARRAY_SIZE(pxai2s_resources),
b2640b42 MR	414	};
b2640b42 MR	415
6f475c01 NP	416	static u64 pxaficp_dmamask = ~(u32)0;
6f475c01 NP	417
e09d02e1	418	struct platform_device pxa_device_ficp = {
6f475c01 NP	419	.name = "pxa2xx-ir",
	420	.id = -1,
	421	.dev = {
	422	.dma_mask = &pxaficp_dmamask,
	423	.coherent_dma_mask = 0xffffffff,
	424	},
	425	};
	426
	427	void __init pxa_set_ficp_info(struct pxaficp_platform_data *info)
	428	{
e09d02e1	429	pxa_device_ficp.dev.platform_data = info;
6f475c01 NP	430	}
6f475c01 NP	431
e09d02e1	432	struct platform_device pxa_device_rtc = {
e842f1c8 RP	433	.name = "sa1100-rtc",
	434	.id = -1,
	435	};