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1da177e4 LT |
1 | /* |
2 | * linux/arch/arm/mach-pxa/generic.c | |
3 | * | |
4 | * Author: Nicolas Pitre | |
5 | * Created: Jun 15, 2001 | |
6 | * Copyright: MontaVista Software Inc. | |
7 | * | |
8 | * Code common to all PXA machines. | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License version 2 as | |
12 | * published by the Free Software Foundation. | |
13 | * | |
14 | * Since this file should be linked before any other machine specific file, | |
15 | * the __initcall() here will be executed first. This serves as default | |
16 | * initialization stuff for PXA machines which can be overridden later if | |
17 | * need be. | |
18 | */ | |
19 | #include <linux/module.h> | |
20 | #include <linux/kernel.h> | |
21 | #include <linux/init.h> | |
1da177e4 LT |
22 | |
23 | #include <asm/hardware.h> | |
1da177e4 LT |
24 | #include <asm/system.h> |
25 | #include <asm/pgtable.h> | |
26 | #include <asm/mach/map.h> | |
27 | ||
28 | #include <asm/arch/pxa-regs.h> | |
1da177e4 LT |
29 | |
30 | #include "generic.h" | |
31 | ||
15a40333 RK |
32 | /* |
33 | * Get the clock frequency as reflected by CCCR and the turbo flag. | |
34 | * We assume these values have been applied via a fcs. | |
35 | * If info is not 0 we also display the current settings. | |
36 | */ | |
37 | unsigned int get_clk_frequency_khz(int info) | |
38 | { | |
39 | if (cpu_is_pxa21x() || cpu_is_pxa25x()) | |
40 | return pxa25x_get_clk_frequency_khz(info); | |
2c8086a5 | 41 | else if (cpu_is_pxa27x()) |
15a40333 | 42 | return pxa27x_get_clk_frequency_khz(info); |
2c8086a5 | 43 | else |
44 | return pxa3xx_get_clk_frequency_khz(info); | |
15a40333 RK |
45 | } |
46 | EXPORT_SYMBOL(get_clk_frequency_khz); | |
47 | ||
48 | /* | |
49 | * Return the current memory clock frequency in units of 10kHz | |
50 | */ | |
51 | unsigned int get_memclk_frequency_10khz(void) | |
52 | { | |
53 | if (cpu_is_pxa21x() || cpu_is_pxa25x()) | |
54 | return pxa25x_get_memclk_frequency_10khz(); | |
2c8086a5 | 55 | else if (cpu_is_pxa27x()) |
15a40333 | 56 | return pxa27x_get_memclk_frequency_10khz(); |
2c8086a5 | 57 | else |
58 | return pxa3xx_get_memclk_frequency_10khz(); | |
15a40333 RK |
59 | } |
60 | EXPORT_SYMBOL(get_memclk_frequency_10khz); | |
61 | ||
1da177e4 LT |
62 | /* |
63 | * Intel PXA2xx internal register mapping. | |
64 | * | |
65 | * Note 1: not all PXA2xx variants implement all those addresses. | |
66 | * | |
67 | * Note 2: virtual 0xfffe0000-0xffffffff is reserved for the vector table | |
68 | * and cache flush area. | |
69 | */ | |
70 | static struct map_desc standard_io_desc[] __initdata = { | |
6f9182eb DS |
71 | { /* Devs */ |
72 | .virtual = 0xf2000000, | |
73 | .pfn = __phys_to_pfn(0x40000000), | |
74 | .length = 0x02000000, | |
75 | .type = MT_DEVICE | |
6f9182eb DS |
76 | }, { /* Mem Ctl */ |
77 | .virtual = 0xf6000000, | |
78 | .pfn = __phys_to_pfn(0x48000000), | |
7664c400 | 79 | .length = 0x00200000, |
6f9182eb DS |
80 | .type = MT_DEVICE |
81 | }, { /* USB host */ | |
82 | .virtual = 0xf8000000, | |
83 | .pfn = __phys_to_pfn(0x4c000000), | |
84 | .length = 0x00100000, | |
85 | .type = MT_DEVICE | |
86 | }, { /* Camera */ | |
87 | .virtual = 0xfa000000, | |
88 | .pfn = __phys_to_pfn(0x50000000), | |
89 | .length = 0x00100000, | |
90 | .type = MT_DEVICE | |
91 | }, { /* IMem ctl */ | |
92 | .virtual = 0xfe000000, | |
93 | .pfn = __phys_to_pfn(0x58000000), | |
94 | .length = 0x00100000, | |
95 | .type = MT_DEVICE | |
96 | }, { /* UNCACHED_PHYS_0 */ | |
97 | .virtual = 0xff000000, | |
98 | .pfn = __phys_to_pfn(0x00000000), | |
99 | .length = 0x00100000, | |
100 | .type = MT_DEVICE | |
101 | } | |
1da177e4 LT |
102 | }; |
103 | ||
104 | void __init pxa_map_io(void) | |
105 | { | |
106 | iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc)); | |
107 | get_clk_frequency_khz(1); | |
108 | } |