[ARM] pxa: move pxa27x_device_ohci out of pxa27x.c for use with pxa3xx
[deliverable/linux.git] / arch / arm / mach-pxa / generic.c
CommitLineData
1da177e4
LT
1/*
2 * linux/arch/arm/mach-pxa/generic.c
3 *
4 * Author: Nicolas Pitre
5 * Created: Jun 15, 2001
6 * Copyright: MontaVista Software Inc.
7 *
8 * Code common to all PXA machines.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 *
14 * Since this file should be linked before any other machine specific file,
15 * the __initcall() here will be executed first. This serves as default
16 * initialization stuff for PXA machines which can be overridden later if
17 * need be.
18 */
19#include <linux/module.h>
20#include <linux/kernel.h>
21#include <linux/init.h>
22#include <linux/delay.h>
1da177e4
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23#include <linux/ioport.h>
24#include <linux/pm.h>
4e57b681 25#include <linux/string.h>
1da177e4
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26
27#include <asm/hardware.h>
28#include <asm/irq.h>
29#include <asm/system.h>
30#include <asm/pgtable.h>
31#include <asm/mach/map.h>
32
33#include <asm/arch/pxa-regs.h>
3deac046 34#include <asm/arch/gpio.h>
1da177e4
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35
36#include "generic.h"
37
15a40333
RK
38/*
39 * Get the clock frequency as reflected by CCCR and the turbo flag.
40 * We assume these values have been applied via a fcs.
41 * If info is not 0 we also display the current settings.
42 */
43unsigned int get_clk_frequency_khz(int info)
44{
45 if (cpu_is_pxa21x() || cpu_is_pxa25x())
46 return pxa25x_get_clk_frequency_khz(info);
2c8086a5 47 else if (cpu_is_pxa27x())
15a40333 48 return pxa27x_get_clk_frequency_khz(info);
2c8086a5 49 else
50 return pxa3xx_get_clk_frequency_khz(info);
15a40333
RK
51}
52EXPORT_SYMBOL(get_clk_frequency_khz);
53
54/*
55 * Return the current memory clock frequency in units of 10kHz
56 */
57unsigned int get_memclk_frequency_10khz(void)
58{
59 if (cpu_is_pxa21x() || cpu_is_pxa25x())
60 return pxa25x_get_memclk_frequency_10khz();
2c8086a5 61 else if (cpu_is_pxa27x())
15a40333 62 return pxa27x_get_memclk_frequency_10khz();
2c8086a5 63 else
64 return pxa3xx_get_memclk_frequency_10khz();
15a40333
RK
65}
66EXPORT_SYMBOL(get_memclk_frequency_10khz);
67
1da177e4
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68/*
69 * Handy function to set GPIO alternate functions
70 */
30f0b408 71int pxa_last_gpio;
1da177e4 72
3deac046 73int pxa_gpio_mode(int gpio_mode)
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LT
74{
75 unsigned long flags;
76 int gpio = gpio_mode & GPIO_MD_MASK_NR;
77 int fn = (gpio_mode & GPIO_MD_MASK_FN) >> 8;
78 int gafr;
79
30f0b408 80 if (gpio > pxa_last_gpio)
3deac046
PZ
81 return -EINVAL;
82
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83 local_irq_save(flags);
84 if (gpio_mode & GPIO_DFLT_LOW)
85 GPCR(gpio) = GPIO_bit(gpio);
86 else if (gpio_mode & GPIO_DFLT_HIGH)
87 GPSR(gpio) = GPIO_bit(gpio);
88 if (gpio_mode & GPIO_MD_MASK_DIR)
89 GPDR(gpio) |= GPIO_bit(gpio);
90 else
91 GPDR(gpio) &= ~GPIO_bit(gpio);
92 gafr = GAFR(gpio) & ~(0x3 << (((gpio) & 0xf)*2));
93 GAFR(gpio) = gafr | (fn << (((gpio) & 0xf)*2));
94 local_irq_restore(flags);
3deac046
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95
96 return 0;
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97}
98
99EXPORT_SYMBOL(pxa_gpio_mode);
100
3e0cc7ee
RK
101int gpio_direction_input(unsigned gpio)
102{
103 unsigned long flags;
104 u32 mask;
105
106 if (gpio > pxa_last_gpio)
107 return -EINVAL;
108
109 mask = GPIO_bit(gpio);
110 local_irq_save(flags);
111 GPDR(gpio) &= ~mask;
112 local_irq_restore(flags);
113
114 return 0;
115}
116EXPORT_SYMBOL(gpio_direction_input);
117
118int gpio_direction_output(unsigned gpio, int value)
119{
120 unsigned long flags;
121 u32 mask;
122
123 if (gpio > pxa_last_gpio)
124 return -EINVAL;
125
126 mask = GPIO_bit(gpio);
127 local_irq_save(flags);
128 if (value)
129 GPSR(gpio) = mask;
130 else
131 GPCR(gpio) = mask;
132 GPDR(gpio) |= mask;
133 local_irq_restore(flags);
134
135 return 0;
136}
137EXPORT_SYMBOL(gpio_direction_output);
138
3deac046
PZ
139/*
140 * Return GPIO level
141 */
142int pxa_gpio_get_value(unsigned gpio)
143{
144 return __gpio_get_value(gpio);
145}
146
147EXPORT_SYMBOL(pxa_gpio_get_value);
148
149/*
150 * Set output GPIO level
151 */
152void pxa_gpio_set_value(unsigned gpio, int value)
153{
154 __gpio_set_value(gpio, value);
155}
156
157EXPORT_SYMBOL(pxa_gpio_set_value);
158
1da177e4
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159/*
160 * Routine to safely enable or disable a clock in the CKEN
161 */
a7073b8b 162void __pxa_set_cken(int clock, int enable)
1da177e4
LT
163{
164 unsigned long flags;
165 local_irq_save(flags);
166
167 if (enable)
7053acbd 168 CKEN |= (1 << clock);
1da177e4 169 else
7053acbd 170 CKEN &= ~(1 << clock);
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171
172 local_irq_restore(flags);
173}
174
a7073b8b 175EXPORT_SYMBOL(__pxa_set_cken);
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176
177/*
178 * Intel PXA2xx internal register mapping.
179 *
180 * Note 1: not all PXA2xx variants implement all those addresses.
181 *
182 * Note 2: virtual 0xfffe0000-0xffffffff is reserved for the vector table
183 * and cache flush area.
184 */
185static struct map_desc standard_io_desc[] __initdata = {
6f9182eb
DS
186 { /* Devs */
187 .virtual = 0xf2000000,
188 .pfn = __phys_to_pfn(0x40000000),
189 .length = 0x02000000,
190 .type = MT_DEVICE
191 }, { /* LCD */
192 .virtual = 0xf4000000,
193 .pfn = __phys_to_pfn(0x44000000),
194 .length = 0x00100000,
195 .type = MT_DEVICE
196 }, { /* Mem Ctl */
197 .virtual = 0xf6000000,
198 .pfn = __phys_to_pfn(0x48000000),
199 .length = 0x00100000,
200 .type = MT_DEVICE
201 }, { /* USB host */
202 .virtual = 0xf8000000,
203 .pfn = __phys_to_pfn(0x4c000000),
204 .length = 0x00100000,
205 .type = MT_DEVICE
206 }, { /* Camera */
207 .virtual = 0xfa000000,
208 .pfn = __phys_to_pfn(0x50000000),
209 .length = 0x00100000,
210 .type = MT_DEVICE
211 }, { /* IMem ctl */
212 .virtual = 0xfe000000,
213 .pfn = __phys_to_pfn(0x58000000),
214 .length = 0x00100000,
215 .type = MT_DEVICE
216 }, { /* UNCACHED_PHYS_0 */
217 .virtual = 0xff000000,
218 .pfn = __phys_to_pfn(0x00000000),
219 .length = 0x00100000,
220 .type = MT_DEVICE
221 }
1da177e4
LT
222};
223
224void __init pxa_map_io(void)
225{
226 iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc));
227 get_clk_frequency_khz(1);
228}
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