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e9937d4b LB |
1 | /* |
2 | * linux/arch/arm/mach-pxa/lpd270.c | |
3 | * | |
4 | * Support for the LogicPD PXA270 Card Engine. | |
5 | * Derived from the mainstone code, which carries these notices: | |
6 | * | |
7 | * Author: Nicolas Pitre | |
8 | * Created: Nov 05, 2002 | |
9 | * Copyright: MontaVista Software Inc. | |
10 | * | |
11 | * This program is free software; you can redistribute it and/or modify | |
12 | * it under the terms of the GNU General Public License version 2 as | |
13 | * published by the Free Software Foundation. | |
14 | */ | |
15 | ||
16 | #include <linux/init.h> | |
17 | #include <linux/platform_device.h> | |
18 | #include <linux/sysdev.h> | |
19 | #include <linux/interrupt.h> | |
20 | #include <linux/sched.h> | |
21 | #include <linux/bitops.h> | |
22 | #include <linux/fb.h> | |
23 | #include <linux/ioport.h> | |
24 | #include <linux/mtd/mtd.h> | |
25 | #include <linux/mtd/partitions.h> | |
4a730719 | 26 | #include <linux/pwm_backlight.h> |
e9937d4b LB |
27 | |
28 | #include <asm/types.h> | |
29 | #include <asm/setup.h> | |
30 | #include <asm/memory.h> | |
31 | #include <asm/mach-types.h> | |
a09e64fb | 32 | #include <mach/hardware.h> |
e9937d4b LB |
33 | #include <asm/irq.h> |
34 | #include <asm/sizes.h> | |
35 | ||
36 | #include <asm/mach/arch.h> | |
37 | #include <asm/mach/map.h> | |
38 | #include <asm/mach/irq.h> | |
39 | #include <asm/mach/flash.h> | |
40 | ||
51c62982 | 41 | #include <mach/pxa27x.h> |
da065a0b | 42 | #include <mach/gpio.h> |
a09e64fb RK |
43 | #include <mach/lpd270.h> |
44 | #include <mach/audio.h> | |
45 | #include <mach/pxafb.h> | |
46 | #include <mach/mmc.h> | |
47 | #include <mach/irda.h> | |
48 | #include <mach/ohci.h> | |
ad68bb9f | 49 | #include <mach/smemc.h> |
e9937d4b LB |
50 | |
51 | #include "generic.h" | |
46c41e62 | 52 | #include "devices.h" |
e9937d4b | 53 | |
fd90ff20 EM |
54 | static unsigned long lpd270_pin_config[] __initdata = { |
55 | /* Chip Selects */ | |
56 | GPIO15_nCS_1, /* Mainboard Flash */ | |
57 | GPIO78_nCS_2, /* CPLD + Ethernet */ | |
58 | ||
59 | /* LCD - 16bpp Active TFT */ | |
60 | GPIO58_LCD_LDD_0, | |
61 | GPIO59_LCD_LDD_1, | |
62 | GPIO60_LCD_LDD_2, | |
63 | GPIO61_LCD_LDD_3, | |
64 | GPIO62_LCD_LDD_4, | |
65 | GPIO63_LCD_LDD_5, | |
66 | GPIO64_LCD_LDD_6, | |
67 | GPIO65_LCD_LDD_7, | |
68 | GPIO66_LCD_LDD_8, | |
69 | GPIO67_LCD_LDD_9, | |
70 | GPIO68_LCD_LDD_10, | |
71 | GPIO69_LCD_LDD_11, | |
72 | GPIO70_LCD_LDD_12, | |
73 | GPIO71_LCD_LDD_13, | |
74 | GPIO72_LCD_LDD_14, | |
75 | GPIO73_LCD_LDD_15, | |
76 | GPIO74_LCD_FCLK, | |
77 | GPIO75_LCD_LCLK, | |
78 | GPIO76_LCD_PCLK, | |
79 | GPIO77_LCD_BIAS, | |
80 | GPIO16_PWM0_OUT, /* Backlight */ | |
81 | ||
82 | /* USB Host */ | |
83 | GPIO88_USBH1_PWR, | |
84 | GPIO89_USBH1_PEN, | |
85 | ||
86 | /* AC97 */ | |
c11b6a42 EM |
87 | GPIO28_AC97_BITCLK, |
88 | GPIO29_AC97_SDATA_IN_0, | |
89 | GPIO30_AC97_SDATA_OUT, | |
90 | GPIO31_AC97_SYNC, | |
fd90ff20 EM |
91 | GPIO45_AC97_SYSCLK, |
92 | ||
93 | GPIO1_GPIO | WAKEUP_ON_EDGE_BOTH, | |
94 | }; | |
e9937d4b LB |
95 | |
96 | static unsigned int lpd270_irq_enabled; | |
97 | ||
a3f4c927 | 98 | static void lpd270_mask_irq(struct irq_data *d) |
e9937d4b | 99 | { |
a3f4c927 | 100 | int lpd270_irq = d->irq - LPD270_IRQ(0); |
e9937d4b LB |
101 | |
102 | __raw_writew(~(1 << lpd270_irq), LPD270_INT_STATUS); | |
103 | ||
104 | lpd270_irq_enabled &= ~(1 << lpd270_irq); | |
105 | __raw_writew(lpd270_irq_enabled, LPD270_INT_MASK); | |
106 | } | |
107 | ||
a3f4c927 | 108 | static void lpd270_unmask_irq(struct irq_data *d) |
e9937d4b | 109 | { |
a3f4c927 | 110 | int lpd270_irq = d->irq - LPD270_IRQ(0); |
e9937d4b LB |
111 | |
112 | lpd270_irq_enabled |= 1 << lpd270_irq; | |
113 | __raw_writew(lpd270_irq_enabled, LPD270_INT_MASK); | |
114 | } | |
115 | ||
38c677cb DB |
116 | static struct irq_chip lpd270_irq_chip = { |
117 | .name = "CPLD", | |
a3f4c927 LB |
118 | .irq_ack = lpd270_mask_irq, |
119 | .irq_mask = lpd270_mask_irq, | |
120 | .irq_unmask = lpd270_unmask_irq, | |
e9937d4b LB |
121 | }; |
122 | ||
10dd5ce2 | 123 | static void lpd270_irq_handler(unsigned int irq, struct irq_desc *desc) |
e9937d4b LB |
124 | { |
125 | unsigned long pending; | |
126 | ||
127 | pending = __raw_readw(LPD270_INT_STATUS) & lpd270_irq_enabled; | |
128 | do { | |
a3f4c927 LB |
129 | /* clear useless edge notification */ |
130 | desc->irq_data.chip->irq_ack(&desc->irq_data); | |
e9937d4b LB |
131 | if (likely(pending)) { |
132 | irq = LPD270_IRQ(0) + __ffs(pending); | |
d8aa0251 | 133 | generic_handle_irq(irq); |
e9937d4b LB |
134 | |
135 | pending = __raw_readw(LPD270_INT_STATUS) & | |
136 | lpd270_irq_enabled; | |
137 | } | |
138 | } while (pending); | |
139 | } | |
140 | ||
141 | static void __init lpd270_init_irq(void) | |
142 | { | |
143 | int irq; | |
144 | ||
cd49104d | 145 | pxa27x_init_irq(); |
e9937d4b LB |
146 | |
147 | __raw_writew(0, LPD270_INT_MASK); | |
148 | __raw_writew(0, LPD270_INT_STATUS); | |
149 | ||
150 | /* setup extra LogicPD PXA270 irqs */ | |
151 | for (irq = LPD270_IRQ(2); irq <= LPD270_IRQ(4); irq++) { | |
152 | set_irq_chip(irq, &lpd270_irq_chip); | |
10dd5ce2 | 153 | set_irq_handler(irq, handle_level_irq); |
e9937d4b LB |
154 | set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); |
155 | } | |
156 | set_irq_chained_handler(IRQ_GPIO(0), lpd270_irq_handler); | |
6cab4860 | 157 | set_irq_type(IRQ_GPIO(0), IRQ_TYPE_EDGE_FALLING); |
e9937d4b LB |
158 | } |
159 | ||
160 | ||
161 | #ifdef CONFIG_PM | |
162 | static int lpd270_irq_resume(struct sys_device *dev) | |
163 | { | |
164 | __raw_writew(lpd270_irq_enabled, LPD270_INT_MASK); | |
165 | return 0; | |
166 | } | |
167 | ||
168 | static struct sysdev_class lpd270_irq_sysclass = { | |
af5ca3f4 | 169 | .name = "cpld_irq", |
e9937d4b LB |
170 | .resume = lpd270_irq_resume, |
171 | }; | |
172 | ||
173 | static struct sys_device lpd270_irq_device = { | |
174 | .cls = &lpd270_irq_sysclass, | |
175 | }; | |
176 | ||
177 | static int __init lpd270_irq_device_init(void) | |
178 | { | |
720046de RK |
179 | int ret = -ENODEV; |
180 | if (machine_is_logicpd_pxa270()) { | |
181 | ret = sysdev_class_register(&lpd270_irq_sysclass); | |
182 | if (ret == 0) | |
183 | ret = sysdev_register(&lpd270_irq_device); | |
184 | } | |
e9937d4b LB |
185 | return ret; |
186 | } | |
187 | ||
188 | device_initcall(lpd270_irq_device_init); | |
189 | #endif | |
190 | ||
191 | ||
192 | static struct resource smc91x_resources[] = { | |
193 | [0] = { | |
194 | .start = LPD270_ETH_PHYS, | |
195 | .end = (LPD270_ETH_PHYS + 0xfffff), | |
196 | .flags = IORESOURCE_MEM, | |
197 | }, | |
198 | [1] = { | |
199 | .start = LPD270_ETHERNET_IRQ, | |
200 | .end = LPD270_ETHERNET_IRQ, | |
201 | .flags = IORESOURCE_IRQ, | |
202 | }, | |
203 | }; | |
204 | ||
205 | static struct platform_device smc91x_device = { | |
206 | .name = "smc91x", | |
207 | .id = 0, | |
208 | .num_resources = ARRAY_SIZE(smc91x_resources), | |
209 | .resource = smc91x_resources, | |
210 | }; | |
211 | ||
e9937d4b LB |
212 | static struct resource lpd270_flash_resources[] = { |
213 | [0] = { | |
214 | .start = PXA_CS0_PHYS, | |
215 | .end = PXA_CS0_PHYS + SZ_64M - 1, | |
216 | .flags = IORESOURCE_MEM, | |
217 | }, | |
218 | [1] = { | |
219 | .start = PXA_CS1_PHYS, | |
220 | .end = PXA_CS1_PHYS + SZ_64M - 1, | |
221 | .flags = IORESOURCE_MEM, | |
222 | }, | |
223 | }; | |
224 | ||
225 | static struct mtd_partition lpd270_flash0_partitions[] = { | |
226 | { | |
227 | .name = "Bootloader", | |
228 | .size = 0x00040000, | |
229 | .offset = 0, | |
230 | .mask_flags = MTD_WRITEABLE /* force read-only */ | |
231 | }, { | |
232 | .name = "Kernel", | |
233 | .size = 0x00400000, | |
234 | .offset = 0x00040000, | |
235 | }, { | |
236 | .name = "Filesystem", | |
237 | .size = MTDPART_SIZ_FULL, | |
238 | .offset = 0x00440000 | |
239 | }, | |
240 | }; | |
241 | ||
242 | static struct flash_platform_data lpd270_flash_data[2] = { | |
243 | { | |
244 | .name = "processor-flash", | |
245 | .map_name = "cfi_probe", | |
246 | .parts = lpd270_flash0_partitions, | |
247 | .nr_parts = ARRAY_SIZE(lpd270_flash0_partitions), | |
248 | }, { | |
249 | .name = "mainboard-flash", | |
250 | .map_name = "cfi_probe", | |
251 | .parts = NULL, | |
252 | .nr_parts = 0, | |
253 | } | |
254 | }; | |
255 | ||
256 | static struct platform_device lpd270_flash_device[2] = { | |
257 | { | |
258 | .name = "pxa2xx-flash", | |
259 | .id = 0, | |
260 | .dev = { | |
261 | .platform_data = &lpd270_flash_data[0], | |
262 | }, | |
263 | .resource = &lpd270_flash_resources[0], | |
264 | .num_resources = 1, | |
265 | }, { | |
266 | .name = "pxa2xx-flash", | |
267 | .id = 1, | |
268 | .dev = { | |
269 | .platform_data = &lpd270_flash_data[1], | |
270 | }, | |
271 | .resource = &lpd270_flash_resources[1], | |
272 | .num_resources = 1, | |
273 | }, | |
274 | }; | |
275 | ||
4a730719 RK |
276 | static struct platform_pwm_backlight_data lpd270_backlight_data = { |
277 | .pwm_id = 0, | |
278 | .max_brightness = 1, | |
279 | .dft_brightness = 1, | |
280 | .pwm_period_ns = 78770, | |
281 | }; | |
282 | ||
283 | static struct platform_device lpd270_backlight_device = { | |
284 | .name = "pwm-backlight", | |
285 | .dev = { | |
286 | .parent = &pxa27x_device_pwm0.dev, | |
287 | .platform_data = &lpd270_backlight_data, | |
288 | }, | |
289 | }; | |
e9937d4b LB |
290 | |
291 | /* 5.7" TFT QVGA (LoLo display number 1) */ | |
d14b272b | 292 | static struct pxafb_mode_info sharp_lq057q3dc02_mode = { |
65660297 LB |
293 | .pixclock = 150000, |
294 | .xres = 320, | |
295 | .yres = 240, | |
e9937d4b | 296 | .bpp = 16, |
65660297 LB |
297 | .hsync_len = 0x14, |
298 | .left_margin = 0x28, | |
299 | .right_margin = 0x0a, | |
300 | .vsync_len = 0x02, | |
e9937d4b LB |
301 | .upper_margin = 0x08, |
302 | .lower_margin = 0x14, | |
65660297 | 303 | .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, |
d14b272b RP |
304 | }; |
305 | ||
306 | static struct pxafb_mach_info sharp_lq057q3dc02 = { | |
307 | .modes = &sharp_lq057q3dc02_mode, | |
308 | .num_modes = 1, | |
0219e835 EM |
309 | .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL | |
310 | LCD_ALTERNATE_MAPPING, | |
65660297 LB |
311 | }; |
312 | ||
313 | /* 12.1" TFT SVGA (LoLo display number 2) */ | |
d14b272b | 314 | static struct pxafb_mode_info sharp_lq121s1dg31_mode = { |
65660297 LB |
315 | .pixclock = 50000, |
316 | .xres = 800, | |
317 | .yres = 600, | |
318 | .bpp = 16, | |
319 | .hsync_len = 0x05, | |
320 | .left_margin = 0x52, | |
321 | .right_margin = 0x05, | |
322 | .vsync_len = 0x04, | |
323 | .upper_margin = 0x14, | |
324 | .lower_margin = 0x0a, | |
325 | .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, | |
d14b272b RP |
326 | }; |
327 | ||
328 | static struct pxafb_mach_info sharp_lq121s1dg31 = { | |
329 | .modes = &sharp_lq121s1dg31_mode, | |
330 | .num_modes = 1, | |
0219e835 EM |
331 | .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL | |
332 | LCD_ALTERNATE_MAPPING, | |
65660297 LB |
333 | }; |
334 | ||
335 | /* 3.6" TFT QVGA (LoLo display number 3) */ | |
d14b272b | 336 | static struct pxafb_mode_info sharp_lq036q1da01_mode = { |
65660297 LB |
337 | .pixclock = 150000, |
338 | .xres = 320, | |
339 | .yres = 240, | |
340 | .bpp = 16, | |
341 | .hsync_len = 0x0e, | |
342 | .left_margin = 0x04, | |
343 | .right_margin = 0x0a, | |
344 | .vsync_len = 0x03, | |
345 | .upper_margin = 0x03, | |
346 | .lower_margin = 0x03, | |
347 | .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, | |
d14b272b RP |
348 | }; |
349 | ||
350 | static struct pxafb_mach_info sharp_lq036q1da01 = { | |
351 | .modes = &sharp_lq036q1da01_mode, | |
352 | .num_modes = 1, | |
0219e835 EM |
353 | .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL | |
354 | LCD_ALTERNATE_MAPPING, | |
e9937d4b LB |
355 | }; |
356 | ||
357 | /* 6.4" TFT VGA (LoLo display number 5) */ | |
d14b272b | 358 | static struct pxafb_mode_info sharp_lq64d343_mode = { |
65660297 | 359 | .pixclock = 25000, |
e9937d4b LB |
360 | .xres = 640, |
361 | .yres = 480, | |
362 | .bpp = 16, | |
65660297 | 363 | .hsync_len = 0x31, |
e9937d4b LB |
364 | .left_margin = 0x89, |
365 | .right_margin = 0x19, | |
65660297 | 366 | .vsync_len = 0x12, |
e9937d4b | 367 | .upper_margin = 0x22, |
65660297 | 368 | .lower_margin = 0x00, |
e9937d4b | 369 | .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, |
d14b272b RP |
370 | }; |
371 | ||
372 | static struct pxafb_mach_info sharp_lq64d343 = { | |
373 | .modes = &sharp_lq64d343_mode, | |
374 | .num_modes = 1, | |
0219e835 EM |
375 | .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL | |
376 | LCD_ALTERNATE_MAPPING, | |
65660297 LB |
377 | }; |
378 | ||
379 | /* 10.4" TFT VGA (LoLo display number 7) */ | |
d14b272b | 380 | static struct pxafb_mode_info sharp_lq10d368_mode = { |
65660297 LB |
381 | .pixclock = 25000, |
382 | .xres = 640, | |
383 | .yres = 480, | |
384 | .bpp = 16, | |
385 | .hsync_len = 0x31, | |
386 | .left_margin = 0x89, | |
387 | .right_margin = 0x19, | |
388 | .vsync_len = 0x12, | |
389 | .upper_margin = 0x22, | |
390 | .lower_margin = 0x00, | |
391 | .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, | |
d14b272b RP |
392 | }; |
393 | ||
394 | static struct pxafb_mach_info sharp_lq10d368 = { | |
395 | .modes = &sharp_lq10d368_mode, | |
396 | .num_modes = 1, | |
0219e835 EM |
397 | .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL | |
398 | LCD_ALTERNATE_MAPPING, | |
e9937d4b LB |
399 | }; |
400 | ||
401 | /* 3.5" TFT QVGA (LoLo display number 8) */ | |
d14b272b | 402 | static struct pxafb_mode_info sharp_lq035q7db02_20_mode = { |
65660297 | 403 | .pixclock = 150000, |
e9937d4b LB |
404 | .xres = 240, |
405 | .yres = 320, | |
406 | .bpp = 16, | |
65660297 LB |
407 | .hsync_len = 0x0e, |
408 | .left_margin = 0x0a, | |
409 | .right_margin = 0x0a, | |
410 | .vsync_len = 0x03, | |
e9937d4b LB |
411 | .upper_margin = 0x05, |
412 | .lower_margin = 0x14, | |
65660297 | 413 | .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, |
d14b272b RP |
414 | }; |
415 | ||
416 | static struct pxafb_mach_info sharp_lq035q7db02_20 = { | |
417 | .modes = &sharp_lq035q7db02_20_mode, | |
418 | .num_modes = 1, | |
0219e835 EM |
419 | .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL | |
420 | LCD_ALTERNATE_MAPPING, | |
e9937d4b LB |
421 | }; |
422 | ||
65660297 LB |
423 | static struct pxafb_mach_info *lpd270_lcd_to_use; |
424 | ||
425 | static int __init lpd270_set_lcd(char *str) | |
426 | { | |
427 | if (!strnicmp(str, "lq057q3dc02", 11)) { | |
428 | lpd270_lcd_to_use = &sharp_lq057q3dc02; | |
429 | } else if (!strnicmp(str, "lq121s1dg31", 11)) { | |
430 | lpd270_lcd_to_use = &sharp_lq121s1dg31; | |
431 | } else if (!strnicmp(str, "lq036q1da01", 11)) { | |
432 | lpd270_lcd_to_use = &sharp_lq036q1da01; | |
433 | } else if (!strnicmp(str, "lq64d343", 8)) { | |
434 | lpd270_lcd_to_use = &sharp_lq64d343; | |
435 | } else if (!strnicmp(str, "lq10d368", 8)) { | |
436 | lpd270_lcd_to_use = &sharp_lq10d368; | |
437 | } else if (!strnicmp(str, "lq035q7db02-20", 14)) { | |
438 | lpd270_lcd_to_use = &sharp_lq035q7db02_20; | |
439 | } else { | |
440 | printk(KERN_INFO "lpd270: unknown lcd panel [%s]\n", str); | |
441 | } | |
442 | ||
443 | return 1; | |
444 | } | |
445 | ||
446 | __setup("lcd=", lpd270_set_lcd); | |
447 | ||
e9937d4b LB |
448 | static struct platform_device *platform_devices[] __initdata = { |
449 | &smc91x_device, | |
4a730719 | 450 | &lpd270_backlight_device, |
e9937d4b LB |
451 | &lpd270_flash_device[0], |
452 | &lpd270_flash_device[1], | |
453 | }; | |
454 | ||
e9937d4b LB |
455 | static struct pxaohci_platform_data lpd270_ohci_platform_data = { |
456 | .port_mode = PMM_PERPORT_MODE, | |
097b5334 | 457 | .flags = ENABLE_PORT_ALL | POWER_CONTROL_LOW | POWER_SENSE_LOW, |
e9937d4b LB |
458 | }; |
459 | ||
460 | static void __init lpd270_init(void) | |
461 | { | |
fd90ff20 EM |
462 | pxa2xx_mfp_config(ARRAY_AND_SIZE(lpd270_pin_config)); |
463 | ||
cc155c6f RK |
464 | pxa_set_ffuart_info(NULL); |
465 | pxa_set_btuart_info(NULL); | |
466 | pxa_set_stuart_info(NULL); | |
467 | ||
ad68bb9f | 468 | lpd270_flash_data[0].width = (__raw_readl(BOOT_DEF) & 1) ? 2 : 4; |
e9937d4b LB |
469 | lpd270_flash_data[1].width = 4; |
470 | ||
471 | /* | |
472 | * System bus arbiter setting: | |
473 | * - Core_Park | |
474 | * - LCD_wt:DMA_wt:CORE_Wt = 2:3:4 | |
475 | */ | |
476 | ARB_CNTRL = ARB_CORE_PARK | 0x234; | |
477 | ||
e9937d4b LB |
478 | platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); |
479 | ||
9f19d638 MB |
480 | pxa_set_ac97_info(NULL); |
481 | ||
65660297 LB |
482 | if (lpd270_lcd_to_use != NULL) |
483 | set_pxa_fb_info(lpd270_lcd_to_use); | |
e9937d4b LB |
484 | |
485 | pxa_set_ohci_info(&lpd270_ohci_platform_data); | |
486 | } | |
487 | ||
488 | ||
489 | static struct map_desc lpd270_io_desc[] __initdata = { | |
490 | { | |
491 | .virtual = LPD270_CPLD_VIRT, | |
492 | .pfn = __phys_to_pfn(LPD270_CPLD_PHYS), | |
493 | .length = LPD270_CPLD_SIZE, | |
494 | .type = MT_DEVICE, | |
495 | }, | |
496 | }; | |
497 | ||
498 | static void __init lpd270_map_io(void) | |
499 | { | |
851982c1 | 500 | pxa27x_map_io(); |
e9937d4b LB |
501 | iotable_init(lpd270_io_desc, ARRAY_SIZE(lpd270_io_desc)); |
502 | ||
e9937d4b LB |
503 | /* for use I SRAM as framebuffer. */ |
504 | PSLR |= 0x00000F04; | |
505 | PCFR = 0x00000066; | |
506 | } | |
507 | ||
508 | MACHINE_START(LOGICPD_PXA270, "LogicPD PXA270 Card Engine") | |
509 | /* Maintainer: Peter Barada */ | |
e9937d4b LB |
510 | .boot_params = 0xa0000100, |
511 | .map_io = lpd270_map_io, | |
6ac6b817 | 512 | .nr_irqs = LPD270_NR_IRQS, |
e9937d4b LB |
513 | .init_irq = lpd270_init_irq, |
514 | .timer = &pxa_timer, | |
515 | .init_machine = lpd270_init, | |
516 | MACHINE_END |