Input: eeti_ts: pass gpio value instead of IRQ
[deliverable/linux.git] / arch / arm / mach-pxa / smemc.c
CommitLineData
b1d907f9 1/*
2 * Static Memory Controller
3 */
4
5#include <linux/module.h>
6#include <linux/kernel.h>
7#include <linux/init.h>
8#include <linux/io.h>
2eaa03b5 9#include <linux/syscore_ops.h>
b1d907f9 10
05678a96 11#include <mach/hardware.h>
ad68bb9f 12#include <mach/smemc.h>
b1d907f9 13
14#ifdef CONFIG_PM
b1d907f9 15static unsigned long msc[2];
16static unsigned long sxcnfg, memclkcfg;
17static unsigned long csadrcfg[4];
18
2eaa03b5 19static int pxa3xx_smemc_suspend(void)
b1d907f9 20{
ad68bb9f
MV
21 msc[0] = __raw_readl(MSC0);
22 msc[1] = __raw_readl(MSC1);
23 sxcnfg = __raw_readl(SXCNFG);
24 memclkcfg = __raw_readl(MEMCLKCFG);
25 csadrcfg[0] = __raw_readl(CSADRCFG0);
26 csadrcfg[1] = __raw_readl(CSADRCFG1);
27 csadrcfg[2] = __raw_readl(CSADRCFG2);
28 csadrcfg[3] = __raw_readl(CSADRCFG3);
b1d907f9 29
30 return 0;
31}
32
2eaa03b5 33static void pxa3xx_smemc_resume(void)
b1d907f9 34{
ad68bb9f
MV
35 __raw_writel(msc[0], MSC0);
36 __raw_writel(msc[1], MSC1);
37 __raw_writel(sxcnfg, SXCNFG);
38 __raw_writel(memclkcfg, MEMCLKCFG);
39 __raw_writel(csadrcfg[0], CSADRCFG0);
40 __raw_writel(csadrcfg[1], CSADRCFG1);
41 __raw_writel(csadrcfg[2], CSADRCFG2);
42 __raw_writel(csadrcfg[3], CSADRCFG3);
b1d907f9 43}
44
2eaa03b5 45static struct syscore_ops smemc_syscore_ops = {
b1d907f9 46 .suspend = pxa3xx_smemc_suspend,
47 .resume = pxa3xx_smemc_resume,
48};
49
b1d907f9 50static int __init smemc_init(void)
51{
2eaa03b5
RW
52 if (cpu_is_pxa3xx())
53 register_syscore_ops(&smemc_syscore_ops);
b1d907f9 54
2eaa03b5 55 return 0;
b1d907f9 56}
57subsys_initcall(smemc_init);
58#endif
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