Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* linux/arch/arm/mach-s3c2410/devs.c |
2 | * | |
3 | * Copyright (c) 2004 Simtec Electronics | |
4 | * Ben Dooks <ben@simtec.co.uk> | |
5 | * | |
6 | * Base S3C2410 platform device definitions | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | * | |
12 | * Modifications: | |
0367a8d3 | 13 | * 15-Jan-2006 LCVR Using S3C24XX_PA_##x macro for common S3C24XX devices |
1da177e4 LT |
14 | * 10-Mar-2005 LCVR Changed S3C2410_{VA,SZ} to S3C24XX_{VA,SZ} |
15 | * 10-Feb-2005 BJD Added camera from guillaume.gourat@nexvision.tv | |
16 | * 29-Aug-2004 BJD Added timers 0 through 3 | |
17 | * 29-Aug-2004 BJD Changed index of devices we only have one of to -1 | |
18 | * 21-Aug-2004 BJD Added IRQ_TICK to RTC resources | |
19 | * 18-Aug-2004 BJD Created initial version | |
20 | */ | |
21 | ||
22 | #include <linux/kernel.h> | |
23 | #include <linux/types.h> | |
24 | #include <linux/interrupt.h> | |
25 | #include <linux/list.h> | |
26 | #include <linux/timer.h> | |
27 | #include <linux/init.h> | |
d052d1be | 28 | #include <linux/platform_device.h> |
1da177e4 LT |
29 | |
30 | #include <asm/mach/arch.h> | |
31 | #include <asm/mach/map.h> | |
32 | #include <asm/mach/irq.h> | |
f92273c1 | 33 | #include <asm/arch/fb.h> |
1da177e4 LT |
34 | #include <asm/hardware.h> |
35 | #include <asm/io.h> | |
36 | #include <asm/irq.h> | |
37 | ||
38 | #include <asm/arch/regs-serial.h> | |
39 | ||
40 | #include "devs.h" | |
41 | ||
42 | /* Serial port registrations */ | |
43 | ||
44 | struct platform_device *s3c24xx_uart_devs[3]; | |
45 | ||
46 | /* USB Host Controller */ | |
47 | ||
48 | static struct resource s3c_usb_resource[] = { | |
49 | [0] = { | |
0367a8d3 LCVR |
50 | .start = S3C24XX_PA_USBHOST, |
51 | .end = S3C24XX_PA_USBHOST + S3C24XX_SZ_USBHOST - 1, | |
1da177e4 LT |
52 | .flags = IORESOURCE_MEM, |
53 | }, | |
54 | [1] = { | |
55 | .start = IRQ_USBH, | |
56 | .end = IRQ_USBH, | |
57 | .flags = IORESOURCE_IRQ, | |
58 | } | |
59 | }; | |
60 | ||
61 | static u64 s3c_device_usb_dmamask = 0xffffffffUL; | |
62 | ||
63 | struct platform_device s3c_device_usb = { | |
64 | .name = "s3c2410-ohci", | |
65 | .id = -1, | |
66 | .num_resources = ARRAY_SIZE(s3c_usb_resource), | |
67 | .resource = s3c_usb_resource, | |
68 | .dev = { | |
69 | .dma_mask = &s3c_device_usb_dmamask, | |
70 | .coherent_dma_mask = 0xffffffffUL | |
71 | } | |
72 | }; | |
73 | ||
74 | EXPORT_SYMBOL(s3c_device_usb); | |
75 | ||
76 | /* LCD Controller */ | |
77 | ||
78 | static struct resource s3c_lcd_resource[] = { | |
79 | [0] = { | |
0367a8d3 LCVR |
80 | .start = S3C24XX_PA_LCD, |
81 | .end = S3C24XX_PA_LCD + S3C24XX_SZ_LCD - 1, | |
1da177e4 LT |
82 | .flags = IORESOURCE_MEM, |
83 | }, | |
84 | [1] = { | |
85 | .start = IRQ_LCD, | |
86 | .end = IRQ_LCD, | |
87 | .flags = IORESOURCE_IRQ, | |
88 | } | |
89 | ||
90 | }; | |
91 | ||
92 | static u64 s3c_device_lcd_dmamask = 0xffffffffUL; | |
93 | ||
94 | struct platform_device s3c_device_lcd = { | |
95 | .name = "s3c2410-lcd", | |
96 | .id = -1, | |
97 | .num_resources = ARRAY_SIZE(s3c_lcd_resource), | |
98 | .resource = s3c_lcd_resource, | |
99 | .dev = { | |
6904b246 BD |
100 | .dma_mask = &s3c_device_lcd_dmamask, |
101 | .coherent_dma_mask = 0xffffffffUL | |
1da177e4 LT |
102 | } |
103 | }; | |
104 | ||
105 | EXPORT_SYMBOL(s3c_device_lcd); | |
106 | ||
893b0309 | 107 | void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd) |
f92273c1 | 108 | { |
893b0309 BD |
109 | struct s3c2410fb_mach_info *npd; |
110 | ||
111 | npd = kmalloc(sizeof(*npd), GFP_KERNEL); | |
112 | if (npd) { | |
113 | memcpy(npd, pd, sizeof(*npd)); | |
114 | s3c_device_lcd.dev.platform_data = npd; | |
115 | } else { | |
116 | printk(KERN_ERR "no memory for LCD platform data\n"); | |
117 | } | |
f92273c1 | 118 | } |
f92273c1 | 119 | |
1da177e4 LT |
120 | /* NAND Controller */ |
121 | ||
122 | static struct resource s3c_nand_resource[] = { | |
123 | [0] = { | |
124 | .start = S3C2410_PA_NAND, | |
a0e0adb9 | 125 | .end = S3C2410_PA_NAND + S3C24XX_SZ_NAND - 1, |
1da177e4 LT |
126 | .flags = IORESOURCE_MEM, |
127 | } | |
128 | }; | |
129 | ||
130 | struct platform_device s3c_device_nand = { | |
131 | .name = "s3c2410-nand", | |
132 | .id = -1, | |
133 | .num_resources = ARRAY_SIZE(s3c_nand_resource), | |
134 | .resource = s3c_nand_resource, | |
135 | }; | |
136 | ||
137 | EXPORT_SYMBOL(s3c_device_nand); | |
138 | ||
139 | /* USB Device (Gadget)*/ | |
140 | ||
141 | static struct resource s3c_usbgadget_resource[] = { | |
142 | [0] = { | |
0367a8d3 LCVR |
143 | .start = S3C24XX_PA_USBDEV, |
144 | .end = S3C24XX_PA_USBDEV + S3C24XX_SZ_USBDEV - 1, | |
1da177e4 LT |
145 | .flags = IORESOURCE_MEM, |
146 | }, | |
147 | [1] = { | |
148 | .start = IRQ_USBD, | |
149 | .end = IRQ_USBD, | |
150 | .flags = IORESOURCE_IRQ, | |
151 | } | |
152 | ||
153 | }; | |
154 | ||
155 | struct platform_device s3c_device_usbgadget = { | |
156 | .name = "s3c2410-usbgadget", | |
157 | .id = -1, | |
158 | .num_resources = ARRAY_SIZE(s3c_usbgadget_resource), | |
159 | .resource = s3c_usbgadget_resource, | |
160 | }; | |
161 | ||
162 | EXPORT_SYMBOL(s3c_device_usbgadget); | |
163 | ||
164 | /* Watchdog */ | |
165 | ||
166 | static struct resource s3c_wdt_resource[] = { | |
167 | [0] = { | |
0367a8d3 LCVR |
168 | .start = S3C24XX_PA_WATCHDOG, |
169 | .end = S3C24XX_PA_WATCHDOG + S3C24XX_SZ_WATCHDOG - 1, | |
1da177e4 LT |
170 | .flags = IORESOURCE_MEM, |
171 | }, | |
172 | [1] = { | |
173 | .start = IRQ_WDT, | |
174 | .end = IRQ_WDT, | |
175 | .flags = IORESOURCE_IRQ, | |
176 | } | |
177 | ||
178 | }; | |
179 | ||
180 | struct platform_device s3c_device_wdt = { | |
181 | .name = "s3c2410-wdt", | |
182 | .id = -1, | |
183 | .num_resources = ARRAY_SIZE(s3c_wdt_resource), | |
184 | .resource = s3c_wdt_resource, | |
185 | }; | |
186 | ||
187 | EXPORT_SYMBOL(s3c_device_wdt); | |
188 | ||
189 | /* I2C */ | |
190 | ||
191 | static struct resource s3c_i2c_resource[] = { | |
192 | [0] = { | |
0367a8d3 LCVR |
193 | .start = S3C24XX_PA_IIC, |
194 | .end = S3C24XX_PA_IIC + S3C24XX_SZ_IIC - 1, | |
1da177e4 LT |
195 | .flags = IORESOURCE_MEM, |
196 | }, | |
197 | [1] = { | |
198 | .start = IRQ_IIC, | |
199 | .end = IRQ_IIC, | |
200 | .flags = IORESOURCE_IRQ, | |
201 | } | |
202 | ||
203 | }; | |
204 | ||
205 | struct platform_device s3c_device_i2c = { | |
206 | .name = "s3c2410-i2c", | |
207 | .id = -1, | |
208 | .num_resources = ARRAY_SIZE(s3c_i2c_resource), | |
209 | .resource = s3c_i2c_resource, | |
210 | }; | |
211 | ||
212 | EXPORT_SYMBOL(s3c_device_i2c); | |
213 | ||
214 | /* IIS */ | |
215 | ||
216 | static struct resource s3c_iis_resource[] = { | |
217 | [0] = { | |
0367a8d3 LCVR |
218 | .start = S3C24XX_PA_IIS, |
219 | .end = S3C24XX_PA_IIS + S3C24XX_SZ_IIS -1, | |
1da177e4 LT |
220 | .flags = IORESOURCE_MEM, |
221 | } | |
222 | }; | |
223 | ||
224 | static u64 s3c_device_iis_dmamask = 0xffffffffUL; | |
225 | ||
226 | struct platform_device s3c_device_iis = { | |
227 | .name = "s3c2410-iis", | |
228 | .id = -1, | |
229 | .num_resources = ARRAY_SIZE(s3c_iis_resource), | |
230 | .resource = s3c_iis_resource, | |
231 | .dev = { | |
232 | .dma_mask = &s3c_device_iis_dmamask, | |
233 | .coherent_dma_mask = 0xffffffffUL | |
234 | } | |
235 | }; | |
236 | ||
237 | EXPORT_SYMBOL(s3c_device_iis); | |
238 | ||
239 | /* RTC */ | |
240 | ||
241 | static struct resource s3c_rtc_resource[] = { | |
242 | [0] = { | |
0367a8d3 LCVR |
243 | .start = S3C24XX_PA_RTC, |
244 | .end = S3C24XX_PA_RTC + 0xff, | |
1da177e4 LT |
245 | .flags = IORESOURCE_MEM, |
246 | }, | |
247 | [1] = { | |
248 | .start = IRQ_RTC, | |
249 | .end = IRQ_RTC, | |
250 | .flags = IORESOURCE_IRQ, | |
251 | }, | |
252 | [2] = { | |
253 | .start = IRQ_TICK, | |
254 | .end = IRQ_TICK, | |
255 | .flags = IORESOURCE_IRQ | |
256 | } | |
257 | }; | |
258 | ||
259 | struct platform_device s3c_device_rtc = { | |
260 | .name = "s3c2410-rtc", | |
261 | .id = -1, | |
262 | .num_resources = ARRAY_SIZE(s3c_rtc_resource), | |
263 | .resource = s3c_rtc_resource, | |
264 | }; | |
265 | ||
266 | EXPORT_SYMBOL(s3c_device_rtc); | |
267 | ||
268 | /* ADC */ | |
269 | ||
270 | static struct resource s3c_adc_resource[] = { | |
271 | [0] = { | |
0367a8d3 LCVR |
272 | .start = S3C24XX_PA_ADC, |
273 | .end = S3C24XX_PA_ADC + S3C24XX_SZ_ADC - 1, | |
1da177e4 LT |
274 | .flags = IORESOURCE_MEM, |
275 | }, | |
276 | [1] = { | |
277 | .start = IRQ_TC, | |
278 | .end = IRQ_ADC, | |
279 | .flags = IORESOURCE_IRQ, | |
280 | } | |
281 | ||
282 | }; | |
283 | ||
284 | struct platform_device s3c_device_adc = { | |
285 | .name = "s3c2410-adc", | |
286 | .id = -1, | |
287 | .num_resources = ARRAY_SIZE(s3c_adc_resource), | |
288 | .resource = s3c_adc_resource, | |
289 | }; | |
290 | ||
291 | /* SDI */ | |
292 | ||
293 | static struct resource s3c_sdi_resource[] = { | |
294 | [0] = { | |
295 | .start = S3C2410_PA_SDI, | |
a0e0adb9 | 296 | .end = S3C2410_PA_SDI + S3C24XX_SZ_SDI - 1, |
1da177e4 LT |
297 | .flags = IORESOURCE_MEM, |
298 | }, | |
299 | [1] = { | |
300 | .start = IRQ_SDI, | |
301 | .end = IRQ_SDI, | |
302 | .flags = IORESOURCE_IRQ, | |
303 | } | |
304 | ||
305 | }; | |
306 | ||
307 | struct platform_device s3c_device_sdi = { | |
308 | .name = "s3c2410-sdi", | |
309 | .id = -1, | |
310 | .num_resources = ARRAY_SIZE(s3c_sdi_resource), | |
311 | .resource = s3c_sdi_resource, | |
312 | }; | |
313 | ||
314 | EXPORT_SYMBOL(s3c_device_sdi); | |
315 | ||
316 | /* SPI (0) */ | |
317 | ||
318 | static struct resource s3c_spi0_resource[] = { | |
319 | [0] = { | |
0367a8d3 LCVR |
320 | .start = S3C24XX_PA_SPI, |
321 | .end = S3C24XX_PA_SPI + 0x1f, | |
1da177e4 LT |
322 | .flags = IORESOURCE_MEM, |
323 | }, | |
324 | [1] = { | |
325 | .start = IRQ_SPI0, | |
326 | .end = IRQ_SPI0, | |
327 | .flags = IORESOURCE_IRQ, | |
328 | } | |
329 | ||
330 | }; | |
331 | ||
332 | struct platform_device s3c_device_spi0 = { | |
333 | .name = "s3c2410-spi", | |
334 | .id = 0, | |
335 | .num_resources = ARRAY_SIZE(s3c_spi0_resource), | |
336 | .resource = s3c_spi0_resource, | |
337 | }; | |
338 | ||
339 | EXPORT_SYMBOL(s3c_device_spi0); | |
340 | ||
341 | /* SPI (1) */ | |
342 | ||
343 | static struct resource s3c_spi1_resource[] = { | |
344 | [0] = { | |
0367a8d3 LCVR |
345 | .start = S3C24XX_PA_SPI + 0x20, |
346 | .end = S3C24XX_PA_SPI + 0x20 + 0x1f, | |
1da177e4 LT |
347 | .flags = IORESOURCE_MEM, |
348 | }, | |
349 | [1] = { | |
350 | .start = IRQ_SPI1, | |
351 | .end = IRQ_SPI1, | |
352 | .flags = IORESOURCE_IRQ, | |
353 | } | |
354 | ||
355 | }; | |
356 | ||
357 | struct platform_device s3c_device_spi1 = { | |
358 | .name = "s3c2410-spi", | |
359 | .id = 1, | |
360 | .num_resources = ARRAY_SIZE(s3c_spi1_resource), | |
361 | .resource = s3c_spi1_resource, | |
362 | }; | |
363 | ||
364 | EXPORT_SYMBOL(s3c_device_spi1); | |
365 | ||
366 | /* pwm timer blocks */ | |
367 | ||
368 | static struct resource s3c_timer0_resource[] = { | |
369 | [0] = { | |
0367a8d3 LCVR |
370 | .start = S3C24XX_PA_TIMER + 0x0C, |
371 | .end = S3C24XX_PA_TIMER + 0x0C + 0xB, | |
1da177e4 LT |
372 | .flags = IORESOURCE_MEM, |
373 | }, | |
374 | [1] = { | |
375 | .start = IRQ_TIMER0, | |
376 | .end = IRQ_TIMER0, | |
377 | .flags = IORESOURCE_IRQ, | |
378 | } | |
379 | ||
380 | }; | |
381 | ||
382 | struct platform_device s3c_device_timer0 = { | |
383 | .name = "s3c2410-timer", | |
384 | .id = 0, | |
385 | .num_resources = ARRAY_SIZE(s3c_timer0_resource), | |
386 | .resource = s3c_timer0_resource, | |
387 | }; | |
388 | ||
389 | EXPORT_SYMBOL(s3c_device_timer0); | |
390 | ||
391 | /* timer 1 */ | |
392 | ||
393 | static struct resource s3c_timer1_resource[] = { | |
394 | [0] = { | |
0367a8d3 LCVR |
395 | .start = S3C24XX_PA_TIMER + 0x18, |
396 | .end = S3C24XX_PA_TIMER + 0x23, | |
1da177e4 LT |
397 | .flags = IORESOURCE_MEM, |
398 | }, | |
399 | [1] = { | |
400 | .start = IRQ_TIMER1, | |
401 | .end = IRQ_TIMER1, | |
402 | .flags = IORESOURCE_IRQ, | |
403 | } | |
404 | ||
405 | }; | |
406 | ||
407 | struct platform_device s3c_device_timer1 = { | |
408 | .name = "s3c2410-timer", | |
409 | .id = 1, | |
410 | .num_resources = ARRAY_SIZE(s3c_timer1_resource), | |
411 | .resource = s3c_timer1_resource, | |
412 | }; | |
413 | ||
414 | EXPORT_SYMBOL(s3c_device_timer1); | |
415 | ||
416 | /* timer 2 */ | |
417 | ||
418 | static struct resource s3c_timer2_resource[] = { | |
419 | [0] = { | |
0367a8d3 LCVR |
420 | .start = S3C24XX_PA_TIMER + 0x24, |
421 | .end = S3C24XX_PA_TIMER + 0x2F, | |
1da177e4 LT |
422 | .flags = IORESOURCE_MEM, |
423 | }, | |
424 | [1] = { | |
425 | .start = IRQ_TIMER2, | |
426 | .end = IRQ_TIMER2, | |
427 | .flags = IORESOURCE_IRQ, | |
428 | } | |
429 | ||
430 | }; | |
431 | ||
432 | struct platform_device s3c_device_timer2 = { | |
433 | .name = "s3c2410-timer", | |
434 | .id = 2, | |
435 | .num_resources = ARRAY_SIZE(s3c_timer2_resource), | |
436 | .resource = s3c_timer2_resource, | |
437 | }; | |
438 | ||
439 | EXPORT_SYMBOL(s3c_device_timer2); | |
440 | ||
441 | /* timer 3 */ | |
442 | ||
443 | static struct resource s3c_timer3_resource[] = { | |
444 | [0] = { | |
0367a8d3 LCVR |
445 | .start = S3C24XX_PA_TIMER + 0x30, |
446 | .end = S3C24XX_PA_TIMER + 0x3B, | |
1da177e4 LT |
447 | .flags = IORESOURCE_MEM, |
448 | }, | |
449 | [1] = { | |
450 | .start = IRQ_TIMER3, | |
451 | .end = IRQ_TIMER3, | |
452 | .flags = IORESOURCE_IRQ, | |
453 | } | |
454 | ||
455 | }; | |
456 | ||
457 | struct platform_device s3c_device_timer3 = { | |
458 | .name = "s3c2410-timer", | |
459 | .id = 3, | |
460 | .num_resources = ARRAY_SIZE(s3c_timer3_resource), | |
461 | .resource = s3c_timer3_resource, | |
462 | }; | |
463 | ||
464 | EXPORT_SYMBOL(s3c_device_timer3); | |
465 | ||
466 | #ifdef CONFIG_CPU_S3C2440 | |
467 | ||
468 | /* Camif Controller */ | |
469 | ||
470 | static struct resource s3c_camif_resource[] = { | |
471 | [0] = { | |
472 | .start = S3C2440_PA_CAMIF, | |
a0e0adb9 | 473 | .end = S3C2440_PA_CAMIF + S3C2440_SZ_CAMIF - 1, |
1da177e4 LT |
474 | .flags = IORESOURCE_MEM, |
475 | }, | |
476 | [1] = { | |
477 | .start = IRQ_CAM, | |
478 | .end = IRQ_CAM, | |
479 | .flags = IORESOURCE_IRQ, | |
480 | } | |
481 | ||
482 | }; | |
483 | ||
484 | static u64 s3c_device_camif_dmamask = 0xffffffffUL; | |
485 | ||
486 | struct platform_device s3c_device_camif = { | |
487 | .name = "s3c2440-camif", | |
488 | .id = -1, | |
489 | .num_resources = ARRAY_SIZE(s3c_camif_resource), | |
490 | .resource = s3c_camif_resource, | |
491 | .dev = { | |
492 | .dma_mask = &s3c_device_camif_dmamask, | |
493 | .coherent_dma_mask = 0xffffffffUL | |
494 | } | |
495 | }; | |
496 | ||
497 | EXPORT_SYMBOL(s3c_device_camif); | |
498 | ||
499 | #endif // CONFIG_CPU_S32440 |