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e1a3c74f MB |
1 | /* linux/arch/arm/mach-s3c64xx/mach-crag6410.c |
2 | * | |
3 | * Copyright 2011 Wolfson Microelectronics plc | |
4 | * Mark Brown <broonie@opensource.wolfsonmicro.com> | |
5 | * | |
6 | * Copyright 2011 Simtec Electronics | |
7 | * Ben Dooks <ben@simtec.co.uk> | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License version 2 as | |
11 | * published by the Free Software Foundation. | |
12 | */ | |
13 | ||
14 | #include <linux/kernel.h> | |
15 | #include <linux/list.h> | |
16 | #include <linux/serial_core.h> | |
17 | #include <linux/platform_device.h> | |
18 | #include <linux/fb.h> | |
19 | #include <linux/io.h> | |
20 | #include <linux/init.h> | |
21 | #include <linux/gpio.h> | |
66211f98 | 22 | #include <linux/leds.h> |
e1a3c74f | 23 | #include <linux/delay.h> |
fb7f60f3 | 24 | #include <linux/mmc/host.h> |
e1a3c74f | 25 | #include <linux/regulator/machine.h> |
ae24c263 | 26 | #include <linux/regulator/fixed.h> |
e1a3c74f MB |
27 | #include <linux/pwm_backlight.h> |
28 | #include <linux/dm9000.h> | |
29 | #include <linux/gpio_keys.h> | |
30 | #include <linux/basic_mmio_gpio.h> | |
31 | #include <linux/spi/spi.h> | |
32 | ||
33 | #include <linux/i2c/pca953x.h> | |
34 | ||
35 | #include <video/platform_lcd.h> | |
36 | ||
37 | #include <linux/mfd/wm831x/core.h> | |
38 | #include <linux/mfd/wm831x/pdata.h> | |
ae24c263 | 39 | #include <linux/mfd/wm831x/irq.h> |
e1a3c74f MB |
40 | #include <linux/mfd/wm831x/gpio.h> |
41 | ||
8504a3cb MB |
42 | #include <sound/wm1250-ev1.h> |
43 | ||
774b51f8 | 44 | #include <asm/hardware/vic.h> |
e1a3c74f MB |
45 | #include <asm/mach/arch.h> |
46 | #include <asm/mach-types.h> | |
47 | ||
48 | #include <mach/hardware.h> | |
49 | #include <mach/map.h> | |
50 | ||
e1a3c74f MB |
51 | #include <mach/regs-sys.h> |
52 | #include <mach/regs-gpio.h> | |
53 | #include <mach/regs-modem.h> | |
d0f0b43f | 54 | #include <mach/crag6410.h> |
e1a3c74f | 55 | |
e1a3c74f MB |
56 | #include <mach/regs-gpio-memport.h> |
57 | ||
58 | #include <plat/regs-serial.h> | |
59 | #include <plat/regs-fb-v4.h> | |
60 | #include <plat/fb.h> | |
61 | #include <plat/sdhci.h> | |
62 | #include <plat/gpio-cfg.h> | |
63 | #include <plat/s3c64xx-spi.h> | |
99f6e1f5 | 64 | #include <plat/udc-hs.h> |
e1a3c74f MB |
65 | |
66 | #include <plat/keypad.h> | |
67 | #include <plat/clock.h> | |
68 | #include <plat/devs.h> | |
69 | #include <plat/cpu.h> | |
70 | #include <plat/adc.h> | |
71 | #include <plat/iic.h> | |
72 | #include <plat/pm.h> | |
73 | ||
b024043b KK |
74 | #include "common.h" |
75 | ||
e1a3c74f MB |
76 | /* serial port setup */ |
77 | ||
78 | #define UCON (S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK) | |
79 | #define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB) | |
80 | #define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE) | |
81 | ||
82 | static struct s3c2410_uartcfg crag6410_uartcfgs[] __initdata = { | |
83 | [0] = { | |
ae24c263 MB |
84 | .hwport = 0, |
85 | .flags = 0, | |
86 | .ucon = UCON, | |
87 | .ulcon = ULCON, | |
88 | .ufcon = UFCON, | |
e1a3c74f MB |
89 | }, |
90 | [1] = { | |
ae24c263 MB |
91 | .hwport = 1, |
92 | .flags = 0, | |
93 | .ucon = UCON, | |
94 | .ulcon = ULCON, | |
95 | .ufcon = UFCON, | |
e1a3c74f MB |
96 | }, |
97 | [2] = { | |
ae24c263 MB |
98 | .hwport = 2, |
99 | .flags = 0, | |
100 | .ucon = UCON, | |
101 | .ulcon = ULCON, | |
102 | .ufcon = UFCON, | |
e1a3c74f MB |
103 | }, |
104 | [3] = { | |
ae24c263 MB |
105 | .hwport = 3, |
106 | .flags = 0, | |
107 | .ucon = UCON, | |
108 | .ulcon = ULCON, | |
109 | .ufcon = UFCON, | |
e1a3c74f MB |
110 | }, |
111 | }; | |
112 | ||
113 | static struct platform_pwm_backlight_data crag6410_backlight_data = { | |
114 | .pwm_id = 0, | |
115 | .max_brightness = 1000, | |
116 | .dft_brightness = 600, | |
117 | .pwm_period_ns = 100000, /* about 1kHz */ | |
118 | }; | |
119 | ||
120 | static struct platform_device crag6410_backlight_device = { | |
121 | .name = "pwm-backlight", | |
122 | .id = -1, | |
123 | .dev = { | |
124 | .parent = &s3c_device_timer[0].dev, | |
125 | .platform_data = &crag6410_backlight_data, | |
126 | }, | |
127 | }; | |
128 | ||
129 | static void crag6410_lcd_power_set(struct plat_lcd_data *pd, unsigned int power) | |
130 | { | |
131 | pr_debug("%s: setting power %d\n", __func__, power); | |
132 | ||
133 | if (power) { | |
134 | gpio_set_value(S3C64XX_GPB(0), 1); | |
135 | msleep(1); | |
136 | s3c_gpio_cfgpin(S3C64XX_GPF(14), S3C_GPIO_SFN(2)); | |
137 | } else { | |
138 | gpio_direction_output(S3C64XX_GPF(14), 0); | |
139 | gpio_set_value(S3C64XX_GPB(0), 0); | |
140 | } | |
141 | } | |
142 | ||
143 | static struct platform_device crag6410_lcd_powerdev = { | |
144 | .name = "platform-lcd", | |
145 | .id = -1, | |
146 | .dev.parent = &s3c_device_fb.dev, | |
147 | .dev.platform_data = &(struct plat_lcd_data) { | |
148 | .set_power = crag6410_lcd_power_set, | |
149 | }, | |
150 | }; | |
151 | ||
152 | /* 640x480 URT */ | |
153 | static struct s3c_fb_pd_win crag6410_fb_win0 = { | |
154 | /* this is to ensure we use win0 */ | |
155 | .win_mode = { | |
156 | .left_margin = 150, | |
157 | .right_margin = 80, | |
158 | .upper_margin = 40, | |
159 | .lower_margin = 5, | |
160 | .hsync_len = 40, | |
161 | .vsync_len = 5, | |
162 | .xres = 640, | |
163 | .yres = 480, | |
164 | }, | |
165 | .max_bpp = 32, | |
166 | .default_bpp = 16, | |
167 | .virtual_y = 480 * 2, | |
168 | .virtual_x = 640, | |
169 | }; | |
170 | ||
171 | /* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */ | |
172 | static struct s3c_fb_platdata crag6410_lcd_pdata __initdata = { | |
173 | .setup_gpio = s3c64xx_fb_gpio_setup_24bpp, | |
174 | .win[0] = &crag6410_fb_win0, | |
175 | .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB, | |
176 | .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC, | |
177 | }; | |
178 | ||
179 | /* 2x6 keypad */ | |
180 | ||
181 | static uint32_t crag6410_keymap[] __initdata = { | |
182 | /* KEY(row, col, keycode) */ | |
183 | KEY(0, 0, KEY_VOLUMEUP), | |
184 | KEY(0, 1, KEY_HOME), | |
185 | KEY(0, 2, KEY_VOLUMEDOWN), | |
186 | KEY(0, 3, KEY_HELP), | |
187 | KEY(0, 4, KEY_MENU), | |
188 | KEY(0, 5, KEY_MEDIA), | |
189 | KEY(1, 0, 232), | |
190 | KEY(1, 1, KEY_DOWN), | |
191 | KEY(1, 2, KEY_LEFT), | |
192 | KEY(1, 3, KEY_UP), | |
193 | KEY(1, 4, KEY_RIGHT), | |
194 | KEY(1, 5, KEY_CAMERA), | |
195 | }; | |
196 | ||
197 | static struct matrix_keymap_data crag6410_keymap_data __initdata = { | |
198 | .keymap = crag6410_keymap, | |
199 | .keymap_size = ARRAY_SIZE(crag6410_keymap), | |
200 | }; | |
201 | ||
202 | static struct samsung_keypad_platdata crag6410_keypad_data __initdata = { | |
203 | .keymap_data = &crag6410_keymap_data, | |
204 | .rows = 2, | |
205 | .cols = 6, | |
206 | }; | |
207 | ||
208 | static struct gpio_keys_button crag6410_gpio_keys[] = { | |
209 | [0] = { | |
210 | .code = KEY_SUSPEND, | |
211 | .gpio = S3C64XX_GPL(10), /* EINT 18 */ | |
ae24c263 | 212 | .type = EV_KEY, |
e1a3c74f MB |
213 | .wakeup = 1, |
214 | .active_low = 1, | |
215 | }, | |
ae24c263 MB |
216 | [1] = { |
217 | .code = SW_FRONT_PROXIMITY, | |
218 | .gpio = S3C64XX_GPN(11), /* EINT 11 */ | |
219 | .type = EV_SW, | |
220 | }, | |
e1a3c74f MB |
221 | }; |
222 | ||
223 | static struct gpio_keys_platform_data crag6410_gpio_keydata = { | |
224 | .buttons = crag6410_gpio_keys, | |
225 | .nbuttons = ARRAY_SIZE(crag6410_gpio_keys), | |
226 | }; | |
227 | ||
228 | static struct platform_device crag6410_gpio_keydev = { | |
229 | .name = "gpio-keys", | |
230 | .id = 0, | |
231 | .dev.platform_data = &crag6410_gpio_keydata, | |
232 | }; | |
233 | ||
234 | static struct resource crag6410_dm9k_resource[] = { | |
235 | [0] = { | |
236 | .start = S3C64XX_PA_XM0CSN5, | |
237 | .end = S3C64XX_PA_XM0CSN5 + 1, | |
238 | .flags = IORESOURCE_MEM, | |
239 | }, | |
240 | [1] = { | |
241 | .start = S3C64XX_PA_XM0CSN5 + (1 << 8), | |
242 | .end = S3C64XX_PA_XM0CSN5 + (1 << 8) + 1, | |
243 | .flags = IORESOURCE_MEM, | |
244 | }, | |
245 | [2] = { | |
246 | .start = S3C_EINT(17), | |
247 | .end = S3C_EINT(17), | |
248 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, | |
249 | }, | |
250 | }; | |
251 | ||
252 | static struct dm9000_plat_data mini6410_dm9k_pdata = { | |
253 | .flags = DM9000_PLATF_16BITONLY, | |
254 | }; | |
255 | ||
256 | static struct platform_device crag6410_dm9k_device = { | |
257 | .name = "dm9000", | |
258 | .id = -1, | |
259 | .num_resources = ARRAY_SIZE(crag6410_dm9k_resource), | |
260 | .resource = crag6410_dm9k_resource, | |
261 | .dev.platform_data = &mini6410_dm9k_pdata, | |
262 | }; | |
263 | ||
264 | static struct resource crag6410_mmgpio_resource[] = { | |
265 | [0] = { | |
91b60b1d | 266 | .name = "dat", |
e1a3c74f MB |
267 | .start = S3C64XX_PA_XM0CSN4 + 1, |
268 | .end = S3C64XX_PA_XM0CSN4 + 1, | |
269 | .flags = IORESOURCE_MEM, | |
270 | }, | |
271 | }; | |
272 | ||
273 | static struct platform_device crag6410_mmgpio = { | |
274 | .name = "basic-mmio-gpio", | |
275 | .id = -1, | |
276 | .resource = crag6410_mmgpio_resource, | |
277 | .num_resources = ARRAY_SIZE(crag6410_mmgpio_resource), | |
278 | .dev.platform_data = &(struct bgpio_pdata) { | |
91b60b1d | 279 | .base = MMGPIO_GPIO_BASE, |
e1a3c74f MB |
280 | }, |
281 | }; | |
282 | ||
ae24c263 MB |
283 | static struct platform_device speyside_device = { |
284 | .name = "speyside", | |
285 | .id = -1, | |
286 | }; | |
287 | ||
8c051ab4 MB |
288 | static struct platform_device lowland_device = { |
289 | .name = "lowland", | |
290 | .id = -1, | |
291 | }; | |
292 | ||
6414261f MB |
293 | static struct platform_device tobermory_device = { |
294 | .name = "tobermory", | |
ae24c263 MB |
295 | .id = -1, |
296 | }; | |
297 | ||
c5c32c96 MB |
298 | static struct platform_device littlemill_device = { |
299 | .name = "littlemill", | |
300 | .id = -1, | |
301 | }; | |
302 | ||
ae24c263 | 303 | static struct regulator_consumer_supply wallvdd_consumers[] = { |
554f01fb | 304 | REGULATOR_SUPPLY("SPKVDD", "1-001a"), |
ae24c263 MB |
305 | REGULATOR_SUPPLY("SPKVDD1", "1-001a"), |
306 | REGULATOR_SUPPLY("SPKVDD2", "1-001a"), | |
4ed12b50 MB |
307 | REGULATOR_SUPPLY("SPKVDDL", "1-001a"), |
308 | REGULATOR_SUPPLY("SPKVDDR", "1-001a"), | |
ae24c263 MB |
309 | }; |
310 | ||
311 | static struct regulator_init_data wallvdd_data = { | |
312 | .constraints = { | |
313 | .always_on = 1, | |
314 | }, | |
315 | .num_consumer_supplies = ARRAY_SIZE(wallvdd_consumers), | |
316 | .consumer_supplies = wallvdd_consumers, | |
317 | }; | |
318 | ||
319 | static struct fixed_voltage_config wallvdd_pdata = { | |
320 | .supply_name = "WALLVDD", | |
321 | .microvolts = 5000000, | |
322 | .init_data = &wallvdd_data, | |
323 | .gpio = -EINVAL, | |
324 | }; | |
325 | ||
326 | static struct platform_device wallvdd_device = { | |
327 | .name = "reg-fixed-voltage", | |
328 | .id = -1, | |
329 | .dev = { | |
330 | .platform_data = &wallvdd_pdata, | |
331 | }, | |
332 | }; | |
333 | ||
e1a3c74f MB |
334 | static struct platform_device *crag6410_devices[] __initdata = { |
335 | &s3c_device_hsmmc0, | |
e1a3c74f MB |
336 | &s3c_device_hsmmc2, |
337 | &s3c_device_i2c0, | |
338 | &s3c_device_i2c1, | |
339 | &s3c_device_fb, | |
340 | &s3c_device_ohci, | |
341 | &s3c_device_usb_hsotg, | |
e1a3c74f MB |
342 | &s3c_device_timer[0], |
343 | &s3c64xx_device_iis0, | |
344 | &s3c64xx_device_iis1, | |
345 | &samsung_asoc_dma, | |
346 | &samsung_device_keypad, | |
347 | &crag6410_gpio_keydev, | |
348 | &crag6410_dm9k_device, | |
349 | &s3c64xx_device_spi0, | |
350 | &crag6410_mmgpio, | |
351 | &crag6410_lcd_powerdev, | |
352 | &crag6410_backlight_device, | |
ae24c263 | 353 | &speyside_device, |
6414261f | 354 | &tobermory_device, |
c5c32c96 | 355 | &littlemill_device, |
8c051ab4 | 356 | &lowland_device, |
ae24c263 | 357 | &wallvdd_device, |
e1a3c74f MB |
358 | }; |
359 | ||
360 | static struct pca953x_platform_data crag6410_pca_data = { | |
361 | .gpio_base = PCA935X_GPIO_BASE, | |
6e11e0bd | 362 | .irq_base = -1, |
e1a3c74f MB |
363 | }; |
364 | ||
986afc98 MB |
365 | /* VDDARM is controlled by DVS1 connected to GPK(0) */ |
366 | static struct wm831x_buckv_pdata vddarm_pdata = { | |
367 | .dvs_control_src = 1, | |
368 | .dvs_gpio = S3C64XX_GPK(0), | |
369 | }; | |
370 | ||
e1a3c74f MB |
371 | static struct regulator_consumer_supply vddarm_consumers[] __initdata = { |
372 | REGULATOR_SUPPLY("vddarm", NULL), | |
373 | }; | |
374 | ||
375 | static struct regulator_init_data vddarm __initdata = { | |
376 | .constraints = { | |
377 | .name = "VDDARM", | |
378 | .min_uV = 1000000, | |
379 | .max_uV = 1300000, | |
380 | .always_on = 1, | |
381 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, | |
382 | }, | |
383 | .num_consumer_supplies = ARRAY_SIZE(vddarm_consumers), | |
384 | .consumer_supplies = vddarm_consumers, | |
35127296 | 385 | .supply_regulator = "WALLVDD", |
986afc98 | 386 | .driver_data = &vddarm_pdata, |
e1a3c74f MB |
387 | }; |
388 | ||
39cb263e MB |
389 | static struct regulator_consumer_supply vddint_consumers[] __initdata = { |
390 | REGULATOR_SUPPLY("vddint", NULL), | |
391 | }; | |
392 | ||
e1a3c74f MB |
393 | static struct regulator_init_data vddint __initdata = { |
394 | .constraints = { | |
395 | .name = "VDDINT", | |
396 | .min_uV = 1000000, | |
397 | .max_uV = 1200000, | |
398 | .always_on = 1, | |
399 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, | |
400 | }, | |
39cb263e MB |
401 | .num_consumer_supplies = ARRAY_SIZE(vddint_consumers), |
402 | .consumer_supplies = vddint_consumers, | |
403 | .supply_regulator = "WALLVDD", | |
e1a3c74f MB |
404 | }; |
405 | ||
406 | static struct regulator_init_data vddmem __initdata = { | |
407 | .constraints = { | |
408 | .name = "VDDMEM", | |
409 | .always_on = 1, | |
410 | }, | |
411 | }; | |
412 | ||
413 | static struct regulator_init_data vddsys __initdata = { | |
414 | .constraints = { | |
415 | .name = "VDDSYS,VDDEXT,VDDPCM,VDDSS", | |
416 | .always_on = 1, | |
417 | }, | |
418 | }; | |
419 | ||
420 | static struct regulator_consumer_supply vddmmc_consumers[] __initdata = { | |
421 | REGULATOR_SUPPLY("vmmc", "s3c-sdhci.0"), | |
422 | REGULATOR_SUPPLY("vmmc", "s3c-sdhci.1"), | |
423 | REGULATOR_SUPPLY("vmmc", "s3c-sdhci.2"), | |
424 | }; | |
425 | ||
426 | static struct regulator_init_data vddmmc __initdata = { | |
427 | .constraints = { | |
428 | .name = "VDDMMC,UH", | |
429 | .always_on = 1, | |
430 | }, | |
431 | .num_consumer_supplies = ARRAY_SIZE(vddmmc_consumers), | |
432 | .consumer_supplies = vddmmc_consumers, | |
35127296 | 433 | .supply_regulator = "WALLVDD", |
e1a3c74f MB |
434 | }; |
435 | ||
436 | static struct regulator_init_data vddotgi __initdata = { | |
437 | .constraints = { | |
438 | .name = "VDDOTGi", | |
439 | .always_on = 1, | |
440 | }, | |
35127296 | 441 | .supply_regulator = "WALLVDD", |
e1a3c74f MB |
442 | }; |
443 | ||
444 | static struct regulator_init_data vddotg __initdata = { | |
445 | .constraints = { | |
446 | .name = "VDDOTG", | |
447 | .always_on = 1, | |
448 | }, | |
35127296 | 449 | .supply_regulator = "WALLVDD", |
e1a3c74f MB |
450 | }; |
451 | ||
452 | static struct regulator_init_data vddhi __initdata = { | |
453 | .constraints = { | |
454 | .name = "VDDHI", | |
455 | .always_on = 1, | |
456 | }, | |
35127296 | 457 | .supply_regulator = "WALLVDD", |
e1a3c74f MB |
458 | }; |
459 | ||
460 | static struct regulator_init_data vddadc __initdata = { | |
461 | .constraints = { | |
462 | .name = "VDDADC,VDDDAC", | |
463 | .always_on = 1, | |
464 | }, | |
35127296 | 465 | .supply_regulator = "WALLVDD", |
e1a3c74f MB |
466 | }; |
467 | ||
468 | static struct regulator_init_data vddmem0 __initdata = { | |
469 | .constraints = { | |
470 | .name = "VDDMEM0", | |
471 | .always_on = 1, | |
472 | }, | |
35127296 | 473 | .supply_regulator = "WALLVDD", |
e1a3c74f MB |
474 | }; |
475 | ||
476 | static struct regulator_init_data vddpll __initdata = { | |
477 | .constraints = { | |
478 | .name = "VDDPLL", | |
479 | .always_on = 1, | |
480 | }, | |
35127296 | 481 | .supply_regulator = "WALLVDD", |
e1a3c74f MB |
482 | }; |
483 | ||
484 | static struct regulator_init_data vddlcd __initdata = { | |
485 | .constraints = { | |
486 | .name = "VDDLCD", | |
487 | .always_on = 1, | |
488 | }, | |
35127296 | 489 | .supply_regulator = "WALLVDD", |
e1a3c74f MB |
490 | }; |
491 | ||
492 | static struct regulator_init_data vddalive __initdata = { | |
493 | .constraints = { | |
494 | .name = "VDDALIVE", | |
495 | .always_on = 1, | |
496 | }, | |
35127296 | 497 | .supply_regulator = "WALLVDD", |
e1a3c74f MB |
498 | }; |
499 | ||
89e1c3d0 MB |
500 | static struct wm831x_backup_pdata banff_backup_pdata __initdata = { |
501 | .charger_enable = 1, | |
502 | .vlim = 2500, /* mV */ | |
503 | .ilim = 200, /* uA */ | |
504 | }; | |
505 | ||
e1a3c74f MB |
506 | static struct wm831x_status_pdata banff_red_led __initdata = { |
507 | .name = "banff:red:", | |
508 | .default_src = WM831X_STATUS_MANUAL, | |
509 | }; | |
510 | ||
511 | static struct wm831x_status_pdata banff_green_led __initdata = { | |
512 | .name = "banff:green:", | |
513 | .default_src = WM831X_STATUS_MANUAL, | |
514 | }; | |
515 | ||
516 | static struct wm831x_touch_pdata touch_pdata __initdata = { | |
517 | .data_irq = S3C_EINT(26), | |
ae24c263 | 518 | .pd_irq = S3C_EINT(27), |
e1a3c74f MB |
519 | }; |
520 | ||
e1a3c74f | 521 | static struct wm831x_pdata crag_pmic_pdata __initdata = { |
ae24c263 | 522 | .wm831x_num = 1, |
e1a3c74f | 523 | .irq_base = BANFF_PMIC_IRQ_BASE, |
aaed44e1 | 524 | .gpio_base = BANFF_PMIC_GPIO_BASE, |
dcf3580a | 525 | .soft_shutdown = true, |
e1a3c74f | 526 | |
89e1c3d0 MB |
527 | .backup = &banff_backup_pdata, |
528 | ||
ae24c263 | 529 | .gpio_defaults = { |
986afc98 MB |
530 | /* GPIO5: DVS1_REQ - CMOS, DBVDD, active high */ |
531 | [4] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA | 0x8, | |
ae24c263 MB |
532 | /* GPIO11: Touchscreen data - CMOS, DBVDD, active high*/ |
533 | [10] = WM831X_GPN_POL | WM831X_GPN_ENA | 0x6, | |
534 | /* GPIO12: Touchscreen pen down - CMOS, DBVDD, active high*/ | |
535 | [11] = WM831X_GPN_POL | WM831X_GPN_ENA | 0x7, | |
536 | }, | |
537 | ||
e1a3c74f MB |
538 | .dcdc = { |
539 | &vddarm, /* DCDC1 */ | |
540 | &vddint, /* DCDC2 */ | |
541 | &vddmem, /* DCDC3 */ | |
542 | }, | |
543 | ||
544 | .ldo = { | |
545 | &vddsys, /* LDO1 */ | |
546 | &vddmmc, /* LDO2 */ | |
547 | NULL, /* LDO3 */ | |
548 | &vddotgi, /* LDO4 */ | |
549 | &vddotg, /* LDO5 */ | |
550 | &vddhi, /* LDO6 */ | |
551 | &vddadc, /* LDO7 */ | |
552 | &vddmem0, /* LDO8 */ | |
553 | &vddpll, /* LDO9 */ | |
554 | &vddlcd, /* LDO10 */ | |
555 | &vddalive, /* LDO11 */ | |
556 | }, | |
557 | ||
558 | .status = { | |
559 | &banff_green_led, | |
560 | &banff_red_led, | |
561 | }, | |
562 | ||
563 | .touch = &touch_pdata, | |
564 | }; | |
565 | ||
566 | static struct i2c_board_info i2c_devs0[] __initdata = { | |
567 | { I2C_BOARD_INFO("24c08", 0x50), }, | |
568 | { I2C_BOARD_INFO("tca6408", 0x20), | |
569 | .platform_data = &crag6410_pca_data, | |
570 | }, | |
571 | { I2C_BOARD_INFO("wm8312", 0x34), | |
572 | .platform_data = &crag_pmic_pdata, | |
573 | .irq = S3C_EINT(23), | |
574 | }, | |
575 | }; | |
576 | ||
577 | static struct s3c2410_platform_i2c i2c0_pdata = { | |
578 | .frequency = 400000, | |
579 | }; | |
580 | ||
cda2349a MB |
581 | static struct regulator_consumer_supply pvdd_1v2_consumers[] __initdata = { |
582 | REGULATOR_SUPPLY("DCVDD", "spi0.0"), | |
583 | REGULATOR_SUPPLY("AVDD", "spi0.0"), | |
584 | }; | |
585 | ||
ae24c263 MB |
586 | static struct regulator_init_data pvdd_1v2 __initdata = { |
587 | .constraints = { | |
588 | .name = "PVDD_1V2", | |
cda2349a | 589 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, |
ae24c263 | 590 | }, |
cda2349a MB |
591 | |
592 | .consumer_supplies = pvdd_1v2_consumers, | |
593 | .num_consumer_supplies = ARRAY_SIZE(pvdd_1v2_consumers), | |
ae24c263 MB |
594 | }; |
595 | ||
596 | static struct regulator_consumer_supply pvdd_1v8_consumers[] __initdata = { | |
d5160ecf | 597 | REGULATOR_SUPPLY("LDOVDD", "1-001a"), |
ae24c263 MB |
598 | REGULATOR_SUPPLY("PLLVDD", "1-001a"), |
599 | REGULATOR_SUPPLY("DBVDD", "1-001a"), | |
4ed12b50 MB |
600 | REGULATOR_SUPPLY("DBVDD1", "1-001a"), |
601 | REGULATOR_SUPPLY("DBVDD2", "1-001a"), | |
602 | REGULATOR_SUPPLY("DBVDD3", "1-001a"), | |
ae24c263 MB |
603 | REGULATOR_SUPPLY("CPVDD", "1-001a"), |
604 | REGULATOR_SUPPLY("AVDD2", "1-001a"), | |
605 | REGULATOR_SUPPLY("DCVDD", "1-001a"), | |
606 | REGULATOR_SUPPLY("AVDD", "1-001a"), | |
cda2349a | 607 | REGULATOR_SUPPLY("DBVDD", "spi0.0"), |
ae24c263 MB |
608 | }; |
609 | ||
610 | static struct regulator_init_data pvdd_1v8 __initdata = { | |
611 | .constraints = { | |
612 | .name = "PVDD_1V8", | |
613 | .always_on = 1, | |
614 | }, | |
615 | ||
616 | .consumer_supplies = pvdd_1v8_consumers, | |
617 | .num_consumer_supplies = ARRAY_SIZE(pvdd_1v8_consumers), | |
618 | }; | |
619 | ||
620 | static struct regulator_consumer_supply pvdd_3v3_consumers[] __initdata = { | |
621 | REGULATOR_SUPPLY("MICVDD", "1-001a"), | |
622 | REGULATOR_SUPPLY("AVDD1", "1-001a"), | |
623 | }; | |
624 | ||
625 | static struct regulator_init_data pvdd_3v3 __initdata = { | |
626 | .constraints = { | |
627 | .name = "PVDD_3V3", | |
628 | .always_on = 1, | |
629 | }, | |
630 | ||
631 | .consumer_supplies = pvdd_3v3_consumers, | |
632 | .num_consumer_supplies = ARRAY_SIZE(pvdd_3v3_consumers), | |
633 | }; | |
634 | ||
635 | static struct wm831x_pdata glenfarclas_pmic_pdata __initdata = { | |
636 | .wm831x_num = 2, | |
637 | .irq_base = GLENFARCLAS_PMIC_IRQ_BASE, | |
638 | .gpio_base = GLENFARCLAS_PMIC_GPIO_BASE, | |
dcf3580a | 639 | .soft_shutdown = true, |
ae24c263 MB |
640 | |
641 | .gpio_defaults = { | |
642 | /* GPIO1-3: IRQ inputs, rising edge triggered, CMOS */ | |
643 | [0] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA, | |
644 | [1] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA, | |
645 | [2] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA, | |
646 | }, | |
647 | ||
648 | .dcdc = { | |
649 | &pvdd_1v2, /* DCDC1 */ | |
650 | &pvdd_1v8, /* DCDC2 */ | |
651 | &pvdd_3v3, /* DCDC3 */ | |
652 | }, | |
653 | ||
654 | .disable_touch = true, | |
655 | }; | |
656 | ||
8504a3cb MB |
657 | static struct wm1250_ev1_pdata wm1250_ev1_pdata = { |
658 | .gpios = { | |
659 | [WM1250_EV1_GPIO_CLK_ENA] = S3C64XX_GPN(12), | |
660 | [WM1250_EV1_GPIO_CLK_SEL0] = S3C64XX_GPL(12), | |
661 | [WM1250_EV1_GPIO_CLK_SEL1] = S3C64XX_GPL(13), | |
662 | [WM1250_EV1_GPIO_OSR] = S3C64XX_GPL(14), | |
663 | [WM1250_EV1_GPIO_MASTER] = S3C64XX_GPL(8), | |
664 | }, | |
665 | }; | |
666 | ||
e1a3c74f MB |
667 | static struct i2c_board_info i2c_devs1[] __initdata = { |
668 | { I2C_BOARD_INFO("wm8311", 0x34), | |
ae24c263 MB |
669 | .irq = S3C_EINT(0), |
670 | .platform_data = &glenfarclas_pmic_pdata }, | |
671 | ||
d0f0b43f MB |
672 | { I2C_BOARD_INFO("wlf-gf-module", 0x24) }, |
673 | { I2C_BOARD_INFO("wlf-gf-module", 0x25) }, | |
674 | { I2C_BOARD_INFO("wlf-gf-module", 0x26) }, | |
675 | ||
8504a3cb MB |
676 | { I2C_BOARD_INFO("wm1250-ev1", 0x27), |
677 | .platform_data = &wm1250_ev1_pdata }, | |
e1a3c74f MB |
678 | }; |
679 | ||
8351c7aa MB |
680 | static struct s3c2410_platform_i2c i2c1_pdata = { |
681 | .frequency = 400000, | |
682 | .bus_num = 1, | |
e1a3c74f MB |
683 | }; |
684 | ||
685 | static void __init crag6410_map_io(void) | |
686 | { | |
687 | s3c64xx_init_io(NULL, 0); | |
688 | s3c24xx_init_clocks(12000000); | |
689 | s3c24xx_init_uarts(crag6410_uartcfgs, ARRAY_SIZE(crag6410_uartcfgs)); | |
690 | ||
691 | /* LCD type and Bypass set by bootloader */ | |
692 | } | |
693 | ||
694 | static struct s3c_sdhci_platdata crag6410_hsmmc2_pdata = { | |
695 | .max_width = 4, | |
696 | .cd_type = S3C_SDHCI_CD_PERMANENT, | |
a9294cdc | 697 | .host_caps = MMC_CAP_POWER_OFF_CARD, |
e1a3c74f MB |
698 | }; |
699 | ||
e1a3c74f MB |
700 | static void crag6410_cfg_sdhci0(struct platform_device *dev, int width) |
701 | { | |
702 | /* Set all the necessary GPG pins to special-function 2 */ | |
703 | s3c_gpio_cfgrange_nopull(S3C64XX_GPG(0), 2 + width, S3C_GPIO_SFN(2)); | |
704 | ||
705 | /* force card-detected for prototype 0 */ | |
706 | s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_DOWN); | |
707 | } | |
708 | ||
709 | static struct s3c_sdhci_platdata crag6410_hsmmc0_pdata = { | |
710 | .max_width = 4, | |
711 | .cd_type = S3C_SDHCI_CD_INTERNAL, | |
712 | .cfg_gpio = crag6410_cfg_sdhci0, | |
fb7f60f3 | 713 | .host_caps = MMC_CAP_POWER_OFF_CARD, |
e1a3c74f MB |
714 | }; |
715 | ||
66211f98 MB |
716 | static const struct gpio_led gpio_leds[] = { |
717 | { | |
718 | .name = "d13:green:", | |
719 | .gpio = MMGPIO_GPIO_BASE + 0, | |
720 | .default_state = LEDS_GPIO_DEFSTATE_ON, | |
721 | }, | |
722 | { | |
723 | .name = "d14:green:", | |
724 | .gpio = MMGPIO_GPIO_BASE + 1, | |
725 | .default_state = LEDS_GPIO_DEFSTATE_ON, | |
726 | }, | |
727 | { | |
728 | .name = "d15:green:", | |
729 | .gpio = MMGPIO_GPIO_BASE + 2, | |
730 | .default_state = LEDS_GPIO_DEFSTATE_ON, | |
731 | }, | |
732 | { | |
733 | .name = "d16:green:", | |
734 | .gpio = MMGPIO_GPIO_BASE + 3, | |
735 | .default_state = LEDS_GPIO_DEFSTATE_ON, | |
736 | }, | |
737 | { | |
738 | .name = "d17:green:", | |
739 | .gpio = MMGPIO_GPIO_BASE + 4, | |
740 | .default_state = LEDS_GPIO_DEFSTATE_ON, | |
741 | }, | |
742 | { | |
743 | .name = "d18:green:", | |
744 | .gpio = MMGPIO_GPIO_BASE + 5, | |
745 | .default_state = LEDS_GPIO_DEFSTATE_ON, | |
746 | }, | |
747 | { | |
748 | .name = "d19:green:", | |
749 | .gpio = MMGPIO_GPIO_BASE + 6, | |
750 | .default_state = LEDS_GPIO_DEFSTATE_ON, | |
751 | }, | |
752 | { | |
753 | .name = "d20:green:", | |
754 | .gpio = MMGPIO_GPIO_BASE + 7, | |
755 | .default_state = LEDS_GPIO_DEFSTATE_ON, | |
756 | }, | |
757 | }; | |
758 | ||
759 | static const struct gpio_led_platform_data gpio_leds_pdata = { | |
760 | .leds = gpio_leds, | |
761 | .num_leds = ARRAY_SIZE(gpio_leds), | |
e1a3c74f MB |
762 | }; |
763 | ||
99f6e1f5 JS |
764 | static struct s3c_hsotg_plat crag6410_hsotg_pdata; |
765 | ||
e1a3c74f MB |
766 | static void __init crag6410_machine_init(void) |
767 | { | |
768 | /* Open drain IRQs need pullups */ | |
769 | s3c_gpio_setpull(S3C64XX_GPM(0), S3C_GPIO_PULL_UP); | |
770 | s3c_gpio_setpull(S3C64XX_GPN(0), S3C_GPIO_PULL_UP); | |
771 | ||
772 | gpio_request(S3C64XX_GPB(0), "LCD power"); | |
773 | gpio_direction_output(S3C64XX_GPB(0), 0); | |
774 | ||
775 | gpio_request(S3C64XX_GPF(14), "LCD PWM"); | |
776 | gpio_direction_output(S3C64XX_GPF(14), 0); /* turn off */ | |
777 | ||
778 | gpio_request(S3C64XX_GPB(1), "SD power"); | |
779 | gpio_direction_output(S3C64XX_GPB(1), 0); | |
780 | ||
781 | gpio_request(S3C64XX_GPF(10), "nRESETSEL"); | |
782 | gpio_direction_output(S3C64XX_GPF(10), 1); | |
783 | ||
784 | s3c_sdhci0_set_platdata(&crag6410_hsmmc0_pdata); | |
e1a3c74f MB |
785 | s3c_sdhci2_set_platdata(&crag6410_hsmmc2_pdata); |
786 | ||
787 | s3c_i2c0_set_platdata(&i2c0_pdata); | |
8351c7aa | 788 | s3c_i2c1_set_platdata(&i2c1_pdata); |
e1a3c74f | 789 | s3c_fb_set_platdata(&crag6410_lcd_pdata); |
99f6e1f5 | 790 | s3c_hsotg_set_platdata(&crag6410_hsotg_pdata); |
e1a3c74f MB |
791 | |
792 | i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0)); | |
793 | i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1)); | |
794 | ||
795 | samsung_keypad_set_platdata(&crag6410_keypad_data); | |
6f04247b | 796 | s3c64xx_spi0_set_platdata(&s3c64xx_spi0_pdata, 0, 1); |
e1a3c74f MB |
797 | |
798 | platform_add_devices(crag6410_devices, ARRAY_SIZE(crag6410_devices)); | |
799 | ||
66211f98 MB |
800 | gpio_led_register_device(-1, &gpio_leds_pdata); |
801 | ||
ae24c263 MB |
802 | regulator_has_full_constraints(); |
803 | ||
c656c306 | 804 | s3c64xx_pm_init(); |
e1a3c74f MB |
805 | } |
806 | ||
807 | MACHINE_START(WLF_CRAGG_6410, "Wolfson Cragganmore 6410") | |
808 | /* Maintainer: Mark Brown <broonie@opensource.wolfsonmicro.com> */ | |
170a5908 | 809 | .atag_offset = 0x100, |
e1a3c74f | 810 | .init_irq = s3c6410_init_irq, |
774b51f8 | 811 | .handle_irq = vic_handle_irq, |
e1a3c74f MB |
812 | .map_io = crag6410_map_io, |
813 | .init_machine = crag6410_machine_init, | |
814 | .timer = &s3c24xx_timer, | |
ff84ded2 | 815 | .restart = s3c64xx_restart, |
e1a3c74f | 816 | MACHINE_END |