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dd4153d9 KK |
1 | /* |
2 | * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. | |
19a2c065 | 3 | * http://www.samsung.com |
8acd1ade BM |
4 | * |
5 | * Copyright 2009 Samsung Electronics Co. | |
6 | * Byungho Min <bhmin@samsung.com> | |
7 | * | |
dd4153d9 | 8 | * Common Codes for S5PC100 |
8acd1ade BM |
9 | * |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License version 2 as | |
12 | * published by the Free Software Foundation. | |
dd4153d9 | 13 | */ |
8acd1ade BM |
14 | |
15 | #include <linux/kernel.h> | |
16 | #include <linux/types.h> | |
17 | #include <linux/interrupt.h> | |
18 | #include <linux/list.h> | |
19 | #include <linux/timer.h> | |
20 | #include <linux/init.h> | |
21 | #include <linux/clk.h> | |
22 | #include <linux/io.h> | |
4a858cfc | 23 | #include <linux/device.h> |
8acd1ade BM |
24 | #include <linux/serial_core.h> |
25 | #include <linux/platform_device.h> | |
4341f9b3 | 26 | #include <linux/sched.h> |
7b6d864b | 27 | #include <linux/reboot.h> |
8acd1ade | 28 | |
dd4153d9 KK |
29 | #include <asm/irq.h> |
30 | #include <asm/proc-fns.h> | |
9f97da78 | 31 | #include <asm/system_misc.h> |
8acd1ade BM |
32 | #include <asm/mach/arch.h> |
33 | #include <asm/mach/map.h> | |
34 | #include <asm/mach/irq.h> | |
35 | ||
8acd1ade | 36 | #include <mach/map.h> |
dd4153d9 | 37 | #include <mach/hardware.h> |
acc84707 | 38 | #include <mach/regs-clock.h> |
8acd1ade BM |
39 | |
40 | #include <plat/cpu.h> | |
41 | #include <plat/devs.h> | |
42 | #include <plat/clock.h> | |
acc84707 | 43 | #include <plat/sdhci.h> |
327b9030 | 44 | #include <plat/adc-core.h> |
dd4153d9 | 45 | #include <plat/ata-core.h> |
eb42b044 | 46 | #include <plat/fb-core.h> |
dd4153d9 KK |
47 | #include <plat/iic-core.h> |
48 | #include <plat/onenand-core.h> | |
308b3afb | 49 | #include <plat/spi-core.h> |
dd4153d9 | 50 | #include <plat/regs-serial.h> |
5497d2e1 | 51 | #include <plat/watchdog-reset.h> |
dd4153d9 KK |
52 | |
53 | #include "common.h" | |
999304be | 54 | |
dd4153d9 KK |
55 | static const char name_s5pc100[] = "S5PC100"; |
56 | ||
57 | static struct cpu_table cpu_ids[] __initdata = { | |
58 | { | |
59 | .idcode = S5PC100_CPU_ID, | |
60 | .idmask = S5PC100_CPU_MASK, | |
61 | .map_io = s5pc100_map_io, | |
62 | .init_clocks = s5pc100_init_clocks, | |
63 | .init_uarts = s5pc100_init_uarts, | |
64 | .init = s5pc100_init, | |
65 | .name = name_s5pc100, | |
66 | }, | |
67 | }; | |
8acd1ade BM |
68 | |
69 | /* Initial IO mappings */ | |
70 | ||
71 | static struct map_desc s5pc100_iodesc[] __initdata = { | |
acc84707 | 72 | { |
dd4153d9 KK |
73 | .virtual = (unsigned long)S5P_VA_CHIPID, |
74 | .pfn = __phys_to_pfn(S5PC100_PA_CHIPID), | |
75 | .length = SZ_4K, | |
76 | .type = MT_DEVICE, | |
77 | }, { | |
78 | .virtual = (unsigned long)S3C_VA_SYS, | |
79 | .pfn = __phys_to_pfn(S5PC100_PA_SYSCON), | |
80 | .length = SZ_64K, | |
81 | .type = MT_DEVICE, | |
82 | }, { | |
83 | .virtual = (unsigned long)S3C_VA_TIMER, | |
84 | .pfn = __phys_to_pfn(S5PC100_PA_TIMER), | |
85 | .length = SZ_16K, | |
86 | .type = MT_DEVICE, | |
87 | }, { | |
88 | .virtual = (unsigned long)S3C_VA_WATCHDOG, | |
89 | .pfn = __phys_to_pfn(S5PC100_PA_WATCHDOG), | |
90 | .length = SZ_4K, | |
91 | .type = MT_DEVICE, | |
92 | }, { | |
93 | .virtual = (unsigned long)S5P_VA_SROMC, | |
94 | .pfn = __phys_to_pfn(S5PC100_PA_SROMC), | |
95 | .length = SZ_4K, | |
96 | .type = MT_DEVICE, | |
97 | }, { | |
acc84707 MS |
98 | .virtual = (unsigned long)S5P_VA_SYSTIMER, |
99 | .pfn = __phys_to_pfn(S5PC100_PA_SYSTIMER), | |
100 | .length = SZ_16K, | |
101 | .type = MT_DEVICE, | |
19a2c065 KK |
102 | }, { |
103 | .virtual = (unsigned long)S5P_VA_GPIO, | |
104 | .pfn = __phys_to_pfn(S5PC100_PA_GPIO), | |
105 | .length = SZ_4K, | |
106 | .type = MT_DEVICE, | |
107 | }, { | |
108 | .virtual = (unsigned long)VA_VIC0, | |
109 | .pfn = __phys_to_pfn(S5PC100_PA_VIC0), | |
110 | .length = SZ_16K, | |
111 | .type = MT_DEVICE, | |
112 | }, { | |
113 | .virtual = (unsigned long)VA_VIC1, | |
114 | .pfn = __phys_to_pfn(S5PC100_PA_VIC1), | |
115 | .length = SZ_16K, | |
116 | .type = MT_DEVICE, | |
acc84707 MS |
117 | }, { |
118 | .virtual = (unsigned long)VA_VIC2, | |
19a2c065 | 119 | .pfn = __phys_to_pfn(S5PC100_PA_VIC2), |
acc84707 MS |
120 | .length = SZ_16K, |
121 | .type = MT_DEVICE, | |
19a2c065 KK |
122 | }, { |
123 | .virtual = (unsigned long)S3C_VA_UART, | |
124 | .pfn = __phys_to_pfn(S3C_PA_UART), | |
125 | .length = SZ_512K, | |
126 | .type = MT_DEVICE, | |
acc84707 MS |
127 | }, { |
128 | .virtual = (unsigned long)S5PC100_VA_OTHERS, | |
129 | .pfn = __phys_to_pfn(S5PC100_PA_OTHERS), | |
130 | .length = SZ_4K, | |
131 | .type = MT_DEVICE, | |
132 | } | |
8acd1ade BM |
133 | }; |
134 | ||
dd4153d9 KK |
135 | /* |
136 | * s5pc100_map_io | |
8acd1ade | 137 | * |
dd4153d9 KK |
138 | * register the standard CPU IO areas |
139 | */ | |
8acd1ade | 140 | |
dd4153d9 | 141 | void __init s5pc100_init_io(struct map_desc *mach_desc, int size) |
8acd1ade | 142 | { |
dd4153d9 | 143 | /* initialize the io descriptors we need for initialization */ |
8acd1ade | 144 | iotable_init(s5pc100_iodesc, ARRAY_SIZE(s5pc100_iodesc)); |
dd4153d9 KK |
145 | if (mach_desc) |
146 | iotable_init(mach_desc, size); | |
147 | ||
148 | /* detect cpu id and rev. */ | |
149 | s5p_init_cpu(S5P_VA_CHIPID); | |
150 | ||
151 | s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids)); | |
152 | } | |
8acd1ade | 153 | |
dd4153d9 KK |
154 | void __init s5pc100_map_io(void) |
155 | { | |
8acd1ade | 156 | /* initialise device information early */ |
86cd4f5f KP |
157 | s5pc100_default_sdhci0(); |
158 | s5pc100_default_sdhci1(); | |
159 | s5pc100_default_sdhci2(); | |
5eda288f | 160 | |
327b9030 NKC |
161 | s3c_adc_setname("s3c64xx-adc"); |
162 | ||
5eda288f KP |
163 | /* the i2c devices are directly compatible with s3c2440 */ |
164 | s3c_i2c0_setname("s3c2440-i2c"); | |
165 | s3c_i2c1_setname("s3c2440-i2c"); | |
999304be MS |
166 | |
167 | s3c_onenand_setname("s5pc100-onenand"); | |
eb42b044 | 168 | s3c_fb_setname("s5pc100-fb"); |
66194a74 | 169 | s3c_cfcon_setname("s5pc100-pata"); |
308b3afb HS |
170 | |
171 | s3c64xx_spi_setname("s5pc100-spi"); | |
8acd1ade BM |
172 | } |
173 | ||
174 | void __init s5pc100_init_clocks(int xtal) | |
175 | { | |
acc84707 MS |
176 | printk(KERN_DEBUG "%s: initializing clocks\n", __func__); |
177 | ||
8acd1ade | 178 | s3c24xx_register_baseclocks(xtal); |
acc84707 | 179 | s5p_register_clocks(xtal); |
8acd1ade BM |
180 | s5pc100_register_clocks(); |
181 | s5pc100_setup_clocks(); | |
88f59738 | 182 | samsung_wdt_reset_init(S3C_VA_WATCHDOG); |
8acd1ade BM |
183 | } |
184 | ||
185 | void __init s5pc100_init_irq(void) | |
186 | { | |
acc84707 | 187 | u32 vic[] = {~0, ~0, ~0}; |
8acd1ade BM |
188 | |
189 | /* VIC0, VIC1, and VIC2 are fully populated. */ | |
acc84707 | 190 | s5p_init_irq(vic, ARRAY_SIZE(vic)); |
8acd1ade BM |
191 | } |
192 | ||
4a858cfc KS |
193 | static struct bus_type s5pc100_subsys = { |
194 | .name = "s5pc100-core", | |
195 | .dev_name = "s5pc100-core", | |
8acd1ade BM |
196 | }; |
197 | ||
4a858cfc KS |
198 | static struct device s5pc100_dev = { |
199 | .bus = &s5pc100_subsys, | |
8acd1ade BM |
200 | }; |
201 | ||
202 | static int __init s5pc100_core_init(void) | |
203 | { | |
4a858cfc | 204 | return subsys_system_register(&s5pc100_subsys, NULL); |
8acd1ade | 205 | } |
8acd1ade BM |
206 | core_initcall(s5pc100_core_init); |
207 | ||
208 | int __init s5pc100_init(void) | |
209 | { | |
acc84707 | 210 | printk(KERN_INFO "S5PC100: Initializing architecture\n"); |
ea04018e | 211 | return device_register(&s5pc100_dev); |
8acd1ade | 212 | } |
dd4153d9 KK |
213 | |
214 | /* uart registration process */ | |
215 | ||
216 | void __init s5pc100_init_uarts(struct s3c2410_uartcfg *cfg, int no) | |
217 | { | |
218 | s3c24xx_init_uartdevs("s3c6400-uart", s5p_uart_resources, cfg, no); | |
219 | } | |
5497d2e1 | 220 | |
7b6d864b | 221 | void s5pc100_restart(enum reboot_mode mode, const char *cmd) |
5497d2e1 | 222 | { |
7b6d864b | 223 | if (mode != REBOOT_SOFT) |
88f59738 | 224 | samsung_wdt_reset(); |
5497d2e1 KK |
225 | |
226 | soft_restart(0); | |
227 | } |