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d947e792 MS |
1 | /* linux/arch/arm/mach-s5pv210/mach-aquila.c |
2 | * | |
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | |
4 | * http://www.samsung.com/ | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 as | |
8 | * published by the Free Software Foundation. | |
9 | */ | |
10 | ||
11 | #include <linux/kernel.h> | |
12 | #include <linux/types.h> | |
13 | #include <linux/init.h> | |
14 | #include <linux/serial_core.h> | |
b315032f | 15 | #include <linux/fb.h> |
a1660c12 MS |
16 | #include <linux/i2c.h> |
17 | #include <linux/i2c-gpio.h> | |
18 | #include <linux/mfd/max8998.h> | |
19 | #include <linux/gpio_keys.h> | |
20 | #include <linux/input.h> | |
21 | #include <linux/gpio.h> | |
d947e792 MS |
22 | |
23 | #include <asm/mach/arch.h> | |
24 | #include <asm/mach/map.h> | |
25 | #include <asm/setup.h> | |
26 | #include <asm/mach-types.h> | |
27 | ||
28 | #include <mach/map.h> | |
29 | #include <mach/regs-clock.h> | |
b315032f | 30 | #include <mach/regs-fb.h> |
d947e792 | 31 | |
a1660c12 | 32 | #include <plat/gpio-cfg.h> |
d947e792 MS |
33 | #include <plat/regs-serial.h> |
34 | #include <plat/s5pv210.h> | |
35 | #include <plat/devs.h> | |
36 | #include <plat/cpu.h> | |
b315032f | 37 | #include <plat/fb.h> |
187749bb | 38 | #include <plat/fimc-core.h> |
ba3fbef9 | 39 | #include <plat/sdhci.h> |
d947e792 MS |
40 | |
41 | /* Following are default values for UCON, ULCON and UFCON UART registers */ | |
c8def085 | 42 | #define AQUILA_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ |
d947e792 MS |
43 | S3C2410_UCON_RXILEVEL | \ |
44 | S3C2410_UCON_TXIRQMODE | \ | |
45 | S3C2410_UCON_RXIRQMODE | \ | |
46 | S3C2410_UCON_RXFIFO_TOI | \ | |
47 | S3C2443_UCON_RXERR_IRQEN) | |
48 | ||
c8def085 | 49 | #define AQUILA_ULCON_DEFAULT S3C2410_LCON_CS8 |
d947e792 | 50 | |
f2b7e3c5 | 51 | #define AQUILA_UFCON_DEFAULT S3C2410_UFCON_FIFOMODE |
d947e792 | 52 | |
df01714a | 53 | static struct s3c2410_uartcfg aquila_uartcfgs[] __initdata = { |
d947e792 MS |
54 | [0] = { |
55 | .hwport = 0, | |
56 | .flags = 0, | |
c8def085 KK |
57 | .ucon = AQUILA_UCON_DEFAULT, |
58 | .ulcon = AQUILA_ULCON_DEFAULT, | |
df01714a JS |
59 | /* |
60 | * Actually UART0 can support 256 bytes fifo, but aquila board | |
61 | * supports 128 bytes fifo because of initial chip bug | |
62 | */ | |
f2b7e3c5 | 63 | .ufcon = AQUILA_UFCON_DEFAULT | |
df01714a | 64 | S5PV210_UFCON_TXTRIG128 | S5PV210_UFCON_RXTRIG128, |
d947e792 MS |
65 | }, |
66 | [1] = { | |
67 | .hwport = 1, | |
68 | .flags = 0, | |
c8def085 KK |
69 | .ucon = AQUILA_UCON_DEFAULT, |
70 | .ulcon = AQUILA_ULCON_DEFAULT, | |
f2b7e3c5 | 71 | .ufcon = AQUILA_UFCON_DEFAULT | |
df01714a | 72 | S5PV210_UFCON_TXTRIG64 | S5PV210_UFCON_RXTRIG64, |
d947e792 MS |
73 | }, |
74 | [2] = { | |
75 | .hwport = 2, | |
76 | .flags = 0, | |
c8def085 KK |
77 | .ucon = AQUILA_UCON_DEFAULT, |
78 | .ulcon = AQUILA_ULCON_DEFAULT, | |
f2b7e3c5 | 79 | .ufcon = AQUILA_UFCON_DEFAULT | |
df01714a | 80 | S5PV210_UFCON_TXTRIG16 | S5PV210_UFCON_RXTRIG16, |
d947e792 MS |
81 | }, |
82 | [3] = { | |
83 | .hwport = 3, | |
84 | .flags = 0, | |
c8def085 KK |
85 | .ucon = AQUILA_UCON_DEFAULT, |
86 | .ulcon = AQUILA_ULCON_DEFAULT, | |
f2b7e3c5 | 87 | .ufcon = AQUILA_UFCON_DEFAULT | |
df01714a | 88 | S5PV210_UFCON_TXTRIG16 | S5PV210_UFCON_RXTRIG16, |
d947e792 MS |
89 | }, |
90 | }; | |
91 | ||
b315032f MS |
92 | /* Frame Buffer */ |
93 | static struct s3c_fb_pd_win aquila_fb_win0 = { | |
94 | .win_mode = { | |
b315032f MS |
95 | .left_margin = 16, |
96 | .right_margin = 16, | |
97 | .upper_margin = 3, | |
98 | .lower_margin = 28, | |
99 | .hsync_len = 2, | |
100 | .vsync_len = 2, | |
101 | .xres = 480, | |
102 | .yres = 800, | |
103 | }, | |
104 | .max_bpp = 32, | |
105 | .default_bpp = 16, | |
106 | }; | |
107 | ||
108 | static struct s3c_fb_pd_win aquila_fb_win1 = { | |
109 | .win_mode = { | |
b315032f MS |
110 | .left_margin = 16, |
111 | .right_margin = 16, | |
112 | .upper_margin = 3, | |
113 | .lower_margin = 28, | |
114 | .hsync_len = 2, | |
115 | .vsync_len = 2, | |
116 | .xres = 480, | |
117 | .yres = 800, | |
118 | }, | |
119 | .max_bpp = 32, | |
120 | .default_bpp = 16, | |
121 | }; | |
122 | ||
123 | static struct s3c_fb_platdata aquila_lcd_pdata __initdata = { | |
124 | .win[0] = &aquila_fb_win0, | |
125 | .win[1] = &aquila_fb_win1, | |
126 | .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB, | |
127 | .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC | | |
128 | VIDCON1_INV_VCLK | VIDCON1_INV_VDEN, | |
129 | .setup_gpio = s5pv210_fb_gpio_setup_24bpp, | |
130 | }; | |
131 | ||
a1660c12 MS |
132 | /* MAX8998 regulators */ |
133 | #if defined(CONFIG_REGULATOR_MAX8998) || defined(CONFIG_REGULATOR_MAX8998_MODULE) | |
134 | ||
135 | static struct regulator_init_data aquila_ldo2_data = { | |
136 | .constraints = { | |
137 | .name = "VALIVE_1.1V", | |
138 | .min_uV = 1100000, | |
139 | .max_uV = 1100000, | |
140 | .apply_uV = 1, | |
141 | .always_on = 1, | |
142 | .state_mem = { | |
143 | .enabled = 1, | |
144 | }, | |
145 | }, | |
146 | }; | |
147 | ||
148 | static struct regulator_init_data aquila_ldo3_data = { | |
149 | .constraints = { | |
150 | .name = "VUSB/MIPI_1.1V", | |
151 | .min_uV = 1100000, | |
152 | .max_uV = 1100000, | |
153 | .apply_uV = 1, | |
154 | .always_on = 1, | |
155 | }, | |
156 | }; | |
157 | ||
158 | static struct regulator_init_data aquila_ldo4_data = { | |
159 | .constraints = { | |
160 | .name = "VDAC_3.3V", | |
161 | .min_uV = 3300000, | |
162 | .max_uV = 3300000, | |
163 | .apply_uV = 1, | |
164 | }, | |
165 | }; | |
166 | ||
167 | static struct regulator_init_data aquila_ldo5_data = { | |
168 | .constraints = { | |
169 | .name = "VTF_2.8V", | |
170 | .min_uV = 2800000, | |
171 | .max_uV = 2800000, | |
172 | .apply_uV = 1, | |
173 | }, | |
174 | }; | |
175 | ||
176 | static struct regulator_init_data aquila_ldo6_data = { | |
177 | .constraints = { | |
178 | .name = "VCC_3.3V", | |
179 | .min_uV = 3300000, | |
180 | .max_uV = 3300000, | |
181 | .apply_uV = 1, | |
182 | }, | |
183 | }; | |
184 | ||
185 | static struct regulator_init_data aquila_ldo7_data = { | |
186 | .constraints = { | |
187 | .name = "VCC_3.0V", | |
188 | .min_uV = 3000000, | |
189 | .max_uV = 3000000, | |
190 | .apply_uV = 1, | |
191 | .boot_on = 1, | |
192 | .always_on = 1, | |
193 | }, | |
194 | }; | |
195 | ||
196 | static struct regulator_init_data aquila_ldo8_data = { | |
197 | .constraints = { | |
198 | .name = "VUSB/VADC_3.3V", | |
199 | .min_uV = 3300000, | |
200 | .max_uV = 3300000, | |
201 | .apply_uV = 1, | |
202 | .always_on = 1, | |
203 | }, | |
204 | }; | |
205 | ||
206 | static struct regulator_init_data aquila_ldo9_data = { | |
207 | .constraints = { | |
208 | .name = "VCC/VCAM_2.8V", | |
209 | .min_uV = 2800000, | |
210 | .max_uV = 2800000, | |
211 | .apply_uV = 1, | |
212 | .always_on = 1, | |
213 | }, | |
214 | }; | |
215 | ||
216 | static struct regulator_init_data aquila_ldo10_data = { | |
217 | .constraints = { | |
218 | .name = "VPLL_1.1V", | |
219 | .min_uV = 1100000, | |
220 | .max_uV = 1100000, | |
221 | .apply_uV = 1, | |
222 | .boot_on = 1, | |
223 | }, | |
224 | }; | |
225 | ||
226 | static struct regulator_init_data aquila_ldo11_data = { | |
227 | .constraints = { | |
228 | .name = "CAM_IO_2.8V", | |
229 | .min_uV = 2800000, | |
230 | .max_uV = 2800000, | |
231 | .apply_uV = 1, | |
232 | .always_on = 1, | |
233 | }, | |
234 | }; | |
235 | ||
236 | static struct regulator_init_data aquila_ldo12_data = { | |
237 | .constraints = { | |
238 | .name = "CAM_ISP_1.2V", | |
239 | .min_uV = 1200000, | |
240 | .max_uV = 1200000, | |
241 | .apply_uV = 1, | |
242 | .always_on = 1, | |
243 | }, | |
244 | }; | |
245 | ||
246 | static struct regulator_init_data aquila_ldo13_data = { | |
247 | .constraints = { | |
248 | .name = "CAM_A_2.8V", | |
249 | .min_uV = 2800000, | |
250 | .max_uV = 2800000, | |
251 | .apply_uV = 1, | |
252 | .always_on = 1, | |
253 | }, | |
254 | }; | |
255 | ||
256 | static struct regulator_init_data aquila_ldo14_data = { | |
257 | .constraints = { | |
258 | .name = "CAM_CIF_1.8V", | |
259 | .min_uV = 1800000, | |
260 | .max_uV = 1800000, | |
261 | .apply_uV = 1, | |
262 | .always_on = 1, | |
263 | }, | |
264 | }; | |
265 | ||
266 | static struct regulator_init_data aquila_ldo15_data = { | |
267 | .constraints = { | |
268 | .name = "CAM_AF_3.3V", | |
269 | .min_uV = 3300000, | |
270 | .max_uV = 3300000, | |
271 | .apply_uV = 1, | |
272 | .always_on = 1, | |
273 | }, | |
274 | }; | |
275 | ||
276 | static struct regulator_init_data aquila_ldo16_data = { | |
277 | .constraints = { | |
278 | .name = "VMIPI_1.8V", | |
279 | .min_uV = 1800000, | |
280 | .max_uV = 1800000, | |
281 | .apply_uV = 1, | |
282 | .always_on = 1, | |
283 | }, | |
284 | }; | |
285 | ||
286 | static struct regulator_init_data aquila_ldo17_data = { | |
287 | .constraints = { | |
288 | .name = "CAM_8M_1.8V", | |
289 | .min_uV = 1800000, | |
290 | .max_uV = 1800000, | |
291 | .apply_uV = 1, | |
292 | .always_on = 1, | |
293 | }, | |
294 | }; | |
295 | ||
296 | /* BUCK */ | |
297 | static struct regulator_consumer_supply buck1_consumer[] = { | |
298 | { .supply = "vddarm", }, | |
299 | }; | |
300 | ||
301 | static struct regulator_consumer_supply buck2_consumer[] = { | |
302 | { .supply = "vddint", }, | |
303 | }; | |
304 | ||
305 | static struct regulator_init_data aquila_buck1_data = { | |
306 | .constraints = { | |
307 | .name = "VARM_1.2V", | |
308 | .min_uV = 1200000, | |
309 | .max_uV = 1200000, | |
310 | .apply_uV = 1, | |
311 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | | |
312 | REGULATOR_CHANGE_STATUS, | |
313 | }, | |
314 | .num_consumer_supplies = ARRAY_SIZE(buck1_consumer), | |
315 | .consumer_supplies = buck1_consumer, | |
316 | }; | |
317 | ||
318 | static struct regulator_init_data aquila_buck2_data = { | |
319 | .constraints = { | |
320 | .name = "VINT_1.2V", | |
321 | .min_uV = 1200000, | |
322 | .max_uV = 1200000, | |
323 | .apply_uV = 1, | |
324 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | | |
325 | REGULATOR_CHANGE_STATUS, | |
326 | }, | |
327 | .num_consumer_supplies = ARRAY_SIZE(buck2_consumer), | |
328 | .consumer_supplies = buck2_consumer, | |
329 | }; | |
330 | ||
331 | static struct regulator_init_data aquila_buck3_data = { | |
332 | .constraints = { | |
333 | .name = "VCC_1.8V", | |
334 | .min_uV = 1800000, | |
335 | .max_uV = 1800000, | |
336 | .apply_uV = 1, | |
337 | .state_mem = { | |
338 | .enabled = 1, | |
339 | }, | |
340 | }, | |
341 | }; | |
342 | ||
343 | static struct regulator_init_data aquila_buck4_data = { | |
344 | .constraints = { | |
345 | .name = "CAM_CORE_1.2V", | |
346 | .min_uV = 1200000, | |
347 | .max_uV = 1200000, | |
348 | .apply_uV = 1, | |
349 | .always_on = 1, | |
350 | }, | |
351 | }; | |
352 | ||
353 | static struct max8998_regulator_data aquila_regulators[] = { | |
354 | { MAX8998_LDO2, &aquila_ldo2_data }, | |
355 | { MAX8998_LDO3, &aquila_ldo3_data }, | |
356 | { MAX8998_LDO4, &aquila_ldo4_data }, | |
357 | { MAX8998_LDO5, &aquila_ldo5_data }, | |
358 | { MAX8998_LDO6, &aquila_ldo6_data }, | |
359 | { MAX8998_LDO7, &aquila_ldo7_data }, | |
360 | { MAX8998_LDO8, &aquila_ldo8_data }, | |
361 | { MAX8998_LDO9, &aquila_ldo9_data }, | |
362 | { MAX8998_LDO10, &aquila_ldo10_data }, | |
363 | { MAX8998_LDO11, &aquila_ldo11_data }, | |
364 | { MAX8998_LDO12, &aquila_ldo12_data }, | |
365 | { MAX8998_LDO13, &aquila_ldo13_data }, | |
366 | { MAX8998_LDO14, &aquila_ldo14_data }, | |
367 | { MAX8998_LDO15, &aquila_ldo15_data }, | |
368 | { MAX8998_LDO16, &aquila_ldo16_data }, | |
369 | { MAX8998_LDO17, &aquila_ldo17_data }, | |
370 | { MAX8998_BUCK1, &aquila_buck1_data }, | |
371 | { MAX8998_BUCK2, &aquila_buck2_data }, | |
372 | { MAX8998_BUCK3, &aquila_buck3_data }, | |
373 | { MAX8998_BUCK4, &aquila_buck4_data }, | |
374 | }; | |
375 | ||
376 | static struct max8998_platform_data aquila_max8998_pdata = { | |
377 | .num_regulators = ARRAY_SIZE(aquila_regulators), | |
378 | .regulators = aquila_regulators, | |
379 | }; | |
380 | #endif | |
381 | ||
382 | /* GPIO I2C PMIC */ | |
383 | #define AP_I2C_GPIO_PMIC_BUS_4 4 | |
384 | static struct i2c_gpio_platform_data aquila_i2c_gpio_pmic_data = { | |
385 | .sda_pin = S5PV210_GPJ4(0), /* XMSMCSN */ | |
386 | .scl_pin = S5PV210_GPJ4(3), /* XMSMIRQN */ | |
387 | }; | |
388 | ||
389 | static struct platform_device aquila_i2c_gpio_pmic = { | |
390 | .name = "i2c-gpio", | |
391 | .id = AP_I2C_GPIO_PMIC_BUS_4, | |
392 | .dev = { | |
393 | .platform_data = &aquila_i2c_gpio_pmic_data, | |
394 | }, | |
395 | }; | |
396 | ||
397 | static struct i2c_board_info i2c_gpio_pmic_devs[] __initdata = { | |
398 | #if defined(CONFIG_REGULATOR_MAX8998) || defined(CONFIG_REGULATOR_MAX8998_MODULE) | |
399 | { | |
400 | /* 0xCC when SRAD = 0 */ | |
401 | I2C_BOARD_INFO("max8998", 0xCC >> 1), | |
402 | .platform_data = &aquila_max8998_pdata, | |
403 | }, | |
404 | #endif | |
405 | }; | |
406 | ||
5112267e CC |
407 | /* GPIO I2C AP 1.8V */ |
408 | #define AP_I2C_GPIO_BUS_5 5 | |
409 | static struct i2c_gpio_platform_data aquila_i2c_gpio5_data = { | |
410 | .sda_pin = S5PV210_MP05(3), /* XM0ADDR_11 */ | |
411 | .scl_pin = S5PV210_MP05(2), /* XM0ADDR_10 */ | |
412 | }; | |
413 | ||
414 | static struct platform_device aquila_i2c_gpio5 = { | |
415 | .name = "i2c-gpio", | |
416 | .id = AP_I2C_GPIO_BUS_5, | |
417 | .dev = { | |
418 | .platform_data = &aquila_i2c_gpio5_data, | |
419 | }, | |
420 | }; | |
421 | ||
422 | static struct i2c_board_info i2c_gpio5_devs[] __initdata = { | |
423 | { | |
424 | /* CS/ADDR = low 0x34 (FYI: high = 0x36) */ | |
425 | I2C_BOARD_INFO("wm8994", 0x1a), | |
426 | }, | |
427 | }; | |
428 | ||
a1660c12 MS |
429 | /* PMIC Power button */ |
430 | static struct gpio_keys_button aquila_gpio_keys_table[] = { | |
431 | { | |
432 | .code = KEY_POWER, | |
433 | .gpio = S5PV210_GPH2(6), | |
434 | .desc = "gpio-keys: KEY_POWER", | |
435 | .type = EV_KEY, | |
436 | .active_low = 1, | |
437 | .wakeup = 1, | |
438 | .debounce_interval = 1, | |
439 | }, | |
440 | }; | |
441 | ||
442 | static struct gpio_keys_platform_data aquila_gpio_keys_data = { | |
443 | .buttons = aquila_gpio_keys_table, | |
444 | .nbuttons = ARRAY_SIZE(aquila_gpio_keys_table), | |
445 | }; | |
446 | ||
447 | static struct platform_device aquila_device_gpiokeys = { | |
448 | .name = "gpio-keys", | |
449 | .dev = { | |
450 | .platform_data = &aquila_gpio_keys_data, | |
451 | }, | |
452 | }; | |
453 | ||
454 | static void __init aquila_pmic_init(void) | |
455 | { | |
456 | /* AP_PMIC_IRQ: EINT7 */ | |
457 | s3c_gpio_cfgpin(S5PV210_GPH0(7), S3C_GPIO_SFN(0xf)); | |
458 | s3c_gpio_setpull(S5PV210_GPH0(7), S3C_GPIO_PULL_UP); | |
459 | ||
460 | /* nPower: EINT22 */ | |
461 | s3c_gpio_cfgpin(S5PV210_GPH2(6), S3C_GPIO_SFN(0xf)); | |
462 | s3c_gpio_setpull(S5PV210_GPH2(6), S3C_GPIO_PULL_UP); | |
463 | } | |
464 | ||
ba3fbef9 MS |
465 | /* MoviNAND */ |
466 | static struct s3c_sdhci_platdata aquila_hsmmc0_data __initdata = { | |
467 | .max_width = 4, | |
468 | .cd_type = S3C_SDHCI_CD_PERMANENT, | |
469 | }; | |
470 | ||
471 | /* Wireless LAN */ | |
472 | static struct s3c_sdhci_platdata aquila_hsmmc1_data __initdata = { | |
473 | .max_width = 4, | |
474 | .cd_type = S3C_SDHCI_CD_EXTERNAL, | |
475 | /* ext_cd_{init,cleanup} callbacks will be added later */ | |
476 | }; | |
477 | ||
478 | /* External Flash */ | |
479 | #define AQUILA_EXT_FLASH_EN S5PV210_MP05(4) | |
480 | #define AQUILA_EXT_FLASH_CD S5PV210_GPH3(4) | |
481 | static struct s3c_sdhci_platdata aquila_hsmmc2_data __initdata = { | |
482 | .max_width = 4, | |
483 | .cd_type = S3C_SDHCI_CD_GPIO, | |
484 | .ext_cd_gpio = AQUILA_EXT_FLASH_CD, | |
485 | .ext_cd_gpio_invert = 1, | |
486 | }; | |
487 | ||
488 | static void aquila_setup_sdhci(void) | |
489 | { | |
490 | gpio_request(AQUILA_EXT_FLASH_EN, "FLASH_EN"); | |
491 | gpio_direction_output(AQUILA_EXT_FLASH_EN, 1); | |
492 | ||
493 | s3c_sdhci0_set_platdata(&aquila_hsmmc0_data); | |
494 | s3c_sdhci1_set_platdata(&aquila_hsmmc1_data); | |
495 | s3c_sdhci2_set_platdata(&aquila_hsmmc2_data); | |
496 | }; | |
497 | ||
d947e792 | 498 | static struct platform_device *aquila_devices[] __initdata = { |
a1660c12 | 499 | &aquila_i2c_gpio_pmic, |
5112267e | 500 | &aquila_i2c_gpio5, |
a1660c12 | 501 | &aquila_device_gpiokeys, |
b315032f | 502 | &s3c_device_fb, |
13904fba | 503 | &s5p_device_onenand, |
ba3fbef9 MS |
504 | &s3c_device_hsmmc0, |
505 | &s3c_device_hsmmc1, | |
506 | &s3c_device_hsmmc2, | |
7200c11d SN |
507 | &s5p_device_fimc0, |
508 | &s5p_device_fimc1, | |
509 | &s5p_device_fimc2, | |
d947e792 MS |
510 | }; |
511 | ||
512 | static void __init aquila_map_io(void) | |
513 | { | |
514 | s5p_init_io(NULL, 0, S5P_VA_CHIPID); | |
515 | s3c24xx_init_clocks(24000000); | |
df01714a | 516 | s3c24xx_init_uarts(aquila_uartcfgs, ARRAY_SIZE(aquila_uartcfgs)); |
d947e792 MS |
517 | } |
518 | ||
519 | static void __init aquila_machine_init(void) | |
520 | { | |
a1660c12 MS |
521 | /* PMIC */ |
522 | aquila_pmic_init(); | |
523 | i2c_register_board_info(AP_I2C_GPIO_PMIC_BUS_4, i2c_gpio_pmic_devs, | |
524 | ARRAY_SIZE(i2c_gpio_pmic_devs)); | |
ba3fbef9 MS |
525 | /* SDHCI */ |
526 | aquila_setup_sdhci(); | |
a1660c12 | 527 | |
187749bb SN |
528 | s3c_fimc_setname(0, "s5p-fimc"); |
529 | s3c_fimc_setname(1, "s5p-fimc"); | |
530 | s3c_fimc_setname(2, "s5p-fimc"); | |
531 | ||
5112267e CC |
532 | /* SOUND */ |
533 | i2c_register_board_info(AP_I2C_GPIO_BUS_5, i2c_gpio5_devs, | |
534 | ARRAY_SIZE(i2c_gpio5_devs)); | |
535 | ||
b315032f MS |
536 | /* FB */ |
537 | s3c_fb_set_platdata(&aquila_lcd_pdata); | |
538 | ||
d947e792 MS |
539 | platform_add_devices(aquila_devices, ARRAY_SIZE(aquila_devices)); |
540 | } | |
541 | ||
542 | MACHINE_START(AQUILA, "Aquila") | |
543 | /* Maintainers: | |
544 | Marek Szyprowski <m.szyprowski@samsung.com> | |
545 | Kyungmin Park <kyungmin.park@samsung.com> */ | |
546 | .phys_io = S3C_PA_UART & 0xfff00000, | |
547 | .io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc, | |
548 | .boot_params = S5P_PA_SDRAM + 0x100, | |
549 | .init_irq = s5pv210_init_irq, | |
550 | .map_io = aquila_map_io, | |
551 | .init_machine = aquila_machine_init, | |
552 | .timer = &s3c24xx_timer, | |
553 | MACHINE_END |