[deliverable/linux.git] / arch / arm / mach-sa1100 / assabet.c

/*
 * linux/arch/arm/mach-sa1100/assabet.c
 *
 * Author: Nicolas Pitre
 *
 * This file contains all Assabet-specific tweaks.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/errno.h>
#include <linux/ioport.h>
#include <linux/platform_data/sa11x0-serial.h>
#include <linux/serial_core.h>
#include <linux/platform_device.h>
#include <linux/mfd/ucb1x00.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/delay.h>
#include <linux/mm.h>
#include <linux/leds.h>
#include <linux/slab.h>

#include <video/sa1100fb.h>

#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/setup.h>
#include <asm/page.h>
#include <asm/pgtable-hwdef.h>
#include <asm/pgtable.h>
#include <asm/tlbflush.h>

#include <asm/mach/arch.h>
#include <asm/mach/flash.h>
#include <linux/platform_data/irda-sa11x0.h>
#include <asm/mach/map.h>
#include <mach/assabet.h>
#include <linux/platform_data/mfd-mcp-sa11x0.h>
#include <mach/irqs.h>

#include "generic.h"

#define ASSABET_BCR_DB1110 \
	(ASSABET_BCR_SPK_OFF    | \
	 ASSABET_BCR_LED_GREEN  | ASSABET_BCR_LED_RED   | \
	 ASSABET_BCR_RS232EN    | ASSABET_BCR_LCD_12RGB | \
	 ASSABET_BCR_IRDA_MD0)

#define ASSABET_BCR_DB1111 \
	(ASSABET_BCR_SPK_OFF    | \
	 ASSABET_BCR_LED_GREEN  | ASSABET_BCR_LED_RED   | \
	 ASSABET_BCR_RS232EN    | ASSABET_BCR_LCD_12RGB | \
	 ASSABET_BCR_CF_BUS_OFF | ASSABET_BCR_STEREO_LB | \
	 ASSABET_BCR_IRDA_MD0   | ASSABET_BCR_CF_RST)

unsigned long SCR_value = ASSABET_SCR_INIT;
EXPORT_SYMBOL(SCR_value);

static unsigned long BCR_value = ASSABET_BCR_DB1110;

void ASSABET_BCR_frob(unsigned int mask, unsigned int val)
{
	unsigned long flags;

	local_irq_save(flags);
	BCR_value = (BCR_value & ~mask) | val;
	ASSABET_BCR = BCR_value;
	local_irq_restore(flags);
}

EXPORT_SYMBOL(ASSABET_BCR_frob);

/*
 * The codec reset goes to three devices, so we need to release
 * the rest when any one of these requests it.  However, that
 * causes the ADV7171 to consume around 100mA - more than half
 * the LCD-blanked power.
 *
 * With the ADV7171, LCD and backlight enabled, we go over
 * budget on the MAX846 Li-Ion charger, and if no Li-Ion battery
 * is connected, the Assabet crashes.
 */
#define RST_UCB1X00 (1 << 0)
#define RST_UDA1341 (1 << 1)
#define RST_ADV7171 (1 << 2)

#define SDA GPIO_GPIO(15)
#define SCK GPIO_GPIO(18)
#define MOD GPIO_GPIO(17)

static void adv7171_start(void)
{
	GPSR = SCK;
	udelay(1);
	GPSR = SDA;
	udelay(2);
	GPCR = SDA;
}

static void adv7171_stop(void)
{
	GPSR = SCK;
	udelay(2);
	GPSR = SDA;
	udelay(1);
}

static void adv7171_send(unsigned byte)
{
	unsigned i;

	for (i = 0; i < 8; i++, byte <<= 1) {
		GPCR = SCK;
		udelay(1);
		if (byte & 0x80)
			GPSR = SDA;
		else
			GPCR = SDA;
		udelay(1);
		GPSR = SCK;
		udelay(1);
	}
	GPCR = SCK;
	udelay(1);
	GPSR = SDA;
	udelay(1);
	GPDR &= ~SDA;
	GPSR = SCK;
	udelay(1);
	if (GPLR & SDA)
		printk(KERN_WARNING "No ACK from ADV7171\n");
	udelay(1);
	GPCR = SCK | SDA;
	udelay(1);
	GPDR |= SDA;
	udelay(1);
}

static void adv7171_write(unsigned reg, unsigned val)
{
	unsigned gpdr = GPDR;
	unsigned gplr = GPLR;

	ASSABET_BCR = BCR_value | ASSABET_BCR_AUDIO_ON;
	udelay(100);

	GPCR = SDA | SCK | MOD; /* clear L3 mode to ensure UDA1341 doesn't respond */
	GPDR = (GPDR | SCK | MOD) & ~SDA;
	udelay(10);
	if (!(GPLR & SDA))
		printk(KERN_WARNING "Something dragging SDA down?\n");
	GPDR |= SDA;

	adv7171_start();
	adv7171_send(0x54);
	adv7171_send(reg);
	adv7171_send(val);
	adv7171_stop();

	/* Restore GPIO state for L3 bus */
	GPSR = gplr & (SDA | SCK | MOD);
	GPCR = (~gplr) & (SDA | SCK | MOD);
	GPDR = gpdr;
}

static void adv7171_sleep(void)
{
	/* Put the ADV7171 into sleep mode */
	adv7171_write(0x04, 0x40);
}

static unsigned codec_nreset;

static void assabet_codec_reset(unsigned mask, int set)
{
	unsigned long flags;
	bool old;

	local_irq_save(flags);
	old = !codec_nreset;
	if (set)
		codec_nreset &= ~mask;
	else
		codec_nreset |= mask;

	if (old != !codec_nreset) {
		if (codec_nreset) {
			ASSABET_BCR_set(ASSABET_BCR_NCODEC_RST);
			adv7171_sleep();
		} else {
			ASSABET_BCR_clear(ASSABET_BCR_NCODEC_RST);
		}
	}
	local_irq_restore(flags);
}

static void assabet_ucb1x00_reset(enum ucb1x00_reset state)
{
	int set = state == UCB_RST_REMOVE || state == UCB_RST_SUSPEND ||
		state == UCB_RST_PROBE_FAIL;
	assabet_codec_reset(RST_UCB1X00, set);
}

void assabet_uda1341_reset(int set)
{
	assabet_codec_reset(RST_UDA1341, set);
}
EXPORT_SYMBOL(assabet_uda1341_reset);


/*
 * Assabet flash support code.
 */

#ifdef ASSABET_REV_4
/*
 * Phase 4 Assabet has two 28F160B3 flash parts in bank 0:
 */
static struct mtd_partition assabet_partitions[] = {
	{
		.name		= "bootloader",
		.size		= 0x00020000,
		.offset		= 0,
		.mask_flags	= MTD_WRITEABLE,
	}, {
		.name		= "bootloader params",
		.size		= 0x00020000,
		.offset		= MTDPART_OFS_APPEND,
		.mask_flags	= MTD_WRITEABLE,
	}, {
		.name		= "jffs",
		.size		= MTDPART_SIZ_FULL,
		.offset		= MTDPART_OFS_APPEND,
	}
};
#else
/*
 * Phase 5 Assabet has two 28F128J3A flash parts in bank 0:
 */
static struct mtd_partition assabet_partitions[] = {
	{
		.name		= "bootloader",
		.size		= 0x00040000,
		.offset		= 0,
		.mask_flags	= MTD_WRITEABLE,
	}, {
		.name		= "bootloader params",
		.size		= 0x00040000,
		.offset		= MTDPART_OFS_APPEND,
		.mask_flags	= MTD_WRITEABLE,
	}, {
		.name		= "jffs",
		.size		= MTDPART_SIZ_FULL,
		.offset		= MTDPART_OFS_APPEND,
	}
};
#endif

static struct flash_platform_data assabet_flash_data = {
	.map_name	= "cfi_probe",
	.parts		= assabet_partitions,
	.nr_parts	= ARRAY_SIZE(assabet_partitions),
};

static struct resource assabet_flash_resources[] = {
	DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_32M),
	DEFINE_RES_MEM(SA1100_CS1_PHYS, SZ_32M),
};


/*
 * Assabet IrDA support code.
 */

static int assabet_irda_set_power(struct device *dev, unsigned int state)
{
	static unsigned int bcr_state[4] = {
		ASSABET_BCR_IRDA_MD0,
		ASSABET_BCR_IRDA_MD1|ASSABET_BCR_IRDA_MD0,
		ASSABET_BCR_IRDA_MD1,
		0
	};

	if (state < 4)
		ASSABET_BCR_frob(ASSABET_BCR_IRDA_MD1 | ASSABET_BCR_IRDA_MD0,
				 bcr_state[state]);
	return 0;
}

static void assabet_irda_set_speed(struct device *dev, unsigned int speed)
{
	if (speed < 4000000)
		ASSABET_BCR_clear(ASSABET_BCR_IRDA_FSEL);
	else
		ASSABET_BCR_set(ASSABET_BCR_IRDA_FSEL);
}

static struct irda_platform_data assabet_irda_data = {
	.set_power	= assabet_irda_set_power,
	.set_speed	= assabet_irda_set_speed,
};

static struct ucb1x00_plat_data assabet_ucb1x00_data = {
	.reset		= assabet_ucb1x00_reset,
	.gpio_base	= -1,
	.can_wakeup	= 1,
};

static struct mcp_plat_data assabet_mcp_data = {
	.mccr0		= MCCR0_ADM,
	.sclk_rate	= 11981000,
	.codec_pdata	= &assabet_ucb1x00_data,
};

static void assabet_lcd_set_visual(u32 visual)
{
	u_int is_true_color = visual == FB_VISUAL_TRUECOLOR;

	if (machine_is_assabet()) {
#if 1		// phase 4 or newer Assabet's
		if (is_true_color)
			ASSABET_BCR_set(ASSABET_BCR_LCD_12RGB);
		else
			ASSABET_BCR_clear(ASSABET_BCR_LCD_12RGB);
#else
		// older Assabet's
		if (is_true_color)
			ASSABET_BCR_clear(ASSABET_BCR_LCD_12RGB);
		else
			ASSABET_BCR_set(ASSABET_BCR_LCD_12RGB);
#endif
	}
}

#ifndef ASSABET_PAL_VIDEO
static void assabet_lcd_backlight_power(int on)
{
	if (on)
		ASSABET_BCR_set(ASSABET_BCR_LIGHT_ON);
	else
		ASSABET_BCR_clear(ASSABET_BCR_LIGHT_ON);
}

/*
 * Turn on/off the backlight.  When turning the backlight on, we wait
 * 500us after turning it on so we don't cause the supplies to droop
 * when we enable the LCD controller (and cause a hard reset.)
 */
static void assabet_lcd_power(int on)
{
	if (on) {
		ASSABET_BCR_set(ASSABET_BCR_LCD_ON);
		udelay(500);
	} else
		ASSABET_BCR_clear(ASSABET_BCR_LCD_ON);
}

/*
 * The assabet uses a sharp LQ039Q2DS54 LCD module.  It is actually
 * takes an RGB666 signal, but we provide it with an RGB565 signal
 * instead (def_rgb_16).
 */
static struct sa1100fb_mach_info lq039q2ds54_info = {
	.pixclock	= 171521,	.bpp		= 16,
	.xres		= 320,		.yres		= 240,

	.hsync_len	= 5,		.vsync_len	= 1,
	.left_margin	= 61,		.upper_margin	= 3,
	.right_margin	= 9,		.lower_margin	= 0,

	.sync		= FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,

	.lccr0		= LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
	.lccr3		= LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(2),

	.backlight_power = assabet_lcd_backlight_power,
	.lcd_power = assabet_lcd_power,
	.set_visual = assabet_lcd_set_visual,
};
#else
static void assabet_pal_backlight_power(int on)
{
	ASSABET_BCR_clear(ASSABET_BCR_LIGHT_ON);
}

static void assabet_pal_power(int on)
{
	ASSABET_BCR_clear(ASSABET_BCR_LCD_ON);
}

static struct sa1100fb_mach_info pal_info = {
	.pixclock	= 67797,	.bpp		= 16,
	.xres		= 640,		.yres		= 512,

	.hsync_len	= 64,		.vsync_len	= 6,
	.left_margin	= 125,		.upper_margin	= 70,
	.right_margin	= 115,		.lower_margin	= 36,

	.lccr0		= LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
	.lccr3		= LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(512),

	.backlight_power = assabet_pal_backlight_power,
	.lcd_power = assabet_pal_power,
	.set_visual = assabet_lcd_set_visual,
};
#endif

#ifdef CONFIG_ASSABET_NEPONSET
static struct resource neponset_resources[] = {
	DEFINE_RES_MEM(0x10000000, 0x08000000),
	DEFINE_RES_MEM(0x18000000, 0x04000000),
	DEFINE_RES_MEM(0x40000000, SZ_8K),
	DEFINE_RES_IRQ(IRQ_GPIO25),
};
#endif

static void __init assabet_init(void)
{
	/*
	 * Ensure that the power supply is in "high power" mode.
	 */
	GPSR = GPIO_GPIO16;
	GPDR |= GPIO_GPIO16;

	/*
	 * Ensure that these pins are set as outputs and are driving
	 * logic 0.  This ensures that we won't inadvertently toggle
	 * the WS latch in the CPLD, and we don't float causing
	 * excessive power drain.  --rmk
	 */
	GPCR = GPIO_SSP_TXD | GPIO_SSP_SCLK | GPIO_SSP_SFRM;
	GPDR |= GPIO_SSP_TXD | GPIO_SSP_SCLK | GPIO_SSP_SFRM;

	/*
	 * Also set GPIO27 as an output; this is used to clock UART3
	 * via the FPGA and as otherwise has no pullups or pulldowns,
	 * so stop it floating.
	 */
	GPCR = GPIO_GPIO27;
	GPDR |= GPIO_GPIO27;

	/*
	 * Set up registers for sleep mode.
	 */
	PWER = PWER_GPIO0;
	PGSR = 0;
	PCFR = 0;
	PSDR = 0;
	PPDR |= PPC_TXD3 | PPC_TXD1;
	PPSR |= PPC_TXD3 | PPC_TXD1;

	sa11x0_ppc_configure_mcp();

	if (machine_has_neponset()) {
		/*
		 * Angel sets this, but other bootloaders may not.
		 *
		 * This must precede any driver calls to BCR_set()
		 * or BCR_clear().
		 */
		ASSABET_BCR = BCR_value = ASSABET_BCR_DB1111;

#ifndef CONFIG_ASSABET_NEPONSET
		printk( "Warning: Neponset detected but full support "
			"hasn't been configured in the kernel\n" );
#else
		platform_device_register_simple("neponset", 0,
			neponset_resources, ARRAY_SIZE(neponset_resources));
#endif
	}

#ifndef ASSABET_PAL_VIDEO
	sa11x0_register_lcd(&lq039q2ds54_info);
#else
	sa11x0_register_lcd(&pal_video);
#endif
	sa11x0_register_mtd(&assabet_flash_data, assabet_flash_resources,
			    ARRAY_SIZE(assabet_flash_resources));
	sa11x0_register_irda(&assabet_irda_data);
	sa11x0_register_mcp(&assabet_mcp_data);
}

/*
 * On Assabet, we must probe for the Neponset board _before_
 * paging_init() has occurred to actually determine the amount
 * of RAM available.  To do so, we map the appropriate IO section
 * in the page table here in order to access GPIO registers.
 */
static void __init map_sa1100_gpio_regs( void )
{
	unsigned long phys = __PREG(GPLR) & PMD_MASK;
	unsigned long virt = (unsigned long)io_p2v(phys);
	int prot = PMD_TYPE_SECT | PMD_SECT_AP_WRITE | PMD_DOMAIN(DOMAIN_IO);
	pmd_t *pmd;

	pmd = pmd_offset(pud_offset(pgd_offset_k(virt), virt), virt);
	*pmd = __pmd(phys | prot);
	flush_pmd_entry(pmd);
}

/*
 * Read System Configuration "Register"
 * (taken from "Intel StrongARM SA-1110 Microprocessor Development Board
 * User's Guide", section 4.4.1)
 *
 * This same scan is performed in arch/arm/boot/compressed/head-sa1100.S
 * to set up the serial port for decompression status messages. We
 * repeat it here because the kernel may not be loaded as a zImage, and
 * also because it's a hassle to communicate the SCR value to the kernel
 * from the decompressor.
 *
 * Note that IRQs are guaranteed to be disabled.
 */
static void __init get_assabet_scr(void)
{
	unsigned long uninitialized_var(scr), i;

	GPDR |= 0x3fc;			/* Configure GPIO 9:2 as outputs */
	GPSR = 0x3fc;			/* Write 0xFF to GPIO 9:2 */
	GPDR &= ~(0x3fc);		/* Configure GPIO 9:2 as inputs */
	for(i = 100; i--; )		/* Read GPIO 9:2 */
		scr = GPLR;
	GPDR |= 0x3fc;			/*  restore correct pin direction */
	scr &= 0x3fc;			/* save as system configuration byte. */
	SCR_value = scr;
}

static void __init
fixup_assabet(struct tag *tags, char **cmdline)
{
	/* This must be done before any call to machine_has_neponset() */
	map_sa1100_gpio_regs();
	get_assabet_scr();

	if (machine_has_neponset())
		printk("Neponset expansion board detected\n");
}


static void assabet_uart_pm(struct uart_port *port, u_int state, u_int oldstate)
{
	if (port->mapbase == _Ser1UTCR0) {
		if (state)
			ASSABET_BCR_clear(ASSABET_BCR_RS232EN |
					  ASSABET_BCR_COM_RTS |
					  ASSABET_BCR_COM_DTR);
		else
			ASSABET_BCR_set(ASSABET_BCR_RS232EN |
					ASSABET_BCR_COM_RTS |
					ASSABET_BCR_COM_DTR);
	}
}

/*
 * Assabet uses COM_RTS and COM_DTR for both UART1 (com port)
 * and UART3 (radio module).  We only handle them for UART1 here.
 */
static void assabet_set_mctrl(struct uart_port *port, u_int mctrl)
{
	if (port->mapbase == _Ser1UTCR0) {
		u_int set = 0, clear = 0;

		if (mctrl & TIOCM_RTS)
			clear |= ASSABET_BCR_COM_RTS;
		else
			set |= ASSABET_BCR_COM_RTS;

		if (mctrl & TIOCM_DTR)
			clear |= ASSABET_BCR_COM_DTR;
		else
			set |= ASSABET_BCR_COM_DTR;

		ASSABET_BCR_clear(clear);
		ASSABET_BCR_set(set);
	}
}

static u_int assabet_get_mctrl(struct uart_port *port)
{
	u_int ret = 0;
	u_int bsr = ASSABET_BSR;

	/* need 2 reads to read current value */
	bsr = ASSABET_BSR;

	if (port->mapbase == _Ser1UTCR0) {
		if (bsr & ASSABET_BSR_COM_DCD)
			ret |= TIOCM_CD;
		if (bsr & ASSABET_BSR_COM_CTS)
			ret |= TIOCM_CTS;
		if (bsr & ASSABET_BSR_COM_DSR)
			ret |= TIOCM_DSR;
	} else if (port->mapbase == _Ser3UTCR0) {
		if (bsr & ASSABET_BSR_RAD_DCD)
			ret |= TIOCM_CD;
		if (bsr & ASSABET_BSR_RAD_CTS)
			ret |= TIOCM_CTS;
		if (bsr & ASSABET_BSR_RAD_DSR)
			ret |= TIOCM_DSR;
		if (bsr & ASSABET_BSR_RAD_RI)
			ret |= TIOCM_RI;
	} else {
		ret = TIOCM_CD | TIOCM_CTS | TIOCM_DSR;
	}

	return ret;
}

static struct sa1100_port_fns assabet_port_fns __initdata = {
	.set_mctrl	= assabet_set_mctrl,
	.get_mctrl	= assabet_get_mctrl,
	.pm		= assabet_uart_pm,
};

static struct map_desc assabet_io_desc[] __initdata = {
  	{	/* Board Control Register */
		.virtual	=  0xf1000000,
		.pfn		= __phys_to_pfn(0x12000000),
		.length		= 0x00100000,
		.type		= MT_DEVICE
	}, {	/* MQ200 */
		.virtual	=  0xf2800000,
		.pfn		= __phys_to_pfn(0x4b800000),
		.length		= 0x00800000,
		.type		= MT_DEVICE
	}
};

static void __init assabet_map_io(void)
{
	sa1100_map_io();
	iotable_init(assabet_io_desc, ARRAY_SIZE(assabet_io_desc));

	/*
	 * Set SUS bit in SDCR0 so serial port 1 functions.
	 * Its called GPCLKR0 in my SA1110 manual.
	 */
	Ser1SDCR0 |= SDCR0_SUS;
	MSC1 = (MSC1 & ~0xffff) |
		MSC_NonBrst | MSC_32BitStMem |
		MSC_RdAcc(2) | MSC_WrAcc(2) | MSC_Rec(0);

	if (!machine_has_neponset())
		sa1100_register_uart_fns(&assabet_port_fns);

	/*
	 * When Neponset is attached, the first UART should be
	 * UART3.  That's what Angel is doing and many documents
	 * are stating this.
	 *
	 * We do the Neponset mapping even if Neponset support
	 * isn't compiled in so the user will still get something on
	 * the expected physical serial port.
	 *
	 * We no longer do this; not all boot loaders support it,
	 * and UART3 appears to be somewhat unreliable with blob.
	 */
	sa1100_register_uart(0, 1);
	sa1100_register_uart(2, 3);
}

/* LEDs */
#if defined(CONFIG_NEW_LEDS) && defined(CONFIG_LEDS_CLASS)
struct assabet_led {
	struct led_classdev cdev;
	u32 mask;
};

/*
 * The triggers lines up below will only be used if the
 * LED triggers are compiled in.
 */
static const struct {
	const char *name;
	const char *trigger;
} assabet_leds[] = {
	{ "assabet:red", "cpu0",},
	{ "assabet:green", "heartbeat", },
};

/*
 * The LED control in Assabet is reversed:
 *  - setting bit means turn off LED
 *  - clearing bit means turn on LED
 */
static void assabet_led_set(struct led_classdev *cdev,
		enum led_brightness b)
{
	struct assabet_led *led = container_of(cdev,
			struct assabet_led, cdev);

	if (b != LED_OFF)
		ASSABET_BCR_clear(led->mask);
	else
		ASSABET_BCR_set(led->mask);
}

static enum led_brightness assabet_led_get(struct led_classdev *cdev)
{
	struct assabet_led *led = container_of(cdev,
			struct assabet_led, cdev);

	return (ASSABET_BCR & led->mask) ? LED_OFF : LED_FULL;
}

static int __init assabet_leds_init(void)
{
	int i;

	if (!machine_is_assabet())
		return -ENODEV;

	for (i = 0; i < ARRAY_SIZE(assabet_leds); i++) {
		struct assabet_led *led;

		led = kzalloc(sizeof(*led), GFP_KERNEL);
		if (!led)
			break;

		led->cdev.name = assabet_leds[i].name;
		led->cdev.brightness_set = assabet_led_set;
		led->cdev.brightness_get = assabet_led_get;
		led->cdev.default_trigger = assabet_leds[i].trigger;

		if (!i)
			led->mask = ASSABET_BCR_LED_RED;
		else
			led->mask = ASSABET_BCR_LED_GREEN;

		if (led_classdev_register(NULL, &led->cdev) < 0) {
			kfree(led);
			break;
		}
	}

	return 0;
}

/*
 * Since we may have triggers on any subsystem, defer registration
 * until after subsystem_init.
 */
fs_initcall(assabet_leds_init);
#endif

MACHINE_START(ASSABET, "Intel-Assabet")
	.atag_offset	= 0x100,
	.fixup		= fixup_assabet,
	.map_io		= assabet_map_io,
	.nr_irqs	= SA1100_NR_IRQS,
	.init_irq	= sa1100_init_irq,
	.init_time	= sa1100_timer_init,
	.init_machine	= assabet_init,
	.init_late	= sa11x0_init_late,
#ifdef CONFIG_SA1111
	.dma_zone_size	= SZ_1M,
#endif
	.restart	= sa11x0_restart,
MACHINE_END
Commit	Line	Data
1da177e4 LT	1	/*
	2	* linux/arch/arm/mach-sa1100/assabet.c
	3	*
	4	* Author: Nicolas Pitre
	5	*
	6	* This file contains all Assabet-specific tweaks.
	7	*
	8	* This program is free software; you can redistribute it and/or modify
	9	* it under the terms of the GNU General Public License version 2 as
	10	* published by the Free Software Foundation.
	11	*/
1da177e4 LT	12	#include <linux/init.h>
	13	#include <linux/kernel.h>
	14	#include <linux/module.h>
	15	#include <linux/errno.h>
	16	#include <linux/ioport.h>
6920b5a7	17	#include <linux/platform_data/sa11x0-serial.h>
1da177e4	18	#include <linux/serial_core.h>
7f206d49	19	#include <linux/platform_device.h>
69dde86a	20	#include <linux/mfd/ucb1x00.h>
1da177e4 LT	21	#include <linux/mtd/mtd.h>
	22	#include <linux/mtd/partitions.h>
	23	#include <linux/delay.h>
	24	#include <linux/mm.h>
18775a7b BW	25	#include <linux/leds.h>
18775a7b BW	26	#include <linux/slab.h>
1da177e4	27
e1b7a72a RK	28	#include <video/sa1100fb.h>
e1b7a72a RK	29
a09e64fb	30	#include <mach/hardware.h>
1da177e4	31	#include <asm/mach-types.h>
1da177e4 LT	32	#include <asm/setup.h>
1da177e4 LT	33	#include <asm/page.h>
74945c86	34	#include <asm/pgtable-hwdef.h>
1da177e4 LT	35	#include <asm/pgtable.h>
	36	#include <asm/tlbflush.h>
	37
	38	#include <asm/mach/arch.h>
	39	#include <asm/mach/flash.h>
dd450777	40	#include <linux/platform_data/irda-sa11x0.h>
1da177e4	41	#include <asm/mach/map.h>
a09e64fb	42	#include <mach/assabet.h>
a1fd844c	43	#include <linux/platform_data/mfd-mcp-sa11x0.h>
f314f33b	44	#include <mach/irqs.h>
1da177e4 LT	45
	46	#include "generic.h"
	47
	48	#define ASSABET_BCR_DB1110 \
7186fb9f	49	(ASSABET_BCR_SPK_OFF \| \
1da177e4 LT	50	ASSABET_BCR_LED_GREEN \| ASSABET_BCR_LED_RED \| \
	51	ASSABET_BCR_RS232EN \| ASSABET_BCR_LCD_12RGB \| \
	52	ASSABET_BCR_IRDA_MD0)
	53
	54	#define ASSABET_BCR_DB1111 \
7186fb9f	55	(ASSABET_BCR_SPK_OFF \| \
1da177e4 LT	56	ASSABET_BCR_LED_GREEN \| ASSABET_BCR_LED_RED \| \
	57	ASSABET_BCR_RS232EN \| ASSABET_BCR_LCD_12RGB \| \
	58	ASSABET_BCR_CF_BUS_OFF \| ASSABET_BCR_STEREO_LB \| \
	59	ASSABET_BCR_IRDA_MD0 \| ASSABET_BCR_CF_RST)
	60
	61	unsigned long SCR_value = ASSABET_SCR_INIT;
	62	EXPORT_SYMBOL(SCR_value);
	63
	64	static unsigned long BCR_value = ASSABET_BCR_DB1110;
	65
	66	void ASSABET_BCR_frob(unsigned int mask, unsigned int val)
	67	{
	68	unsigned long flags;
	69
	70	local_irq_save(flags);
	71	BCR_value = (BCR_value & ~mask) \| val;
	72	ASSABET_BCR = BCR_value;
	73	local_irq_restore(flags);
	74	}
	75
	76	EXPORT_SYMBOL(ASSABET_BCR_frob);
	77
7dde0c03 RK	78	/*
	79	* The codec reset goes to three devices, so we need to release
	80	* the rest when any one of these requests it. However, that
	81	* causes the ADV7171 to consume around 100mA - more than half
	82	* the LCD-blanked power.
	83	*
	84	* With the ADV7171, LCD and backlight enabled, we go over
	85	* budget on the MAX846 Li-Ion charger, and if no Li-Ion battery
	86	* is connected, the Assabet crashes.
	87	*/
	88	#define RST_UCB1X00 (1 << 0)
	89	#define RST_UDA1341 (1 << 1)
	90	#define RST_ADV7171 (1 << 2)
	91
	92	#define SDA GPIO_GPIO(15)
	93	#define SCK GPIO_GPIO(18)
	94	#define MOD GPIO_GPIO(17)
	95
	96	static void adv7171_start(void)
	97	{
	98	GPSR = SCK;
	99	udelay(1);
	100	GPSR = SDA;
	101	udelay(2);
	102	GPCR = SDA;
	103	}
	104
	105	static void adv7171_stop(void)
	106	{
	107	GPSR = SCK;
	108	udelay(2);
	109	GPSR = SDA;
	110	udelay(1);
	111	}
	112
	113	static void adv7171_send(unsigned byte)
	114	{
	115	unsigned i;
	116
	117	for (i = 0; i < 8; i++, byte <<= 1) {
	118	GPCR = SCK;
	119	udelay(1);
	120	if (byte & 0x80)
	121	GPSR = SDA;
	122	else
	123	GPCR = SDA;
	124	udelay(1);
	125	GPSR = SCK;
	126	udelay(1);
	127	}
	128	GPCR = SCK;
	129	udelay(1);
	130	GPSR = SDA;
	131	udelay(1);
	132	GPDR &= ~SDA;
	133	GPSR = SCK;
	134	udelay(1);
	135	if (GPLR & SDA)
	136	printk(KERN_WARNING "No ACK from ADV7171\n");
	137	udelay(1);
	138	GPCR = SCK \| SDA;
	139	udelay(1);
	140	GPDR \|= SDA;
	141	udelay(1);
142	}
143
144	static void adv7171_write(unsigned reg, unsigned val)
145	{
146	unsigned gpdr = GPDR;
147	unsigned gplr = GPLR;
148
149	ASSABET_BCR = BCR_value \| ASSABET_BCR_AUDIO_ON;
150	udelay(100);
151
152	GPCR = SDA \| SCK \| MOD; /* clear L3 mode to ensure UDA1341 doesn't respond */
153	GPDR = (GPDR \| SCK \| MOD) & ~SDA;
154	udelay(10);
155	if (!(GPLR & SDA))
156	printk(KERN_WARNING "Something dragging SDA down?\n");
157	GPDR \|= SDA;
158
159	adv7171_start();
160	adv7171_send(0x54);
161	adv7171_send(reg);
162	adv7171_send(val);
163	adv7171_stop();
164
165	/* Restore GPIO state for L3 bus */
166	GPSR = gplr & (SDA \| SCK \| MOD);
167	GPCR = (~gplr) & (SDA \| SCK \| MOD);
168	GPDR = gpdr;
169	}
170
171	static void adv7171_sleep(void)
172	{
173	/* Put the ADV7171 into sleep mode */
174	adv7171_write(0x04, 0x40);
175	}
176
177	static unsigned codec_nreset;
178
179	static void assabet_codec_reset(unsigned mask, int set)
180	{
181	unsigned long flags;
182	bool old;
183
184	local_irq_save(flags);
185	old = !codec_nreset;
186	if (set)
187	codec_nreset &= ~mask;
188	else
189	codec_nreset \|= mask;
190
191	if (old != !codec_nreset) {
192	if (codec_nreset) {
193	ASSABET_BCR_set(ASSABET_BCR_NCODEC_RST);
194	adv7171_sleep();
195	} else {
196	ASSABET_BCR_clear(ASSABET_BCR_NCODEC_RST);
197	}
198	}
199	local_irq_restore(flags);
200	}
201
6ed3e2ac RK	202	static void assabet_ucb1x00_reset(enum ucb1x00_reset state)
6ed3e2ac RK	203	{
7dde0c03 RK	204	int set = state == UCB_RST_REMOVE \|\| state == UCB_RST_SUSPEND \|\|
	205	state == UCB_RST_PROBE_FAIL;
	206	assabet_codec_reset(RST_UCB1X00, set);
	207	}
	208
	209	void assabet_uda1341_reset(int set)
	210	{
	211	assabet_codec_reset(RST_UDA1341, set);
6ed3e2ac	212	}
7dde0c03	213	EXPORT_SYMBOL(assabet_uda1341_reset);
6ed3e2ac	214
1da177e4 LT	215
	216	/*
	217	* Assabet flash support code.
	218	*/
	219
	220	#ifdef ASSABET_REV_4
	221	/*
	222	* Phase 4 Assabet has two 28F160B3 flash parts in bank 0:
	223	*/
	224	static struct mtd_partition assabet_partitions[] = {
	225	{
	226	.name = "bootloader",
	227	.size = 0x00020000,
	228	.offset = 0,
	229	.mask_flags = MTD_WRITEABLE,
	230	}, {
	231	.name = "bootloader params",
	232	.size = 0x00020000,
	233	.offset = MTDPART_OFS_APPEND,
	234	.mask_flags = MTD_WRITEABLE,
	235	}, {
	236	.name = "jffs",
	237	.size = MTDPART_SIZ_FULL,
	238	.offset = MTDPART_OFS_APPEND,
	239	}
	240	};
	241	#else
	242	/*
	243	* Phase 5 Assabet has two 28F128J3A flash parts in bank 0:
	244	*/
	245	static struct mtd_partition assabet_partitions[] = {
	246	{
	247	.name = "bootloader",
	248	.size = 0x00040000,
	249	.offset = 0,
	250	.mask_flags = MTD_WRITEABLE,
	251	}, {
	252	.name = "bootloader params",
	253	.size = 0x00040000,
	254	.offset = MTDPART_OFS_APPEND,
	255	.mask_flags = MTD_WRITEABLE,
	256	}, {
	257	.name = "jffs",
	258	.size = MTDPART_SIZ_FULL,
	259	.offset = MTDPART_OFS_APPEND,
	260	}
	261	};
	262	#endif
	263
	264	static struct flash_platform_data assabet_flash_data = {
	265	.map_name = "cfi_probe",
	266	.parts = assabet_partitions,
	267	.nr_parts = ARRAY_SIZE(assabet_partitions),
	268	};
	269
	270	static struct resource assabet_flash_resources[] = {
a181099e RK	271	DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_32M),
a181099e RK	272	DEFINE_RES_MEM(SA1100_CS1_PHYS, SZ_32M),
1da177e4 LT	273	};
	274
	275
	276	/*
	277	* Assabet IrDA support code.
	278	*/
	279
	280	static int assabet_irda_set_power(struct device *dev, unsigned int state)
	281	{
	282	static unsigned int bcr_state[4] = {
	283	ASSABET_BCR_IRDA_MD0,
	284	ASSABET_BCR_IRDA_MD1\|ASSABET_BCR_IRDA_MD0,
	285	ASSABET_BCR_IRDA_MD1,
	286	0
	287	};
	288
22564bde RK	289	if (state < 4)
	290	ASSABET_BCR_frob(ASSABET_BCR_IRDA_MD1 \| ASSABET_BCR_IRDA_MD0,
	291	bcr_state[state]);
1da177e4 LT	292	return 0;
	293	}
	294
	295	static void assabet_irda_set_speed(struct device *dev, unsigned int speed)
	296	{
	297	if (speed < 4000000)
	298	ASSABET_BCR_clear(ASSABET_BCR_IRDA_FSEL);
	299	else
	300	ASSABET_BCR_set(ASSABET_BCR_IRDA_FSEL);
	301	}
	302
	303	static struct irda_platform_data assabet_irda_data = {
	304	.set_power = assabet_irda_set_power,
	305	.set_speed = assabet_irda_set_speed,
	306	};
	307
69dde86a	308	static struct ucb1x00_plat_data assabet_ucb1x00_data = {
6ed3e2ac	309	.reset = assabet_ucb1x00_reset,
69dde86a	310	.gpio_base = -1,
c8857758	311	.can_wakeup = 1,
69dde86a RK	312	};
69dde86a RK	313
323cdfc1 RK	314	static struct mcp_plat_data assabet_mcp_data = {
	315	.mccr0 = MCCR0_ADM,
	316	.sclk_rate = 11981000,
69dde86a	317	.codec_pdata = &assabet_ucb1x00_data,
323cdfc1 RK	318	};
323cdfc1 RK	319
086ada54 RK	320	static void assabet_lcd_set_visual(u32 visual)
	321	{
	322	u_int is_true_color = visual == FB_VISUAL_TRUECOLOR;
	323
	324	if (machine_is_assabet()) {
	325	#if 1 // phase 4 or newer Assabet's
	326	if (is_true_color)
	327	ASSABET_BCR_set(ASSABET_BCR_LCD_12RGB);
	328	else
	329	ASSABET_BCR_clear(ASSABET_BCR_LCD_12RGB);
	330	#else
	331	// older Assabet's
	332	if (is_true_color)
	333	ASSABET_BCR_clear(ASSABET_BCR_LCD_12RGB);
	334	else
	335	ASSABET_BCR_set(ASSABET_BCR_LCD_12RGB);
	336	#endif
	337	}
	338	}
	339
e1b7a72a	340	#ifndef ASSABET_PAL_VIDEO
086ada54 RK	341	static void assabet_lcd_backlight_power(int on)
	342	{
	343	if (on)
	344	ASSABET_BCR_set(ASSABET_BCR_LIGHT_ON);
	345	else
	346	ASSABET_BCR_clear(ASSABET_BCR_LIGHT_ON);
	347	}
	348
	349	/*
	350	* Turn on/off the backlight. When turning the backlight on, we wait
	351	* 500us after turning it on so we don't cause the supplies to droop
	352	* when we enable the LCD controller (and cause a hard reset.)
	353	*/
	354	static void assabet_lcd_power(int on)
	355	{
	356	if (on) {
	357	ASSABET_BCR_set(ASSABET_BCR_LCD_ON);
	358	udelay(500);
	359	} else
	360	ASSABET_BCR_clear(ASSABET_BCR_LCD_ON);
	361	}
	362
e1b7a72a RK	363	/*
	364	* The assabet uses a sharp LQ039Q2DS54 LCD module. It is actually
	365	* takes an RGB666 signal, but we provide it with an RGB565 signal
	366	* instead (def_rgb_16).
	367	*/
	368	static struct sa1100fb_mach_info lq039q2ds54_info = {
	369	.pixclock = 171521, .bpp = 16,
	370	.xres = 320, .yres = 240,
	371
	372	.hsync_len = 5, .vsync_len = 1,
	373	.left_margin = 61, .upper_margin = 3,
	374	.right_margin = 9, .lower_margin = 0,
	375
	376	.sync = FB_SYNC_HOR_HIGH_ACT \| FB_SYNC_VERT_HIGH_ACT,
	377
	378	.lccr0 = LCCR0_Color \| LCCR0_Sngl \| LCCR0_Act,
	379	.lccr3 = LCCR3_OutEnH \| LCCR3_PixRsEdg \| LCCR3_ACBsDiv(2),
086ada54 RK	380
	381	.backlight_power = assabet_lcd_backlight_power,
	382	.lcd_power = assabet_lcd_power,
	383	.set_visual = assabet_lcd_set_visual,
e1b7a72a RK	384	};
e1b7a72a RK	385	#else
086ada54 RK	386	static void assabet_pal_backlight_power(int on)
	387	{
	388	ASSABET_BCR_clear(ASSABET_BCR_LIGHT_ON);
	389	}
	390
	391	static void assabet_pal_power(int on)
	392	{
	393	ASSABET_BCR_clear(ASSABET_BCR_LCD_ON);
	394	}
	395
e1b7a72a RK	396	static struct sa1100fb_mach_info pal_info = {
	397	.pixclock = 67797, .bpp = 16,
	398	.xres = 640, .yres = 512,
	399
	400	.hsync_len = 64, .vsync_len = 6,
	401	.left_margin = 125, .upper_margin = 70,
	402	.right_margin = 115, .lower_margin = 36,
	403
	404	.lccr0 = LCCR0_Color \| LCCR0_Sngl \| LCCR0_Act,
	405	.lccr3 = LCCR3_OutEnH \| LCCR3_PixRsEdg \| LCCR3_ACBsDiv(512),
086ada54 RK	406
	407	.backlight_power = assabet_pal_backlight_power,
	408	.lcd_power = assabet_pal_power,
	409	.set_visual = assabet_lcd_set_visual,
e1b7a72a RK	410	};
	411	#endif
	412
bab50a35 RK	413	#ifdef CONFIG_ASSABET_NEPONSET
	414	static struct resource neponset_resources[] = {
	415	DEFINE_RES_MEM(0x10000000, 0x08000000),
	416	DEFINE_RES_MEM(0x18000000, 0x04000000),
	417	DEFINE_RES_MEM(0x40000000, SZ_8K),
	418	DEFINE_RES_IRQ(IRQ_GPIO25),
	419	};
	420	#endif
	421
1da177e4 LT	422	static void __init assabet_init(void)
	423	{
	424	/*
	425	* Ensure that the power supply is in "high power" mode.
	426	*/
1da177e4	427	GPSR = GPIO_GPIO16;
4f592e6d	428	GPDR \|= GPIO_GPIO16;
1da177e4 LT	429
	430	/*
	431	* Ensure that these pins are set as outputs and are driving
	432	* logic 0. This ensures that we won't inadvertently toggle
	433	* the WS latch in the CPLD, and we don't float causing
	434	* excessive power drain. --rmk
	435	*/
1da177e4	436	GPCR = GPIO_SSP_TXD \| GPIO_SSP_SCLK \| GPIO_SSP_SFRM;
4f592e6d	437	GPDR \|= GPIO_SSP_TXD \| GPIO_SSP_SCLK \| GPIO_SSP_SFRM;
1da177e4	438
49e01e3f RK	439	/*
	440	* Also set GPIO27 as an output; this is used to clock UART3
	441	* via the FPGA and as otherwise has no pullups or pulldowns,
	442	* so stop it floating.
	443	*/
	444	GPCR = GPIO_GPIO27;
	445	GPDR \|= GPIO_GPIO27;
	446
1da177e4 LT	447	/*
	448	* Set up registers for sleep mode.
	449	*/
	450	PWER = PWER_GPIO0;
	451	PGSR = 0;
	452	PCFR = 0;
	453	PSDR = 0;
	454	PPDR \|= PPC_TXD3 \| PPC_TXD1;
	455	PPSR \|= PPC_TXD3 \| PPC_TXD1;
	456
e36e26a8 RK	457	sa11x0_ppc_configure_mcp();
e36e26a8 RK	458
1da177e4 LT	459	if (machine_has_neponset()) {
	460	/*
	461	* Angel sets this, but other bootloaders may not.
	462	*
	463	* This must precede any driver calls to BCR_set()
	464	* or BCR_clear().
	465	*/
	466	ASSABET_BCR = BCR_value = ASSABET_BCR_DB1111;
	467
	468	#ifndef CONFIG_ASSABET_NEPONSET
	469	printk( "Warning: Neponset detected but full support "
	470	"hasn't been configured in the kernel\n" );
bab50a35 RK	471	#else
	472	platform_device_register_simple("neponset", 0,
	473	neponset_resources, ARRAY_SIZE(neponset_resources));
1da177e4 LT	474	#endif
	475	}
	476
e1b7a72a RK	477	#ifndef ASSABET_PAL_VIDEO
	478	sa11x0_register_lcd(&lq039q2ds54_info);
	479	#else
	480	sa11x0_register_lcd(&pal_video);
	481	#endif
7a5b4e16 RK	482	sa11x0_register_mtd(&assabet_flash_data, assabet_flash_resources,
	483	ARRAY_SIZE(assabet_flash_resources));
	484	sa11x0_register_irda(&assabet_irda_data);
	485	sa11x0_register_mcp(&assabet_mcp_data);
1da177e4 LT	486	}
	487
	488	/*
	489	* On Assabet, we must probe for the Neponset board _before_
	490	* paging_init() has occurred to actually determine the amount
	491	* of RAM available. To do so, we map the appropriate IO section
	492	* in the page table here in order to access GPIO registers.
	493	*/
	494	static void __init map_sa1100_gpio_regs( void )
	495	{
	496	unsigned long phys = __PREG(GPLR) & PMD_MASK;
3169663a	497	unsigned long virt = (unsigned long)io_p2v(phys);
1da177e4 LT	498	int prot = PMD_TYPE_SECT \| PMD_SECT_AP_WRITE \| PMD_DOMAIN(DOMAIN_IO);
	499	pmd_t *pmd;
	500
a61c2332	501	pmd = pmd_offset(pud_offset(pgd_offset_k(virt), virt), virt);
1da177e4 LT	502	*pmd = __pmd(phys \| prot);
	503	flush_pmd_entry(pmd);
	504	}
	505
	506	/*
	507	* Read System Configuration "Register"
	508	* (taken from "Intel StrongARM SA-1110 Microprocessor Development Board
	509	* User's Guide", section 4.4.1)
	510	*
	511	* This same scan is performed in arch/arm/boot/compressed/head-sa1100.S
	512	* to set up the serial port for decompression status messages. We
	513	* repeat it here because the kernel may not be loaded as a zImage, and
	514	* also because it's a hassle to communicate the SCR value to the kernel
	515	* from the decompressor.
	516	*
	517	* Note that IRQs are guaranteed to be disabled.
	518	*/
	519	static void __init get_assabet_scr(void)
	520	{
c6e9fbbf	521	unsigned long uninitialized_var(scr), i;
1da177e4 LT	522
	523	GPDR \|= 0x3fc; /* Configure GPIO 9:2 as outputs */
	524	GPSR = 0x3fc; /* Write 0xFF to GPIO 9:2 */
	525	GPDR &= ~(0x3fc); /* Configure GPIO 9:2 as inputs */
2f3eca8b RK	526	for(i = 100; i--; ) /* Read GPIO 9:2 */
2f3eca8b RK	527	scr = GPLR;
1da177e4 LT	528	GPDR \|= 0x3fc; /* restore correct pin direction */
	529	scr &= 0x3fc; /* save as system configuration byte. */
	530	SCR_value = scr;
	531	}
	532
	533	static void __init
1c2f87c2	534	fixup_assabet(struct tag tags, char *cmdline)
1da177e4 LT	535	{
	536	/* This must be done before any call to machine_has_neponset() */
	537	map_sa1100_gpio_regs();
	538	get_assabet_scr();
	539
	540	if (machine_has_neponset())
	541	printk("Neponset expansion board detected\n");
	542	}
	543
	544
	545	static void assabet_uart_pm(struct uart_port *port, u_int state, u_int oldstate)
	546	{
	547	if (port->mapbase == _Ser1UTCR0) {
	548	if (state)
	549	ASSABET_BCR_clear(ASSABET_BCR_RS232EN \|
	550	ASSABET_BCR_COM_RTS \|
	551	ASSABET_BCR_COM_DTR);
	552	else
	553	ASSABET_BCR_set(ASSABET_BCR_RS232EN \|
	554	ASSABET_BCR_COM_RTS \|
	555	ASSABET_BCR_COM_DTR);
	556	}
	557	}
	558
	559	/*
	560	* Assabet uses COM_RTS and COM_DTR for both UART1 (com port)
	561	* and UART3 (radio module). We only handle them for UART1 here.
	562	*/
	563	static void assabet_set_mctrl(struct uart_port *port, u_int mctrl)
	564	{
	565	if (port->mapbase == _Ser1UTCR0) {
	566	u_int set = 0, clear = 0;
	567
	568	if (mctrl & TIOCM_RTS)
	569	clear \|= ASSABET_BCR_COM_RTS;
	570	else
	571	set \|= ASSABET_BCR_COM_RTS;
	572
	573	if (mctrl & TIOCM_DTR)
	574	clear \|= ASSABET_BCR_COM_DTR;
	575	else
	576	set \|= ASSABET_BCR_COM_DTR;
	577
	578	ASSABET_BCR_clear(clear);
	579	ASSABET_BCR_set(set);
	580	}
	581	}
	582
	583	static u_int assabet_get_mctrl(struct uart_port *port)
	584	{
	585	u_int ret = 0;
	586	u_int bsr = ASSABET_BSR;
	587
	588	/* need 2 reads to read current value */
	589	bsr = ASSABET_BSR;
	590
	591	if (port->mapbase == _Ser1UTCR0) {
	592	if (bsr & ASSABET_BSR_COM_DCD)
	593	ret \|= TIOCM_CD;
	594	if (bsr & ASSABET_BSR_COM_CTS)
	595	ret \|= TIOCM_CTS;
	596	if (bsr & ASSABET_BSR_COM_DSR)
	597	ret \|= TIOCM_DSR;
	598	} else if (port->mapbase == _Ser3UTCR0) {
599	if (bsr & ASSABET_BSR_RAD_DCD)
600	ret \|= TIOCM_CD;
601	if (bsr & ASSABET_BSR_RAD_CTS)
602	ret \|= TIOCM_CTS;
603	if (bsr & ASSABET_BSR_RAD_DSR)
604	ret \|= TIOCM_DSR;
605	if (bsr & ASSABET_BSR_RAD_RI)
606	ret \|= TIOCM_RI;
607	} else {
608	ret = TIOCM_CD \| TIOCM_CTS \| TIOCM_DSR;
609	}
610
611	return ret;
612	}
613
614	static struct sa1100_port_fns assabet_port_fns __initdata = {
615	.set_mctrl = assabet_set_mctrl,
616	.get_mctrl = assabet_get_mctrl,
617	.pm = assabet_uart_pm,
618	};
619
620	static struct map_desc assabet_io_desc[] __initdata = {
92519d82 DS	621	{ /* Board Control Register */
	622	.virtual = 0xf1000000,
	623	.pfn = __phys_to_pfn(0x12000000),
	624	.length = 0x00100000,
	625	.type = MT_DEVICE
	626	}, { /* MQ200 */
	627	.virtual = 0xf2800000,
	628	.pfn = __phys_to_pfn(0x4b800000),
	629	.length = 0x00800000,
	630	.type = MT_DEVICE
	631	}
1da177e4 LT	632	};
	633
	634	static void __init assabet_map_io(void)
	635	{
	636	sa1100_map_io();
	637	iotable_init(assabet_io_desc, ARRAY_SIZE(assabet_io_desc));
	638
	639	/*
	640	* Set SUS bit in SDCR0 so serial port 1 functions.
	641	* Its called GPCLKR0 in my SA1110 manual.
	642	*/
	643	Ser1SDCR0 \|= SDCR0_SUS;
f3964fe1 RK	644	MSC1 = (MSC1 & ~0xffff) \|
	645	MSC_NonBrst \| MSC_32BitStMem \|
	646	MSC_RdAcc(2) \| MSC_WrAcc(2) \| MSC_Rec(0);
1da177e4	647
374da9da	648	if (!machine_has_neponset())
1da177e4	649	sa1100_register_uart_fns(&assabet_port_fns);
1da177e4 LT	650
	651	/*
	652	* When Neponset is attached, the first UART should be
	653	* UART3. That's what Angel is doing and many documents
	654	* are stating this.
	655	*
	656	* We do the Neponset mapping even if Neponset support
	657	* isn't compiled in so the user will still get something on
	658	* the expected physical serial port.
	659	*
	660	* We no longer do this; not all boot loaders support it,
	661	* and UART3 appears to be somewhat unreliable with blob.
	662	*/
	663	sa1100_register_uart(0, 1);
	664	sa1100_register_uart(2, 3);
	665	}
	666
18775a7b BW	667	/* LEDs */
	668	#if defined(CONFIG_NEW_LEDS) && defined(CONFIG_LEDS_CLASS)
	669	struct assabet_led {
	670	struct led_classdev cdev;
	671	u32 mask;
	672	};
	673
	674	/*
	675	* The triggers lines up below will only be used if the
	676	* LED triggers are compiled in.
	677	*/
	678	static const struct {
	679	const char *name;
	680	const char *trigger;
	681	} assabet_leds[] = {
	682	{ "assabet:red", "cpu0",},
	683	{ "assabet:green", "heartbeat", },
	684	};
	685
	686	/*
	687	* The LED control in Assabet is reversed:
	688	* - setting bit means turn off LED
	689	* - clearing bit means turn on LED
	690	*/
	691	static void assabet_led_set(struct led_classdev *cdev,
	692	enum led_brightness b)
	693	{
	694	struct assabet_led *led = container_of(cdev,
	695	struct assabet_led, cdev);
	696
	697	if (b != LED_OFF)
	698	ASSABET_BCR_clear(led->mask);
	699	else
	700	ASSABET_BCR_set(led->mask);
	701	}
	702
	703	static enum led_brightness assabet_led_get(struct led_classdev *cdev)
	704	{
	705	struct assabet_led *led = container_of(cdev,
	706	struct assabet_led, cdev);
	707
	708	return (ASSABET_BCR & led->mask) ? LED_OFF : LED_FULL;
	709	}
	710
	711	static int __init assabet_leds_init(void)
	712	{
	713	int i;
	714
	715	if (!machine_is_assabet())
	716	return -ENODEV;
	717
	718	for (i = 0; i < ARRAY_SIZE(assabet_leds); i++) {
	719	struct assabet_led *led;
	720
	721	led = kzalloc(sizeof(*led), GFP_KERNEL);
	722	if (!led)
	723	break;
	724
	725	led->cdev.name = assabet_leds[i].name;
	726	led->cdev.brightness_set = assabet_led_set;
	727	led->cdev.brightness_get = assabet_led_get;
	728	led->cdev.default_trigger = assabet_leds[i].trigger;
	729
	730	if (!i)
731	led->mask = ASSABET_BCR_LED_RED;
732	else
733	led->mask = ASSABET_BCR_LED_GREEN;
734
735	if (led_classdev_register(NULL, &led->cdev) < 0) {
736	kfree(led);
737	break;
738	}
739	}
740
741	return 0;
742	}
743
744	/*
745	* Since we may have triggers on any subsystem, defer registration
746	* until after subsystem_init.
747	*/
748	fs_initcall(assabet_leds_init);
749	#endif
1da177e4 LT	750
1da177e4 LT	751	MACHINE_START(ASSABET, "Intel-Assabet")
17f4425d	752	.atag_offset = 0x100,
e9dea0c6 RK	753	.fixup = fixup_assabet,
e9dea0c6 RK	754	.map_io = assabet_map_io,
f314f33b	755	.nr_irqs = SA1100_NR_IRQS,
e9dea0c6	756	.init_irq = sa1100_init_irq,
6bb27d73	757	.init_time = sa1100_timer_init,
1da177e4	758	.init_machine = assabet_init,
7fea1ba5	759	.init_late = sa11x0_init_late,
e9107ab6 NP	760	#ifdef CONFIG_SA1111
	761	.dma_zone_size = SZ_1M,
	762	#endif
d9ca5839	763	.restart = sa11x0_restart,
1da177e4	764	MACHINE_END