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1da177e4 LT |
1 | /* |
2 | * linux/arch/arm/mach-sa1100/generic.c | |
3 | * | |
4 | * Author: Nicolas Pitre | |
5 | * | |
6 | * Code common to all SA11x0 machines. | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | */ | |
1da177e4 LT |
12 | #include <linux/module.h> |
13 | #include <linux/kernel.h> | |
14 | #include <linux/init.h> | |
15 | #include <linux/delay.h> | |
16 | #include <linux/pm.h> | |
17 | #include <linux/cpufreq.h> | |
18 | #include <linux/ioport.h> | |
4e57b681 | 19 | #include <linux/sched.h> /* just for sched_clock() - funny that */ |
d052d1be | 20 | #include <linux/platform_device.h> |
1da177e4 LT |
21 | |
22 | #include <asm/div64.h> | |
2f1675c1 | 23 | #include <asm/cnt32_to_63.h> |
a09e64fb | 24 | #include <mach/hardware.h> |
1da177e4 LT |
25 | #include <asm/system.h> |
26 | #include <asm/pgtable.h> | |
27 | #include <asm/mach/map.h> | |
14e66f76 | 28 | #include <asm/mach/flash.h> |
1da177e4 | 29 | #include <asm/irq.h> |
aeb3f6d1 | 30 | #include <asm/gpio.h> |
1da177e4 LT |
31 | |
32 | #include "generic.h" | |
33 | ||
04fef228 EM |
34 | unsigned int reset_status; |
35 | EXPORT_SYMBOL(reset_status); | |
36 | ||
1da177e4 LT |
37 | #define NR_FREQS 16 |
38 | ||
39 | /* | |
40 | * This table is setup for a 3.6864MHz Crystal. | |
41 | */ | |
42 | static const unsigned short cclk_frequency_100khz[NR_FREQS] = { | |
43 | 590, /* 59.0 MHz */ | |
44 | 737, /* 73.7 MHz */ | |
45 | 885, /* 88.5 MHz */ | |
46 | 1032, /* 103.2 MHz */ | |
47 | 1180, /* 118.0 MHz */ | |
48 | 1327, /* 132.7 MHz */ | |
49 | 1475, /* 147.5 MHz */ | |
50 | 1622, /* 162.2 MHz */ | |
51 | 1769, /* 176.9 MHz */ | |
52 | 1917, /* 191.7 MHz */ | |
53 | 2064, /* 206.4 MHz */ | |
54 | 2212, /* 221.2 MHz */ | |
55 | 2359, /* 235.9 MHz */ | |
56 | 2507, /* 250.7 MHz */ | |
57 | 2654, /* 265.4 MHz */ | |
58 | 2802 /* 280.2 MHz */ | |
59 | }; | |
60 | ||
61 | #if defined(CONFIG_CPU_FREQ_SA1100) || defined(CONFIG_CPU_FREQ_SA1110) | |
62 | /* rounds up(!) */ | |
63 | unsigned int sa11x0_freq_to_ppcr(unsigned int khz) | |
64 | { | |
65 | int i; | |
66 | ||
67 | khz /= 100; | |
68 | ||
69 | for (i = 0; i < NR_FREQS; i++) | |
70 | if (cclk_frequency_100khz[i] >= khz) | |
71 | break; | |
72 | ||
73 | return i; | |
74 | } | |
75 | ||
76 | unsigned int sa11x0_ppcr_to_freq(unsigned int idx) | |
77 | { | |
78 | unsigned int freq = 0; | |
79 | if (idx < NR_FREQS) | |
80 | freq = cclk_frequency_100khz[idx] * 100; | |
81 | return freq; | |
82 | } | |
83 | ||
84 | ||
85 | /* make sure that only the "userspace" governor is run -- anything else wouldn't make sense on | |
86 | * this platform, anyway. | |
87 | */ | |
88 | int sa11x0_verify_speed(struct cpufreq_policy *policy) | |
89 | { | |
90 | unsigned int tmp; | |
91 | if (policy->cpu) | |
92 | return -EINVAL; | |
93 | ||
94 | cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, policy->cpuinfo.max_freq); | |
95 | ||
96 | /* make sure that at least one frequency is within the policy */ | |
97 | tmp = cclk_frequency_100khz[sa11x0_freq_to_ppcr(policy->min)] * 100; | |
98 | if (tmp > policy->max) | |
99 | policy->max = tmp; | |
100 | ||
101 | cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, policy->cpuinfo.max_freq); | |
102 | ||
103 | return 0; | |
104 | } | |
105 | ||
106 | unsigned int sa11x0_getspeed(unsigned int cpu) | |
107 | { | |
108 | if (cpu) | |
109 | return 0; | |
110 | return cclk_frequency_100khz[PPCR & 0xf] * 100; | |
111 | } | |
112 | ||
113 | #else | |
114 | /* | |
115 | * We still need to provide this so building without cpufreq works. | |
116 | */ | |
117 | unsigned int cpufreq_get(unsigned int cpu) | |
118 | { | |
119 | return cclk_frequency_100khz[PPCR & 0xf] * 100; | |
120 | } | |
121 | EXPORT_SYMBOL(cpufreq_get); | |
122 | #endif | |
123 | ||
124 | /* | |
125 | * This is the SA11x0 sched_clock implementation. This has | |
2f1675c1 NP |
126 | * a resolution of 271ns, and a maximum value of 32025597s (370 days). |
127 | * | |
128 | * The return value is guaranteed to be monotonic in that range as | |
129 | * long as there is always less than 582 seconds between successive | |
130 | * calls to this function. | |
131 | * | |
1da177e4 LT |
132 | * ( * 1E9 / 3686400 => * 78125 / 288) |
133 | */ | |
134 | unsigned long long sched_clock(void) | |
135 | { | |
2f1675c1 | 136 | unsigned long long v = cnt32_to_63(OSCR); |
1da177e4 | 137 | |
2f1675c1 NP |
138 | /* the <<1 gets rid of the cnt_32_to_63 top bit saving on a bic insn */ |
139 | v *= 78125<<1; | |
140 | do_div(v, 288<<1); | |
1da177e4 LT |
141 | |
142 | return v; | |
143 | } | |
144 | ||
145 | /* | |
146 | * Default power-off for SA1100 | |
147 | */ | |
148 | static void sa1100_power_off(void) | |
149 | { | |
150 | mdelay(100); | |
151 | local_irq_disable(); | |
152 | /* disable internal oscillator, float CS lines */ | |
153 | PCFR = (PCFR_OPDE | PCFR_FP | PCFR_FS); | |
154 | /* enable wake-up on GPIO0 (Assabet...) */ | |
155 | PWER = GFER = GRER = 1; | |
156 | /* | |
157 | * set scratchpad to zero, just in case it is used as a | |
158 | * restart address by the bootloader. | |
159 | */ | |
160 | PSPR = 0; | |
161 | /* enter sleep mode */ | |
162 | PMCR = PMCR_SF; | |
163 | } | |
164 | ||
165 | static struct resource sa11x0udc_resources[] = { | |
166 | [0] = { | |
167 | .start = 0x80000000, | |
168 | .end = 0x8000ffff, | |
169 | .flags = IORESOURCE_MEM, | |
170 | }, | |
171 | }; | |
172 | ||
173 | static u64 sa11x0udc_dma_mask = 0xffffffffUL; | |
174 | ||
175 | static struct platform_device sa11x0udc_device = { | |
176 | .name = "sa11x0-udc", | |
177 | .id = -1, | |
178 | .dev = { | |
179 | .dma_mask = &sa11x0udc_dma_mask, | |
180 | .coherent_dma_mask = 0xffffffff, | |
181 | }, | |
182 | .num_resources = ARRAY_SIZE(sa11x0udc_resources), | |
183 | .resource = sa11x0udc_resources, | |
184 | }; | |
185 | ||
186 | static struct resource sa11x0uart1_resources[] = { | |
187 | [0] = { | |
188 | .start = 0x80010000, | |
189 | .end = 0x8001ffff, | |
190 | .flags = IORESOURCE_MEM, | |
191 | }, | |
192 | }; | |
193 | ||
194 | static struct platform_device sa11x0uart1_device = { | |
195 | .name = "sa11x0-uart", | |
196 | .id = 1, | |
197 | .num_resources = ARRAY_SIZE(sa11x0uart1_resources), | |
198 | .resource = sa11x0uart1_resources, | |
199 | }; | |
200 | ||
201 | static struct resource sa11x0uart3_resources[] = { | |
202 | [0] = { | |
203 | .start = 0x80050000, | |
204 | .end = 0x8005ffff, | |
205 | .flags = IORESOURCE_MEM, | |
206 | }, | |
207 | }; | |
208 | ||
209 | static struct platform_device sa11x0uart3_device = { | |
210 | .name = "sa11x0-uart", | |
211 | .id = 3, | |
212 | .num_resources = ARRAY_SIZE(sa11x0uart3_resources), | |
213 | .resource = sa11x0uart3_resources, | |
214 | }; | |
215 | ||
216 | static struct resource sa11x0mcp_resources[] = { | |
217 | [0] = { | |
218 | .start = 0x80060000, | |
219 | .end = 0x8006ffff, | |
220 | .flags = IORESOURCE_MEM, | |
221 | }, | |
222 | }; | |
223 | ||
224 | static u64 sa11x0mcp_dma_mask = 0xffffffffUL; | |
225 | ||
226 | static struct platform_device sa11x0mcp_device = { | |
227 | .name = "sa11x0-mcp", | |
228 | .id = -1, | |
229 | .dev = { | |
230 | .dma_mask = &sa11x0mcp_dma_mask, | |
231 | .coherent_dma_mask = 0xffffffff, | |
232 | }, | |
233 | .num_resources = ARRAY_SIZE(sa11x0mcp_resources), | |
234 | .resource = sa11x0mcp_resources, | |
235 | }; | |
236 | ||
323cdfc1 RK |
237 | void sa11x0_set_mcp_data(struct mcp_plat_data *data) |
238 | { | |
239 | sa11x0mcp_device.dev.platform_data = data; | |
240 | } | |
241 | ||
1da177e4 LT |
242 | static struct resource sa11x0ssp_resources[] = { |
243 | [0] = { | |
244 | .start = 0x80070000, | |
245 | .end = 0x8007ffff, | |
246 | .flags = IORESOURCE_MEM, | |
247 | }, | |
248 | }; | |
249 | ||
250 | static u64 sa11x0ssp_dma_mask = 0xffffffffUL; | |
251 | ||
252 | static struct platform_device sa11x0ssp_device = { | |
253 | .name = "sa11x0-ssp", | |
254 | .id = -1, | |
255 | .dev = { | |
256 | .dma_mask = &sa11x0ssp_dma_mask, | |
257 | .coherent_dma_mask = 0xffffffff, | |
258 | }, | |
259 | .num_resources = ARRAY_SIZE(sa11x0ssp_resources), | |
260 | .resource = sa11x0ssp_resources, | |
261 | }; | |
262 | ||
263 | static struct resource sa11x0fb_resources[] = { | |
264 | [0] = { | |
265 | .start = 0xb0100000, | |
266 | .end = 0xb010ffff, | |
267 | .flags = IORESOURCE_MEM, | |
268 | }, | |
269 | [1] = { | |
270 | .start = IRQ_LCD, | |
271 | .end = IRQ_LCD, | |
272 | .flags = IORESOURCE_IRQ, | |
273 | }, | |
274 | }; | |
275 | ||
276 | static struct platform_device sa11x0fb_device = { | |
277 | .name = "sa11x0-fb", | |
278 | .id = -1, | |
279 | .dev = { | |
280 | .coherent_dma_mask = 0xffffffff, | |
281 | }, | |
282 | .num_resources = ARRAY_SIZE(sa11x0fb_resources), | |
283 | .resource = sa11x0fb_resources, | |
284 | }; | |
285 | ||
286 | static struct platform_device sa11x0pcmcia_device = { | |
287 | .name = "sa11x0-pcmcia", | |
288 | .id = -1, | |
289 | }; | |
290 | ||
291 | static struct platform_device sa11x0mtd_device = { | |
292 | .name = "flash", | |
293 | .id = -1, | |
294 | }; | |
295 | ||
296 | void sa11x0_set_flash_data(struct flash_platform_data *flash, | |
297 | struct resource *res, int nr) | |
298 | { | |
14e66f76 | 299 | flash->name = "sa1100"; |
1da177e4 LT |
300 | sa11x0mtd_device.dev.platform_data = flash; |
301 | sa11x0mtd_device.resource = res; | |
302 | sa11x0mtd_device.num_resources = nr; | |
303 | } | |
304 | ||
305 | static struct resource sa11x0ir_resources[] = { | |
306 | { | |
307 | .start = __PREG(Ser2UTCR0), | |
308 | .end = __PREG(Ser2UTCR0) + 0x24 - 1, | |
309 | .flags = IORESOURCE_MEM, | |
310 | }, { | |
311 | .start = __PREG(Ser2HSCR0), | |
312 | .end = __PREG(Ser2HSCR0) + 0x1c - 1, | |
313 | .flags = IORESOURCE_MEM, | |
314 | }, { | |
315 | .start = __PREG(Ser2HSCR2), | |
316 | .end = __PREG(Ser2HSCR2) + 0x04 - 1, | |
317 | .flags = IORESOURCE_MEM, | |
318 | }, { | |
319 | .start = IRQ_Ser2ICP, | |
320 | .end = IRQ_Ser2ICP, | |
321 | .flags = IORESOURCE_IRQ, | |
322 | } | |
323 | }; | |
324 | ||
325 | static struct platform_device sa11x0ir_device = { | |
326 | .name = "sa11x0-ir", | |
327 | .id = -1, | |
328 | .num_resources = ARRAY_SIZE(sa11x0ir_resources), | |
329 | .resource = sa11x0ir_resources, | |
330 | }; | |
331 | ||
332 | void sa11x0_set_irda_data(struct irda_platform_data *irda) | |
333 | { | |
334 | sa11x0ir_device.dev.platform_data = irda; | |
335 | } | |
336 | ||
e842f1c8 RP |
337 | static struct platform_device sa11x0rtc_device = { |
338 | .name = "sa1100-rtc", | |
339 | .id = -1, | |
340 | }; | |
341 | ||
1da177e4 LT |
342 | static struct platform_device *sa11x0_devices[] __initdata = { |
343 | &sa11x0udc_device, | |
344 | &sa11x0uart1_device, | |
345 | &sa11x0uart3_device, | |
346 | &sa11x0mcp_device, | |
347 | &sa11x0ssp_device, | |
348 | &sa11x0pcmcia_device, | |
349 | &sa11x0fb_device, | |
350 | &sa11x0mtd_device, | |
e842f1c8 | 351 | &sa11x0rtc_device, |
1da177e4 LT |
352 | }; |
353 | ||
354 | static int __init sa1100_init(void) | |
355 | { | |
356 | pm_power_off = sa1100_power_off; | |
357 | ||
358 | if (sa11x0ir_device.dev.platform_data) | |
359 | platform_device_register(&sa11x0ir_device); | |
360 | ||
361 | return platform_add_devices(sa11x0_devices, ARRAY_SIZE(sa11x0_devices)); | |
362 | } | |
363 | ||
364 | arch_initcall(sa1100_init); | |
365 | ||
366 | void (*sa1100fb_backlight_power)(int on); | |
367 | void (*sa1100fb_lcd_power)(int on); | |
368 | ||
369 | EXPORT_SYMBOL(sa1100fb_backlight_power); | |
370 | EXPORT_SYMBOL(sa1100fb_lcd_power); | |
371 | ||
372 | ||
373 | /* | |
374 | * Common I/O mapping: | |
375 | * | |
376 | * Typically, static virtual address mappings are as follow: | |
377 | * | |
378 | * 0xf0000000-0xf3ffffff: miscellaneous stuff (CPLDs, etc.) | |
379 | * 0xf4000000-0xf4ffffff: SA-1111 | |
380 | * 0xf5000000-0xf5ffffff: reserved (used by cache flushing area) | |
381 | * 0xf6000000-0xfffeffff: reserved (internal SA1100 IO defined above) | |
382 | * 0xffff0000-0xffff0fff: SA1100 exception vectors | |
383 | * 0xffff2000-0xffff2fff: Minicache copy_user_page area | |
384 | * | |
385 | * Below 0xe8000000 is reserved for vm allocation. | |
386 | * | |
387 | * The machine specific code must provide the extra mapping beside the | |
388 | * default mapping provided here. | |
389 | */ | |
390 | ||
391 | static struct map_desc standard_io_desc[] __initdata = { | |
92519d82 DS |
392 | { /* PCM */ |
393 | .virtual = 0xf8000000, | |
394 | .pfn = __phys_to_pfn(0x80000000), | |
395 | .length = 0x00100000, | |
396 | .type = MT_DEVICE | |
397 | }, { /* SCM */ | |
398 | .virtual = 0xfa000000, | |
399 | .pfn = __phys_to_pfn(0x90000000), | |
400 | .length = 0x00100000, | |
401 | .type = MT_DEVICE | |
402 | }, { /* MER */ | |
403 | .virtual = 0xfc000000, | |
404 | .pfn = __phys_to_pfn(0xa0000000), | |
405 | .length = 0x00100000, | |
406 | .type = MT_DEVICE | |
407 | }, { /* LCD + DMA */ | |
408 | .virtual = 0xfe000000, | |
409 | .pfn = __phys_to_pfn(0xb0000000), | |
410 | .length = 0x00200000, | |
411 | .type = MT_DEVICE | |
412 | }, | |
1da177e4 LT |
413 | }; |
414 | ||
415 | void __init sa1100_map_io(void) | |
416 | { | |
417 | iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc)); | |
418 | } | |
419 | ||
420 | /* | |
421 | * Disable the memory bus request/grant signals on the SA1110 to | |
422 | * ensure that we don't receive spurious memory requests. We set | |
423 | * the MBGNT signal false to ensure the SA1111 doesn't own the | |
424 | * SDRAM bus. | |
425 | */ | |
426 | void __init sa1110_mb_disable(void) | |
427 | { | |
428 | unsigned long flags; | |
429 | ||
430 | local_irq_save(flags); | |
431 | ||
432 | PGSR &= ~GPIO_MBGNT; | |
433 | GPCR = GPIO_MBGNT; | |
434 | GPDR = (GPDR & ~GPIO_MBREQ) | GPIO_MBGNT; | |
435 | ||
436 | GAFR &= ~(GPIO_MBGNT | GPIO_MBREQ); | |
437 | ||
438 | local_irq_restore(flags); | |
439 | } | |
440 | ||
441 | /* | |
442 | * If the system is going to use the SA-1111 DMA engines, set up | |
443 | * the memory bus request/grant pins. | |
444 | */ | |
85e6c7a7 | 445 | void __devinit sa1110_mb_enable(void) |
1da177e4 LT |
446 | { |
447 | unsigned long flags; | |
448 | ||
449 | local_irq_save(flags); | |
450 | ||
451 | PGSR &= ~GPIO_MBGNT; | |
452 | GPCR = GPIO_MBGNT; | |
453 | GPDR = (GPDR & ~GPIO_MBREQ) | GPIO_MBGNT; | |
454 | ||
455 | GAFR |= (GPIO_MBGNT | GPIO_MBREQ); | |
456 | TUCR |= TUCR_MR; | |
457 | ||
458 | local_irq_restore(flags); | |
459 | } | |
460 |