Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * linux/arch/arm/mach-sa1100/neponset.c | |
3 | * | |
4 | */ | |
5 | #include <linux/kernel.h> | |
6 | #include <linux/init.h> | |
1da177e4 LT |
7 | #include <linux/tty.h> |
8 | #include <linux/ioport.h> | |
9 | #include <linux/serial_core.h> | |
d052d1be | 10 | #include <linux/platform_device.h> |
1da177e4 LT |
11 | #include <linux/slab.h> |
12 | ||
a09e64fb | 13 | #include <mach/hardware.h> |
1da177e4 LT |
14 | #include <asm/mach-types.h> |
15 | #include <asm/irq.h> | |
16 | #include <asm/mach/map.h> | |
17 | #include <asm/mach/irq.h> | |
18 | #include <asm/mach/serial_sa1100.h> | |
a09e64fb RK |
19 | #include <mach/assabet.h> |
20 | #include <mach/neponset.h> | |
1da177e4 LT |
21 | #include <asm/hardware/sa1111.h> |
22 | #include <asm/sizes.h> | |
23 | ||
24 | /* | |
25 | * Install handler for Neponset IRQ. Note that we have to loop here | |
26 | * since the ETHERNET and USAR IRQs are level based, and we need to | |
27 | * ensure that the IRQ signal is deasserted before returning. This | |
28 | * is rather unfortunate. | |
29 | */ | |
30 | static void | |
10dd5ce2 | 31 | neponset_irq_handler(unsigned int irq, struct irq_desc *desc) |
1da177e4 LT |
32 | { |
33 | unsigned int irr; | |
34 | ||
35 | while (1) { | |
1da177e4 LT |
36 | /* |
37 | * Acknowledge the parent IRQ. | |
38 | */ | |
39 | desc->chip->ack(irq); | |
40 | ||
41 | /* | |
42 | * Read the interrupt reason register. Let's have all | |
43 | * active IRQ bits high. Note: there is a typo in the | |
44 | * Neponset user's guide for the SA1111 IRR level. | |
45 | */ | |
46 | irr = IRR ^ (IRR_ETHERNET | IRR_USAR); | |
47 | ||
48 | if ((irr & (IRR_ETHERNET | IRR_USAR | IRR_SA1111)) == 0) | |
49 | break; | |
50 | ||
51 | /* | |
52 | * Since there is no individual mask, we have to | |
53 | * mask the parent IRQ. This is safe, since we'll | |
54 | * recheck the register for any pending IRQs. | |
55 | */ | |
56 | if (irr & (IRR_ETHERNET | IRR_USAR)) { | |
57 | desc->chip->mask(irq); | |
58 | ||
d782f33d RK |
59 | /* |
60 | * Ack the interrupt now to prevent re-entering | |
61 | * this neponset handler. Again, this is safe | |
62 | * since we'll check the IRR register prior to | |
63 | * leaving. | |
64 | */ | |
65 | desc->chip->ack(irq); | |
66 | ||
1da177e4 | 67 | if (irr & IRR_ETHERNET) { |
d8aa0251 | 68 | generic_handle_irq(IRQ_NEPONSET_SMC9196); |
1da177e4 LT |
69 | } |
70 | ||
71 | if (irr & IRR_USAR) { | |
d8aa0251 | 72 | generic_handle_irq(IRQ_NEPONSET_USAR); |
1da177e4 LT |
73 | } |
74 | ||
75 | desc->chip->unmask(irq); | |
76 | } | |
77 | ||
78 | if (irr & IRR_SA1111) { | |
d8aa0251 | 79 | generic_handle_irq(IRQ_NEPONSET_SA1111); |
1da177e4 LT |
80 | } |
81 | } | |
82 | } | |
83 | ||
84 | static void neponset_set_mctrl(struct uart_port *port, u_int mctrl) | |
85 | { | |
86 | u_int mdm_ctl0 = MDM_CTL_0; | |
87 | ||
88 | if (port->mapbase == _Ser1UTCR0) { | |
89 | if (mctrl & TIOCM_RTS) | |
90 | mdm_ctl0 &= ~MDM_CTL0_RTS2; | |
91 | else | |
92 | mdm_ctl0 |= MDM_CTL0_RTS2; | |
93 | ||
94 | if (mctrl & TIOCM_DTR) | |
95 | mdm_ctl0 &= ~MDM_CTL0_DTR2; | |
96 | else | |
97 | mdm_ctl0 |= MDM_CTL0_DTR2; | |
98 | } else if (port->mapbase == _Ser3UTCR0) { | |
99 | if (mctrl & TIOCM_RTS) | |
100 | mdm_ctl0 &= ~MDM_CTL0_RTS1; | |
101 | else | |
102 | mdm_ctl0 |= MDM_CTL0_RTS1; | |
103 | ||
104 | if (mctrl & TIOCM_DTR) | |
105 | mdm_ctl0 &= ~MDM_CTL0_DTR1; | |
106 | else | |
107 | mdm_ctl0 |= MDM_CTL0_DTR1; | |
108 | } | |
109 | ||
110 | MDM_CTL_0 = mdm_ctl0; | |
111 | } | |
112 | ||
113 | static u_int neponset_get_mctrl(struct uart_port *port) | |
114 | { | |
115 | u_int ret = TIOCM_CD | TIOCM_CTS | TIOCM_DSR; | |
116 | u_int mdm_ctl1 = MDM_CTL_1; | |
117 | ||
118 | if (port->mapbase == _Ser1UTCR0) { | |
119 | if (mdm_ctl1 & MDM_CTL1_DCD2) | |
120 | ret &= ~TIOCM_CD; | |
121 | if (mdm_ctl1 & MDM_CTL1_CTS2) | |
122 | ret &= ~TIOCM_CTS; | |
123 | if (mdm_ctl1 & MDM_CTL1_DSR2) | |
124 | ret &= ~TIOCM_DSR; | |
125 | } else if (port->mapbase == _Ser3UTCR0) { | |
126 | if (mdm_ctl1 & MDM_CTL1_DCD1) | |
127 | ret &= ~TIOCM_CD; | |
128 | if (mdm_ctl1 & MDM_CTL1_CTS1) | |
129 | ret &= ~TIOCM_CTS; | |
130 | if (mdm_ctl1 & MDM_CTL1_DSR1) | |
131 | ret &= ~TIOCM_DSR; | |
132 | } | |
133 | ||
134 | return ret; | |
135 | } | |
136 | ||
cdea4606 | 137 | static struct sa1100_port_fns neponset_port_fns __devinitdata = { |
1da177e4 LT |
138 | .set_mctrl = neponset_set_mctrl, |
139 | .get_mctrl = neponset_get_mctrl, | |
140 | }; | |
141 | ||
cdea4606 | 142 | static int __devinit neponset_probe(struct platform_device *dev) |
1da177e4 LT |
143 | { |
144 | sa1100_register_uart_fns(&neponset_port_fns); | |
145 | ||
146 | /* | |
147 | * Install handler for GPIO25. | |
148 | */ | |
6cab4860 | 149 | set_irq_type(IRQ_GPIO25, IRQ_TYPE_EDGE_RISING); |
1da177e4 LT |
150 | set_irq_chained_handler(IRQ_GPIO25, neponset_irq_handler); |
151 | ||
152 | /* | |
153 | * We would set IRQ_GPIO25 to be a wake-up IRQ, but | |
154 | * unfortunately something on the Neponset activates | |
155 | * this IRQ on sleep (ethernet?) | |
156 | */ | |
157 | #if 0 | |
158 | enable_irq_wake(IRQ_GPIO25); | |
159 | #endif | |
160 | ||
161 | /* | |
162 | * Setup other Neponset IRQs. SA1111 will be done by the | |
163 | * generic SA1111 code. | |
164 | */ | |
10dd5ce2 | 165 | set_irq_handler(IRQ_NEPONSET_SMC9196, handle_simple_irq); |
1da177e4 | 166 | set_irq_flags(IRQ_NEPONSET_SMC9196, IRQF_VALID | IRQF_PROBE); |
10dd5ce2 | 167 | set_irq_handler(IRQ_NEPONSET_USAR, handle_simple_irq); |
1da177e4 LT |
168 | set_irq_flags(IRQ_NEPONSET_USAR, IRQF_VALID | IRQF_PROBE); |
169 | ||
170 | /* | |
171 | * Disable GPIO 0/1 drivers so the buttons work on the module. | |
172 | */ | |
173 | NCR_0 = NCR_GP01_OFF; | |
174 | ||
175 | return 0; | |
176 | } | |
177 | ||
178 | #ifdef CONFIG_PM | |
179 | ||
180 | /* | |
181 | * LDM power management. | |
182 | */ | |
93160c63 RW |
183 | static unsigned int neponset_saved_state; |
184 | ||
3ae5eaec | 185 | static int neponset_suspend(struct platform_device *dev, pm_message_t state) |
1da177e4 LT |
186 | { |
187 | /* | |
188 | * Save state. | |
189 | */ | |
93160c63 | 190 | neponset_saved_state = NCR_0; |
1da177e4 LT |
191 | |
192 | return 0; | |
193 | } | |
194 | ||
3ae5eaec | 195 | static int neponset_resume(struct platform_device *dev) |
1da177e4 | 196 | { |
93160c63 | 197 | NCR_0 = neponset_saved_state; |
1da177e4 LT |
198 | |
199 | return 0; | |
200 | } | |
201 | ||
202 | #else | |
203 | #define neponset_suspend NULL | |
204 | #define neponset_resume NULL | |
205 | #endif | |
206 | ||
3ae5eaec | 207 | static struct platform_driver neponset_device_driver = { |
1da177e4 LT |
208 | .probe = neponset_probe, |
209 | .suspend = neponset_suspend, | |
210 | .resume = neponset_resume, | |
3ae5eaec RK |
211 | .driver = { |
212 | .name = "neponset", | |
213 | }, | |
1da177e4 LT |
214 | }; |
215 | ||
216 | static struct resource neponset_resources[] = { | |
217 | [0] = { | |
218 | .start = 0x10000000, | |
219 | .end = 0x17ffffff, | |
220 | .flags = IORESOURCE_MEM, | |
221 | }, | |
222 | }; | |
223 | ||
224 | static struct platform_device neponset_device = { | |
225 | .name = "neponset", | |
226 | .id = 0, | |
227 | .num_resources = ARRAY_SIZE(neponset_resources), | |
228 | .resource = neponset_resources, | |
229 | }; | |
230 | ||
231 | static struct resource sa1111_resources[] = { | |
232 | [0] = { | |
233 | .start = 0x40000000, | |
234 | .end = 0x40001fff, | |
235 | .flags = IORESOURCE_MEM, | |
236 | }, | |
237 | [1] = { | |
238 | .start = IRQ_NEPONSET_SA1111, | |
239 | .end = IRQ_NEPONSET_SA1111, | |
240 | .flags = IORESOURCE_IRQ, | |
241 | }, | |
242 | }; | |
243 | ||
244 | static u64 sa1111_dmamask = 0xffffffffUL; | |
245 | ||
246 | static struct platform_device sa1111_device = { | |
247 | .name = "sa1111", | |
248 | .id = 0, | |
249 | .dev = { | |
250 | .dma_mask = &sa1111_dmamask, | |
251 | .coherent_dma_mask = 0xffffffff, | |
252 | }, | |
253 | .num_resources = ARRAY_SIZE(sa1111_resources), | |
254 | .resource = sa1111_resources, | |
255 | }; | |
256 | ||
257 | static struct resource smc91x_resources[] = { | |
258 | [0] = { | |
259 | .name = "smc91x-regs", | |
260 | .start = SA1100_CS3_PHYS, | |
261 | .end = SA1100_CS3_PHYS + 0x01ffffff, | |
262 | .flags = IORESOURCE_MEM, | |
263 | }, | |
264 | [1] = { | |
265 | .start = IRQ_NEPONSET_SMC9196, | |
266 | .end = IRQ_NEPONSET_SMC9196, | |
267 | .flags = IORESOURCE_IRQ, | |
268 | }, | |
269 | [2] = { | |
270 | .name = "smc91x-attrib", | |
271 | .start = SA1100_CS3_PHYS + 0x02000000, | |
272 | .end = SA1100_CS3_PHYS + 0x03ffffff, | |
273 | .flags = IORESOURCE_MEM, | |
274 | }, | |
275 | }; | |
276 | ||
277 | static struct platform_device smc91x_device = { | |
278 | .name = "smc91x", | |
279 | .id = 0, | |
280 | .num_resources = ARRAY_SIZE(smc91x_resources), | |
281 | .resource = smc91x_resources, | |
282 | }; | |
283 | ||
284 | static struct platform_device *devices[] __initdata = { | |
285 | &neponset_device, | |
286 | &sa1111_device, | |
287 | &smc91x_device, | |
288 | }; | |
289 | ||
cdcb81f7 RK |
290 | extern void sa1110_mb_disable(void); |
291 | ||
1da177e4 LT |
292 | static int __init neponset_init(void) |
293 | { | |
3ae5eaec | 294 | platform_driver_register(&neponset_device_driver); |
1da177e4 LT |
295 | |
296 | /* | |
297 | * The Neponset is only present on the Assabet machine type. | |
298 | */ | |
299 | if (!machine_is_assabet()) | |
300 | return -ENODEV; | |
301 | ||
302 | /* | |
303 | * Ensure that the memory bus request/grant signals are setup, | |
304 | * and the grant is held in its inactive state, whether or not | |
305 | * we actually have a Neponset attached. | |
306 | */ | |
307 | sa1110_mb_disable(); | |
308 | ||
309 | if (!machine_has_neponset()) { | |
310 | printk(KERN_DEBUG "Neponset expansion board not present\n"); | |
311 | return -ENODEV; | |
312 | } | |
313 | ||
314 | if (WHOAMI != 0x11) { | |
315 | printk(KERN_WARNING "Neponset board detected, but " | |
316 | "wrong ID: %02x\n", WHOAMI); | |
317 | return -ENODEV; | |
318 | } | |
319 | ||
320 | return platform_add_devices(devices, ARRAY_SIZE(devices)); | |
321 | } | |
322 | ||
323 | subsys_initcall(neponset_init); | |
324 | ||
325 | static struct map_desc neponset_io_desc[] __initdata = { | |
92519d82 DS |
326 | { /* System Registers */ |
327 | .virtual = 0xf3000000, | |
328 | .pfn = __phys_to_pfn(0x10000000), | |
329 | .length = SZ_1M, | |
330 | .type = MT_DEVICE | |
331 | }, { /* SA-1111 */ | |
332 | .virtual = 0xf4000000, | |
333 | .pfn = __phys_to_pfn(0x40000000), | |
334 | .length = SZ_1M, | |
335 | .type = MT_DEVICE | |
336 | } | |
1da177e4 LT |
337 | }; |
338 | ||
339 | void __init neponset_map_io(void) | |
340 | { | |
341 | iotable_init(neponset_io_desc, ARRAY_SIZE(neponset_io_desc)); | |
342 | } |