Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * linux/arch/arm/mach-sa1100/shannon.c | |
3 | */ | |
4 | ||
1da177e4 LT |
5 | #include <linux/init.h> |
6 | #include <linux/device.h> | |
7 | #include <linux/kernel.h> | |
6920b5a7 | 8 | #include <linux/platform_data/sa11x0-serial.h> |
1da177e4 LT |
9 | #include <linux/tty.h> |
10 | #include <linux/mtd/mtd.h> | |
11 | #include <linux/mtd/partitions.h> | |
12 | ||
e1b7a72a RK |
13 | #include <video/sa1100fb.h> |
14 | ||
a09e64fb | 15 | #include <mach/hardware.h> |
1da177e4 LT |
16 | #include <asm/mach-types.h> |
17 | #include <asm/setup.h> | |
18 | ||
19 | #include <asm/mach/arch.h> | |
20 | #include <asm/mach/flash.h> | |
21 | #include <asm/mach/map.h> | |
a1fd844c | 22 | #include <linux/platform_data/mfd-mcp-sa11x0.h> |
a09e64fb | 23 | #include <mach/shannon.h> |
f314f33b | 24 | #include <mach/irqs.h> |
1da177e4 LT |
25 | |
26 | #include "generic.h" | |
27 | ||
28 | static struct mtd_partition shannon_partitions[] = { | |
29 | { | |
30 | .name = "BLOB boot loader", | |
31 | .offset = 0, | |
32 | .size = 0x20000 | |
33 | }, | |
34 | { | |
35 | .name = "kernel", | |
36 | .offset = MTDPART_OFS_APPEND, | |
37 | .size = 0xe0000 | |
38 | }, | |
93982535 | 39 | { |
1da177e4 LT |
40 | .name = "initrd", |
41 | .offset = MTDPART_OFS_APPEND, | |
42 | .size = MTDPART_SIZ_FULL | |
43 | } | |
44 | }; | |
45 | ||
46 | static struct flash_platform_data shannon_flash_data = { | |
47 | .map_name = "cfi_probe", | |
48 | .parts = shannon_partitions, | |
49 | .nr_parts = ARRAY_SIZE(shannon_partitions), | |
50 | }; | |
51 | ||
a181099e RK |
52 | static struct resource shannon_flash_resource = |
53 | DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_4M); | |
1da177e4 | 54 | |
323cdfc1 RK |
55 | static struct mcp_plat_data shannon_mcp_data = { |
56 | .mccr0 = MCCR0_ADM, | |
57 | .sclk_rate = 11981000, | |
58 | }; | |
59 | ||
e1b7a72a RK |
60 | static struct sa1100fb_mach_info shannon_lcd_info = { |
61 | .pixclock = 152500, .bpp = 8, | |
62 | .xres = 640, .yres = 480, | |
63 | ||
64 | .hsync_len = 4, .vsync_len = 3, | |
65 | .left_margin = 2, .upper_margin = 0, | |
66 | .right_margin = 1, .lower_margin = 0, | |
67 | ||
68 | .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, | |
69 | ||
70 | .lccr0 = LCCR0_Color | LCCR0_Dual | LCCR0_Pas, | |
71 | .lccr3 = LCCR3_ACBsDiv(512), | |
72 | }; | |
73 | ||
1da177e4 LT |
74 | static void __init shannon_init(void) |
75 | { | |
e36e26a8 | 76 | sa11x0_ppc_configure_mcp(); |
e1b7a72a | 77 | sa11x0_register_lcd(&shannon_lcd_info); |
7a5b4e16 RK |
78 | sa11x0_register_mtd(&shannon_flash_data, &shannon_flash_resource, 1); |
79 | sa11x0_register_mcp(&shannon_mcp_data); | |
1da177e4 LT |
80 | } |
81 | ||
82 | static void __init shannon_map_io(void) | |
83 | { | |
84 | sa1100_map_io(); | |
85 | ||
86 | sa1100_register_uart(0, 3); | |
87 | sa1100_register_uart(1, 1); | |
88 | ||
89 | Ser1SDCR0 |= SDCR0_SUS; | |
90 | GAFR |= (GPIO_UART_TXD | GPIO_UART_RXD); | |
91 | GPDR |= GPIO_UART_TXD | SHANNON_GPIO_CODEC_RESET; | |
92 | GPDR &= ~GPIO_UART_RXD; | |
93 | PPAR |= PPAR_UPR; | |
94 | ||
95 | /* reset the codec */ | |
96 | GPCR = SHANNON_GPIO_CODEC_RESET; | |
97 | GPSR = SHANNON_GPIO_CODEC_RESET; | |
98 | } | |
99 | ||
100 | MACHINE_START(SHANNON, "Shannon (AKA: Tuxscreen)") | |
17f4425d | 101 | .atag_offset = 0x100, |
e9dea0c6 | 102 | .map_io = shannon_map_io, |
f314f33b | 103 | .nr_irqs = SA1100_NR_IRQS, |
e9dea0c6 | 104 | .init_irq = sa1100_init_irq, |
6bb27d73 | 105 | .init_time = sa1100_timer_init, |
1da177e4 | 106 | .init_machine = shannon_init, |
7fea1ba5 | 107 | .init_late = sa11x0_init_late, |
d9ca5839 | 108 | .restart = sa11x0_restart, |
1da177e4 | 109 | MACHINE_END |