clk: shmobile: r8a7778: Add CPG/MSTP Clock Domain support
[deliverable/linux.git] / arch / arm / mach-shmobile / Kconfig
CommitLineData
bf98c1ea
LP
1config ARCH_SHMOBILE
2 bool
3794705a 3 select ZONE_DMA if ARM_LPAE
bf98c1ea 4
1a950ca5
MD
5config PM_RCAR
6 bool
8bc964aa 7 select PM_GENERIC_DOMAINS if PM
1a950ca5 8
abebbc4a
MD
9config PM_RMOBILE
10 bool
2173fc7c 11 select PM_GENERIC_DOMAINS
abebbc4a 12
57cc67d1
MD
13config ARCH_RCAR_GEN1
14 bool
1a950ca5 15 select PM_RCAR if PM || SMP
57cc67d1
MD
16 select RENESAS_INTC_IRQPIN
17 select SYS_SUPPORTS_SH_TMU
18
0d918433
MD
19config ARCH_RCAR_GEN2
20 bool
1a950ca5 21 select PM_RCAR if PM || SMP
0d918433
MD
22 select RENESAS_IRQC
23 select SYS_SUPPORTS_SH_CMT
950a3f0e 24 select PCI_DOMAINS if PCI
0d918433 25
5784b195
MD
26config ARCH_RMOBILE
27 bool
2173fc7c 28 select PM_RMOBILE if PM
5784b195
MD
29 select SYS_SUPPORTS_SH_CMT
30 select SYS_SUPPORTS_SH_TMU
31
21278aea 32menuconfig ARCH_SHMOBILE_MULTI
0d9fd616 33 bool "Renesas ARM SoCs" if ARCH_MULTI_V7
efacfce5 34 depends on MMU
bf98c1ea 35 select ARCH_SHMOBILE
efacfce5 36 select HAVE_ARM_SCU if SMP
8b7dfa7d 37 select HAVE_ARM_TWD if SMP
efacfce5 38 select ARM_GIC
4a51856b 39 select ARCH_DMA_ADDR_T_64BIT if ARM_LPAE
ce816fa8 40 select NO_IOPORT_MAP
efacfce5
MD
41 select PINCTRL
42 select ARCH_REQUIRE_GPIOLIB
efacfce5
MD
43
44if ARCH_SHMOBILE_MULTI
45
21278aea 46#comment "Renesas ARM SoCs System Type"
efacfce5 47
cbc60e7c
MD
48config ARCH_EMEV2
49 bool "Emma Mobile EV2"
aeb8fb79 50 select SYS_SUPPORTS_EM_STI
cbc60e7c 51
7d91c469
MD
52config ARCH_R7S72100
53 bool "RZ/A1H (R7S72100)"
aeb8fb79 54 select SYS_SUPPORTS_SH_MTU2
7d91c469 55
39695882
UH
56config ARCH_R8A73A4
57 bool "R-Mobile APE6 (R8A73A40)"
58 select ARCH_RMOBILE
59 select RENESAS_IRQC
60
c41215b7
MD
61config ARCH_R8A7740
62 bool "R-Mobile A1 (R8A77400)"
63 select ARCH_RMOBILE
64 select RENESAS_INTC_IRQPIN
65
3915d36f
UH
66config ARCH_R8A7778
67 bool "R-Car M1A (R8A77781)"
68 select ARCH_RCAR_GEN1
69
5016c81b
SH
70config ARCH_R8A7779
71 bool "R-Car H1 (R8A77790)"
57cc67d1 72 select ARCH_RCAR_GEN1
5016c81b 73
0ef3cde4
LP
74config ARCH_R8A7790
75 bool "R-Car H2 (R8A77900)"
0d918433 76 select ARCH_RCAR_GEN2
663fbb52 77 select I2C
0ef3cde4 78
6d75bc64 79config ARCH_R8A7791
13298fbb 80 bool "R-Car M2-W (R8A77910)"
0d918433 81 select ARCH_RCAR_GEN2
663fbb52 82 select I2C
6d75bc64 83
5923abb2
UH
84config ARCH_R8A7794
85 bool "R-Car E2 (R8A77940)"
86 select ARCH_RCAR_GEN2
cbc60e7c 87
8e8bffff
MD
88config ARCH_SH73A0
89 bool "SH-Mobile AG5 (R8A73A00)"
90 select ARCH_RMOBILE
91 select RENESAS_INTC_IRQPIN
92
0d9fd616 93comment "Renesas ARM SoCs Board Type"
7d91c469 94
5016c81b
SH
95config MACH_MARZEN
96 bool "MARZEN board"
97 depends on ARCH_R8A7779
98 select REGULATOR_FIXED_VOLTAGE if REGULATOR
99
0d9fd616 100comment "Renesas ARM SoCs System Configuration"
efacfce5
MD
101endif
102
bf98c1ea 103if ARCH_SHMOBILE_LEGACY
c793c1b0 104
0d9fd616 105comment "Renesas ARM SoCs System Type"
c793c1b0 106
6d9598e2
MD
107config ARCH_SH73A0
108 bool "SH-Mobile AG5 (R8A73A00)"
5784b195 109 select ARCH_RMOBILE
1cdf3702 110 select ARCH_WANT_OPTIONAL_GPIOLIB
6d9598e2 111 select ARM_GIC
99f8bd85 112 select I2C
049d2804 113 select SH_INTC
341eb546 114 select RENESAS_INTC_IRQPIN
6d9598e2 115
6c01ba44
KM
116config ARCH_R8A7740
117 bool "R-Mobile A1 (R8A77400)"
5784b195 118 select ARCH_RMOBILE
b1b3f49c 119 select ARCH_WANT_OPTIONAL_GPIOLIB
0b7d7820 120 select ARM_GIC
0b7d7820 121 select RENESAS_INTC_IRQPIN
6c01ba44 122
ccb7cc74 123config ARCH_R8A7778
45fa9295 124 bool "R-Car M1A (R8A77781)"
57cc67d1 125 select ARCH_RCAR_GEN1
369b00bb 126 select ARCH_WANT_OPTIONAL_GPIOLIB
ccb7cc74 127 select ARM_GIC
6c01ba44 128
f411fade
MD
129config ARCH_R8A7779
130 bool "R-Car H1 (R8A77790)"
57cc67d1 131 select ARCH_RCAR_GEN1
b1b3f49c
RK
132 select ARCH_WANT_OPTIONAL_GPIOLIB
133 select ARM_GIC
f411fade 134
0d9fd616 135comment "Renesas ARM SoCs Board Type"
c793c1b0 136
4d22e564
KM
137config MACH_ARMADILLO800EVA
138 bool "Armadillo-800 EVA board"
139 depends on ARCH_R8A7740
140 select ARCH_REQUIRE_GPIOLIB
34767f8d 141 select REGULATOR_FIXED_VOLTAGE if REGULATOR
6a517b11 142 select SMSC_PHY if SH_ETH
66f72f0c 143 select SND_SOC_WM8978 if SND_SIMPLE_CARD && I2C
b1b3f49c 144 select USE_OF
4d22e564 145
53e42c29
KM
146config MACH_BOCKW
147 bool "BOCK-W platform"
148 depends on ARCH_R8A7778
149 select ARCH_REQUIRE_GPIOLIB
c9996e51 150 select REGULATOR_FIXED_VOLTAGE if REGULATOR
688e6a6d 151 select SND_SOC_AK4554 if SND_SIMPLE_CARD
66f72f0c 152 select SND_SOC_AK4642 if SND_SIMPLE_CARD && I2C
2b2fd275 153 select USE_OF
53e42c29 154
cfa66a81
KM
155config MACH_BOCKW_REFERENCE
156 bool "BOCK-W - Reference Device Tree Implementation"
157 depends on ARCH_R8A7778
158 select ARCH_REQUIRE_GPIOLIB
cfa66a81
KM
159 select REGULATOR_FIXED_VOLTAGE if REGULATOR
160 select USE_OF
161 ---help---
162 Use reference implementation of BockW board support
163 which makes use of device tree at the expense
164 of not supporting a number of devices.
165
166 This is intended to aid developers
167
f411fade
MD
168config MACH_MARZEN
169 bool "MARZEN board"
170 depends on ARCH_R8A7779
19c43fc5 171 select ARCH_REQUIRE_GPIOLIB
34767f8d 172 select REGULATOR_FIXED_VOLTAGE if REGULATOR
7ebbb4ae 173 select USE_OF
f411fade 174
9b93e244
KM
175config MACH_KZM9G
176 bool "KZM-A9-GT board"
177 depends on ARCH_SH73A0
178 select ARCH_REQUIRE_GPIOLIB
34767f8d 179 select REGULATOR_FIXED_VOLTAGE if REGULATOR
b1b3f49c
RK
180 select SND_SOC_AK4642 if SND_SIMPLE_CARD
181 select USE_OF
9b93e244 182
0d9fd616 183comment "Renesas ARM SoCs System Configuration"
c793c1b0 184
7f1e7637
RH
185config CPU_HAS_INTEVT
186 bool
187 default y
188
fd071b66
MD
189config SH_CLK_CPG
190 bool
191
192source "drivers/sh/Kconfig"
193
194endif
195
bf98c1ea 196if ARCH_SHMOBILE
fd071b66 197
c793c1b0
MD
198menu "Timer and clock configuration"
199
5da3e714
MD
200config SHMOBILE_TIMER_HZ
201 int "Kernel HZ (jiffies per second)"
202 range 32 1024
203 default "128"
204 help
205 Allows the configuration of the timer frequency. It is customary
206 to have the timer interrupt run at 1000 Hz or 100 Hz, but in the
207 case of low timer frequencies other values may be more suitable.
0d9fd616
LP
208 Renesas ARM SoC systems using a 32768 Hz RCLK for clock events may
209 want to select a HZ value such as 128 that can evenly divide RCLK.
5da3e714
MD
210 A HZ value that does not divide evenly may cause timer drift.
211
c793c1b0
MD
212endmenu
213
214endif
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