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cfa66a81 KM |
1 | /* |
2 | * Bock-W board support | |
3 | * | |
4 | * Copyright (C) 2013 Renesas Solutions Corp. | |
5 | * Copyright (C) 2013 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License as published by | |
9 | * the Free Software Foundation; version 2 of the License. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program; if not, write to the Free Software | |
18 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | |
19 | */ | |
20 | ||
21 | #include <linux/of_platform.h> | |
22 | #include <linux/pinctrl/machine.h> | |
23 | #include <mach/common.h> | |
24 | #include <mach/r8a7778.h> | |
25 | #include <asm/mach/arch.h> | |
26 | ||
27 | /* | |
28 | * see board-bock.c for checking detail of dip-switch | |
29 | */ | |
30 | ||
31 | static const struct pinctrl_map bockw_pinctrl_map[] = { | |
32 | /* SCIF0 */ | |
33 | PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a7778", | |
34 | "scif0_data_a", "scif0"), | |
35 | PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a7778", | |
36 | "scif0_ctrl", "scif0"), | |
37 | }; | |
38 | ||
90357fcb KM |
39 | #define FPGA 0x18200000 |
40 | #define IRQ0MR 0x30 | |
41 | #define COMCTLR 0x101c | |
cfa66a81 KM |
42 | static void __init bockw_init(void) |
43 | { | |
90357fcb KM |
44 | static void __iomem *fpga; |
45 | ||
cfa66a81 | 46 | r8a7778_clock_init(); |
90357fcb | 47 | r8a7778_init_irq_extpin_dt(1); |
cfa66a81 KM |
48 | |
49 | pinctrl_register_mappings(bockw_pinctrl_map, | |
50 | ARRAY_SIZE(bockw_pinctrl_map)); | |
51 | r8a7778_pinmux_init(); | |
52 | r8a7778_add_dt_devices(); | |
53 | ||
90357fcb KM |
54 | fpga = ioremap_nocache(FPGA, SZ_1M); |
55 | if (fpga) { | |
56 | /* | |
57 | * CAUTION | |
58 | * | |
59 | * IRQ0/1 is cascaded interrupt from FPGA. | |
60 | * it should be cared in the future | |
61 | * Now, it is assuming IRQ0 was used only from SMSC. | |
62 | */ | |
63 | u16 val = ioread16(fpga + IRQ0MR); | |
64 | val &= ~(1 << 4); /* enable SMSC911x */ | |
65 | iowrite16(val, fpga + IRQ0MR); | |
66 | } | |
67 | ||
cfa66a81 KM |
68 | of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); |
69 | } | |
70 | ||
71 | static const char *bockw_boards_compat_dt[] __initdata = { | |
72 | "renesas,bockw-reference", | |
73 | NULL, | |
74 | }; | |
75 | ||
76 | DT_MACHINE_START(BOCKW_DT, "bockw") | |
77 | .init_early = r8a7778_init_delay, | |
78 | .init_irq = r8a7778_init_irq_dt, | |
79 | .init_machine = bockw_init, | |
cfa66a81 KM |
80 | .dt_compat = bockw_boards_compat_dt, |
81 | MACHINE_END |