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53e42c29 KM |
1 | /* |
2 | * Bock-W board support | |
3 | * | |
4 | * Copyright (C) 2013 Renesas Solutions Corp. | |
5 | * Copyright (C) 2013 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License as published by | |
9 | * the Free Software Foundation; version 2 of the License. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program; if not, write to the Free Software | |
18 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | |
19 | */ | |
20 | ||
ca7bb309 KM |
21 | #include <linux/mfd/tmio.h> |
22 | #include <linux/mmc/host.h> | |
111ea179 | 23 | #include <linux/pinctrl/machine.h> |
53e42c29 | 24 | #include <linux/platform_device.h> |
741440e8 KM |
25 | #include <linux/regulator/fixed.h> |
26 | #include <linux/regulator/machine.h> | |
27d5f27e | 27 | #include <linux/smsc911x.h> |
53e42c29 | 28 | #include <mach/common.h> |
27d5f27e | 29 | #include <mach/irqs.h> |
53e42c29 KM |
30 | #include <mach/r8a7778.h> |
31 | #include <asm/mach/arch.h> | |
32 | ||
d998cef3 KM |
33 | /* |
34 | * CN9(Upper side) SCIF/RCAN selection | |
35 | * | |
36 | * 1,4 3,6 | |
37 | * SW40 SCIF RCAN | |
38 | * SW41 SCIF RCAN | |
39 | */ | |
40 | ||
741440e8 KM |
41 | /* Dummy supplies, where voltage doesn't matter */ |
42 | static struct regulator_consumer_supply dummy_supplies[] = { | |
43 | REGULATOR_SUPPLY("vddvario", "smsc911x"), | |
44 | REGULATOR_SUPPLY("vdd33a", "smsc911x"), | |
45 | }; | |
46 | ||
27d5f27e KM |
47 | static struct smsc911x_platform_config smsc911x_data = { |
48 | .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW, | |
49 | .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL, | |
50 | .flags = SMSC911X_USE_32BIT, | |
51 | .phy_interface = PHY_INTERFACE_MODE_MII, | |
52 | }; | |
53 | ||
54 | static struct resource smsc911x_resources[] = { | |
55 | DEFINE_RES_MEM(0x18300000, 0x1000), | |
56 | DEFINE_RES_IRQ(irq_pin(0)), /* IRQ 0 */ | |
57 | }; | |
58 | ||
ca7bb309 KM |
59 | /* SDHI */ |
60 | static struct sh_mobile_sdhi_info sdhi0_info = { | |
61 | .tmio_caps = MMC_CAP_SD_HIGHSPEED, | |
62 | .tmio_ocr_mask = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34, | |
63 | .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT, | |
64 | }; | |
65 | ||
111ea179 KM |
66 | static const struct pinctrl_map bockw_pinctrl_map[] = { |
67 | /* SCIF0 */ | |
68 | PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a7778", | |
69 | "scif0_data_a", "scif0"), | |
70 | PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a7778", | |
71 | "scif0_ctrl", "scif0"), | |
ca7bb309 KM |
72 | /* SDHI0 */ |
73 | PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7778", | |
74 | "sdhi0", "sdhi0"), | |
111ea179 KM |
75 | }; |
76 | ||
44bfe684 | 77 | #define FPGA 0x18200000 |
27d5f27e | 78 | #define IRQ0MR 0x30 |
ca7bb309 KM |
79 | #define PFC 0xfffc0000 |
80 | #define PUPR4 0x110 | |
53e42c29 KM |
81 | static void __init bockw_init(void) |
82 | { | |
44bfe684 | 83 | void __iomem *base; |
27d5f27e | 84 | |
53e42c29 | 85 | r8a7778_clock_init(); |
27d5f27e | 86 | r8a7778_init_irq_extpin(1); |
53e42c29 | 87 | r8a7778_add_standard_devices(); |
27d5f27e | 88 | |
111ea179 KM |
89 | pinctrl_register_mappings(bockw_pinctrl_map, |
90 | ARRAY_SIZE(bockw_pinctrl_map)); | |
91 | r8a7778_pinmux_init(); | |
92 | ||
ca7bb309 | 93 | /* for SMSC */ |
44bfe684 KM |
94 | base = ioremap_nocache(FPGA, SZ_1M); |
95 | if (base) { | |
27d5f27e KM |
96 | /* |
97 | * CAUTION | |
98 | * | |
99 | * IRQ0/1 is cascaded interrupt from FPGA. | |
100 | * it should be cared in the future | |
101 | * Now, it is assuming IRQ0 was used only from SMSC. | |
102 | */ | |
44bfe684 | 103 | u16 val = ioread16(base + IRQ0MR); |
27d5f27e | 104 | val &= ~(1 << 4); /* enable SMSC911x */ |
44bfe684 KM |
105 | iowrite16(val, base + IRQ0MR); |
106 | iounmap(base); | |
27d5f27e | 107 | |
741440e8 KM |
108 | regulator_register_fixed(0, dummy_supplies, |
109 | ARRAY_SIZE(dummy_supplies)); | |
110 | ||
27d5f27e KM |
111 | platform_device_register_resndata( |
112 | &platform_bus, "smsc911x", -1, | |
113 | smsc911x_resources, ARRAY_SIZE(smsc911x_resources), | |
114 | &smsc911x_data, sizeof(smsc911x_data)); | |
115 | } | |
ca7bb309 KM |
116 | |
117 | /* for SDHI */ | |
118 | base = ioremap_nocache(PFC, 0x200); | |
119 | if (base) { | |
120 | /* | |
121 | * FIXME | |
122 | * | |
123 | * SDHI CD/WP pin needs pull-up | |
124 | */ | |
125 | iowrite32(ioread32(base + PUPR4) | (3 << 26), base + PUPR4); | |
126 | iounmap(base); | |
127 | ||
128 | r8a7778_sdhi_init(0, &sdhi0_info); | |
129 | } | |
53e42c29 KM |
130 | } |
131 | ||
132 | static const char *bockw_boards_compat_dt[] __initdata = { | |
133 | "renesas,bockw", | |
134 | NULL, | |
135 | }; | |
136 | ||
137 | DT_MACHINE_START(BOCKW_DT, "bockw") | |
138 | .init_early = r8a7778_init_delay, | |
139 | .init_irq = r8a7778_init_irq_dt, | |
140 | .init_machine = bockw_init, | |
141 | .init_time = shmobile_timer_init, | |
142 | .dt_compat = bockw_boards_compat_dt, | |
143 | MACHINE_END |