[deliverable/linux.git] / arch / arm / mach-shmobile / board-lager.c

/*
 * Lager board support
 *
 * Copyright (C) 2013  Renesas Solutions Corp.
 * Copyright (C) 2013  Magnus Damm
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; version 2 of the License.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
 */

#include <linux/gpio.h>
#include <linux/gpio_keys.h>
#include <linux/input.h>
#include <linux/interrupt.h>
#include <linux/kernel.h>
#include <linux/leds.h>
#include <linux/mmc/host.h>
#include <linux/mmc/sh_mmcif.h>
#include <linux/pinctrl/machine.h>
#include <linux/platform_data/gpio-rcar.h>
#include <linux/platform_data/rcar-du.h>
#include <linux/platform_device.h>
#include <linux/phy.h>
#include <linux/regulator/fixed.h>
#include <linux/regulator/machine.h>
#include <linux/sh_eth.h>
#include <mach/common.h>
#include <mach/irqs.h>
#include <mach/r8a7790.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>

/* DU */
static struct rcar_du_encoder_data lager_du_encoders[] = {
	{
		.type = RCAR_DU_ENCODER_VGA,
		.output = RCAR_DU_OUTPUT_DPAD0,
	}, {
		.type = RCAR_DU_ENCODER_NONE,
		.output = RCAR_DU_OUTPUT_LVDS1,
		.connector.lvds.panel = {
			.width_mm = 210,
			.height_mm = 158,
			.mode = {
				.clock = 65000,
				.hdisplay = 1024,
				.hsync_start = 1048,
				.hsync_end = 1184,
				.htotal = 1344,
				.vdisplay = 768,
				.vsync_start = 771,
				.vsync_end = 777,
				.vtotal = 806,
				.flags = 0,
			},
		},
	},
};

static const struct rcar_du_platform_data lager_du_pdata __initconst = {
	.encoders = lager_du_encoders,
	.num_encoders = ARRAY_SIZE(lager_du_encoders),
};

static const struct resource du_resources[] __initconst = {
	DEFINE_RES_MEM(0xfeb00000, 0x70000),
	DEFINE_RES_MEM_NAMED(0xfeb90000, 0x1c, "lvds.0"),
	DEFINE_RES_MEM_NAMED(0xfeb94000, 0x1c, "lvds.1"),
	DEFINE_RES_IRQ(gic_spi(256)),
	DEFINE_RES_IRQ(gic_spi(268)),
	DEFINE_RES_IRQ(gic_spi(269)),
};

static void __init lager_add_du_device(void)
{
	struct platform_device_info info = {
		.name = "rcar-du-r8a7790",
		.id = -1,
		.res = du_resources,
		.num_res = ARRAY_SIZE(du_resources),
		.data = &lager_du_pdata,
		.size_data = sizeof(lager_du_pdata),
		.dma_mask = DMA_BIT_MASK(32),
	};

	platform_device_register_full(&info);
}

/* LEDS */
static struct gpio_led lager_leds[] = {
	{
		.name		= "led8",
		.gpio		= RCAR_GP_PIN(5, 17),
		.default_state	= LEDS_GPIO_DEFSTATE_ON,
	}, {
		.name		= "led7",
		.gpio		= RCAR_GP_PIN(4, 23),
		.default_state	= LEDS_GPIO_DEFSTATE_ON,
	}, {
		.name		= "led6",
		.gpio		= RCAR_GP_PIN(4, 22),
		.default_state	= LEDS_GPIO_DEFSTATE_ON,
	},
};

static const struct gpio_led_platform_data lager_leds_pdata __initconst = {
	.leds		= lager_leds,
	.num_leds	= ARRAY_SIZE(lager_leds),
};

/* GPIO KEY */
#define GPIO_KEY(c, g, d, ...) \
	{ .code = c, .gpio = g, .desc = d, .active_low = 1 }

static struct gpio_keys_button gpio_buttons[] = {
	GPIO_KEY(KEY_4,		RCAR_GP_PIN(1, 28),	"SW2-pin4"),
	GPIO_KEY(KEY_3,		RCAR_GP_PIN(1, 26),	"SW2-pin3"),
	GPIO_KEY(KEY_2,		RCAR_GP_PIN(1, 24),	"SW2-pin2"),
	GPIO_KEY(KEY_1,		RCAR_GP_PIN(1, 14),	"SW2-pin1"),
};

static const struct gpio_keys_platform_data lager_keys_pdata __initconst = {
	.buttons	= gpio_buttons,
	.nbuttons	= ARRAY_SIZE(gpio_buttons),
};

/* Fixed 3.3V regulator to be used by MMCIF */
static struct regulator_consumer_supply fixed3v3_power_consumers[] =
{
	REGULATOR_SUPPLY("vmmc", "sh_mmcif.1"),
};

/* MMCIF */
static const struct sh_mmcif_plat_data mmcif1_pdata __initconst = {
	.caps		= MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE,
	.clk_ctrl2_present = true,
	.ccs_unsupported = true,
};

static const struct resource mmcif1_resources[] __initconst = {
	DEFINE_RES_MEM_NAMED(0xee220000, 0x80, "MMCIF1"),
	DEFINE_RES_IRQ(gic_spi(170)),
};

/* Ether */
static const struct sh_eth_plat_data ether_pdata __initconst = {
	.phy			= 0x1,
	.edmac_endian		= EDMAC_LITTLE_ENDIAN,
	.phy_interface		= PHY_INTERFACE_MODE_RMII,
	.ether_link_active_low	= 1,
};

static const struct resource ether_resources[] __initconst = {
	DEFINE_RES_MEM(0xee700000, 0x400),
	DEFINE_RES_IRQ(gic_spi(162)),
};

static const struct pinctrl_map lager_pinctrl_map[] = {
	/* DU (CN10: ARGB0, CN13: LVDS) */
	PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7790", "pfc-r8a7790",
				  "du_rgb666", "du"),
	PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7790", "pfc-r8a7790",
				  "du_sync_1", "du"),
	PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7790", "pfc-r8a7790",
				  "du_clk_out_0", "du"),
	/* SCIF0 (CN19: DEBUG SERIAL0) */
	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.6", "pfc-r8a7790",
				  "scif0_data", "scif0"),
	/* SCIF1 (CN20: DEBUG SERIAL1) */
	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.7", "pfc-r8a7790",
				  "scif1_data", "scif1"),
	/* MMCIF1 */
	PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.1", "pfc-r8a7790",
				  "mmc1_data8", "mmc1"),
	PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.1", "pfc-r8a7790",
				  "mmc1_ctrl", "mmc1"),
	/* Ether */
	PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-ether", "pfc-r8a7790",
				  "eth_link", "eth"),
	PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-ether", "pfc-r8a7790",
				  "eth_mdio", "eth"),
	PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-ether", "pfc-r8a7790",
				  "eth_rmii", "eth"),
	PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-ether", "pfc-r8a7790",
				  "intc_irq0", "intc"),
};

static void __init lager_add_standard_devices(void)
{
	r8a7790_clock_init();

	pinctrl_register_mappings(lager_pinctrl_map,
				  ARRAY_SIZE(lager_pinctrl_map));
	r8a7790_pinmux_init();

	r8a7790_add_standard_devices();
	platform_device_register_data(&platform_bus, "leds-gpio", -1,
				      &lager_leds_pdata,
				      sizeof(lager_leds_pdata));
	platform_device_register_data(&platform_bus, "gpio-keys", -1,
				      &lager_keys_pdata,
				      sizeof(lager_keys_pdata));
	regulator_register_always_on(0, "fixed-3.3V", fixed3v3_power_consumers,
				     ARRAY_SIZE(fixed3v3_power_consumers), 3300000);
	platform_device_register_resndata(&platform_bus, "sh_mmcif", 1,
					  mmcif1_resources, ARRAY_SIZE(mmcif1_resources),
					  &mmcif1_pdata, sizeof(mmcif1_pdata));

	platform_device_register_resndata(&platform_bus, "r8a7790-ether", -1,
					  ether_resources,
					  ARRAY_SIZE(ether_resources),
					  &ether_pdata, sizeof(ether_pdata));

	lager_add_du_device();
}

/*
 * Ether LEDs on the Lager board are named LINK and ACTIVE which corresponds
 * to non-default 01 setting of the Micrel KSZ8041 PHY control register 1 bits
 * 14-15. We have to set them back to 01 from the default 00 value each time
 * the PHY is reset. It's also important because the PHY's LED0 signal is
 * connected to SoC's ETH_LINK signal and in the PHY's default mode it will
 * bounce on and off after each packet, which we apparently want to avoid.
 */
static int lager_ksz8041_fixup(struct phy_device *phydev)
{
	u16 phyctrl1 = phy_read(phydev, 0x1e);

	phyctrl1 &= ~0xc000;
	phyctrl1 |= 0x4000;
	return phy_write(phydev, 0x1e, phyctrl1);
}

static void __init lager_init(void)
{
	lager_add_standard_devices();

	phy_register_fixup_for_id("r8a7790-ether-ff:01", lager_ksz8041_fixup);
}

static const char * const lager_boards_compat_dt[] __initconst = {
	"renesas,lager",
	NULL,
};

DT_MACHINE_START(LAGER_DT, "lager")
	.smp		= smp_ops(r8a7790_smp_ops),
	.init_early	= r8a7790_init_early,
	.init_time	= rcar_gen2_timer_init,
	.init_machine	= lager_init,
	.dt_compat	= lager_boards_compat_dt,
MACHINE_END
Commit	Line	Data
3cc828fd MD	1	/*
	2	* Lager board support
	3	*
	4	* Copyright (C) 2013 Renesas Solutions Corp.
	5	* Copyright (C) 2013 Magnus Damm
	6	*
	7	* This program is free software; you can redistribute it and/or modify
	8	* it under the terms of the GNU General Public License as published by
	9	* the Free Software Foundation; version 2 of the License.
	10	*
	11	* This program is distributed in the hope that it will be useful,
	12	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	* GNU General Public License for more details.
	15	*
	16	* You should have received a copy of the GNU General Public License
	17	* along with this program; if not, write to the Free Software
	18	* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
	19	*/
	20
c3842e4f SH	21	#include <linux/gpio.h>
	22	#include <linux/gpio_keys.h>
	23	#include <linux/input.h>
3cc828fd	24	#include <linux/interrupt.h>
3cc828fd	25	#include <linux/kernel.h>
1034f4ee	26	#include <linux/leds.h>
63d0539e GL	27	#include <linux/mmc/host.h>
63d0539e GL	28	#include <linux/mmc/sh_mmcif.h>
e3a28ac2	29	#include <linux/pinctrl/machine.h>
1034f4ee	30	#include <linux/platform_data/gpio-rcar.h>
c75a5afa	31	#include <linux/platform_data/rcar-du.h>
3cc828fd	32	#include <linux/platform_device.h>
48c8b96f	33	#include <linux/phy.h>
63d0539e GL	34	#include <linux/regulator/fixed.h>
63d0539e GL	35	#include <linux/regulator/machine.h>
4901e136	36	#include <linux/sh_eth.h>
3cc828fd	37	#include <mach/common.h>
63d0539e	38	#include <mach/irqs.h>
3cc828fd MD	39	#include <mach/r8a7790.h>
	40	#include <asm/mach-types.h>
	41	#include <asm/mach/arch.h>
	42
c75a5afa LP	43	/* DU */
	44	static struct rcar_du_encoder_data lager_du_encoders[] = {
	45	{
	46	.type = RCAR_DU_ENCODER_VGA,
	47	.output = RCAR_DU_OUTPUT_DPAD0,
	48	}, {
	49	.type = RCAR_DU_ENCODER_NONE,
	50	.output = RCAR_DU_OUTPUT_LVDS1,
	51	.connector.lvds.panel = {
	52	.width_mm = 210,
	53	.height_mm = 158,
	54	.mode = {
	55	.clock = 65000,
	56	.hdisplay = 1024,
	57	.hsync_start = 1048,
	58	.hsync_end = 1184,
	59	.htotal = 1344,
	60	.vdisplay = 768,
	61	.vsync_start = 771,
	62	.vsync_end = 777,
	63	.vtotal = 806,
	64	.flags = 0,
	65	},
	66	},
	67	},
	68	};
	69
	70	static const struct rcar_du_platform_data lager_du_pdata __initconst = {
	71	.encoders = lager_du_encoders,
	72	.num_encoders = ARRAY_SIZE(lager_du_encoders),
	73	};
	74
	75	static const struct resource du_resources[] __initconst = {
	76	DEFINE_RES_MEM(0xfeb00000, 0x70000),
	77	DEFINE_RES_MEM_NAMED(0xfeb90000, 0x1c, "lvds.0"),
	78	DEFINE_RES_MEM_NAMED(0xfeb94000, 0x1c, "lvds.1"),
	79	DEFINE_RES_IRQ(gic_spi(256)),
	80	DEFINE_RES_IRQ(gic_spi(268)),
	81	DEFINE_RES_IRQ(gic_spi(269)),
	82	};
	83
	84	static void __init lager_add_du_device(void)
	85	{
	86	struct platform_device_info info = {
	87	.name = "rcar-du-r8a7790",
	88	.id = -1,
	89	.res = du_resources,
	90	.num_res = ARRAY_SIZE(du_resources),
37bf8103 LP	91	.data = &lager_du_pdata,
37bf8103 LP	92	.size_data = sizeof(lager_du_pdata),
c75a5afa LP	93	.dma_mask = DMA_BIT_MASK(32),
	94	};
	95
	96	platform_device_register_full(&info);
	97	}
	98
1034f4ee SH	99	/* LEDS */
	100	static struct gpio_led lager_leds[] = {
	101	{
	102	.name = "led8",
	103	.gpio = RCAR_GP_PIN(5, 17),
	104	.default_state = LEDS_GPIO_DEFSTATE_ON,
	105	}, {
	106	.name = "led7",
	107	.gpio = RCAR_GP_PIN(4, 23),
	108	.default_state = LEDS_GPIO_DEFSTATE_ON,
	109	}, {
	110	.name = "led6",
	111	.gpio = RCAR_GP_PIN(4, 22),
	112	.default_state = LEDS_GPIO_DEFSTATE_ON,
	113	},
	114	};
	115
27113d63	116	static const struct gpio_led_platform_data lager_leds_pdata __initconst = {
1034f4ee SH	117	.leds = lager_leds,
	118	.num_leds = ARRAY_SIZE(lager_leds),
	119	};
	120
c3842e4f SH	121	/* GPIO KEY */
	122	#define GPIO_KEY(c, g, d, ...) \
	123	{ .code = c, .gpio = g, .desc = d, .active_low = 1 }
	124
a6014693	125	static struct gpio_keys_button gpio_buttons[] = {
c3842e4f SH	126	GPIO_KEY(KEY_4, RCAR_GP_PIN(1, 28), "SW2-pin4"),
	127	GPIO_KEY(KEY_3, RCAR_GP_PIN(1, 26), "SW2-pin3"),
	128	GPIO_KEY(KEY_2, RCAR_GP_PIN(1, 24), "SW2-pin2"),
	129	GPIO_KEY(KEY_1, RCAR_GP_PIN(1, 14), "SW2-pin1"),
	130	};
	131
27113d63	132	static const struct gpio_keys_platform_data lager_keys_pdata __initconst = {
c3842e4f SH	133	.buttons = gpio_buttons,
	134	.nbuttons = ARRAY_SIZE(gpio_buttons),
	135	};
	136
63d0539e GL	137	/* Fixed 3.3V regulator to be used by MMCIF */
	138	static struct regulator_consumer_supply fixed3v3_power_consumers[] =
	139	{
	140	REGULATOR_SUPPLY("vmmc", "sh_mmcif.1"),
	141	};
	142
	143	/* MMCIF */
27113d63	144	static const struct sh_mmcif_plat_data mmcif1_pdata __initconst = {
63d0539e	145	.caps = MMC_CAP_8_BIT_DATA \| MMC_CAP_NONREMOVABLE,
b77c6bce GL	146	.clk_ctrl2_present = true,
b77c6bce GL	147	.ccs_unsupported = true,
63d0539e GL	148	};
63d0539e GL	149
27113d63	150	static const struct resource mmcif1_resources[] __initconst = {
63d0539e GL	151	DEFINE_RES_MEM_NAMED(0xee220000, 0x80, "MMCIF1"),
	152	DEFINE_RES_IRQ(gic_spi(170)),
	153	};
	154
4901e136	155	/* Ether */
27113d63	156	static const struct sh_eth_plat_data ether_pdata __initconst = {
4901e136 SH	157	.phy = 0x1,
4901e136 SH	158	.edmac_endian = EDMAC_LITTLE_ENDIAN,
4901e136 SH	159	.phy_interface = PHY_INTERFACE_MODE_RMII,
	160	.ether_link_active_low = 1,
	161	};
	162
27113d63	163	static const struct resource ether_resources[] __initconst = {
4901e136 SH	164	DEFINE_RES_MEM(0xee700000, 0x400),
	165	DEFINE_RES_IRQ(gic_spi(162)),
	166	};
	167
e3a28ac2	168	static const struct pinctrl_map lager_pinctrl_map[] = {
c75a5afa LP	169	/* DU (CN10: ARGB0, CN13: LVDS) */
	170	PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7790", "pfc-r8a7790",
	171	"du_rgb666", "du"),
	172	PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7790", "pfc-r8a7790",
	173	"du_sync_1", "du"),
	174	PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7790", "pfc-r8a7790",
	175	"du_clk_out_0", "du"),
e3a28ac2 LP	176	/* SCIF0 (CN19: DEBUG SERIAL0) */
	177	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.6", "pfc-r8a7790",
	178	"scif0_data", "scif0"),
	179	/* SCIF1 (CN20: DEBUG SERIAL1) */
	180	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.7", "pfc-r8a7790",
	181	"scif1_data", "scif1"),
63d0539e GL	182	/* MMCIF1 */
	183	PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.1", "pfc-r8a7790",
	184	"mmc1_data8", "mmc1"),
	185	PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.1", "pfc-r8a7790",
	186	"mmc1_ctrl", "mmc1"),
4901e136 SH	187	/* Ether */
	188	PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-ether", "pfc-r8a7790",
	189	"eth_link", "eth"),
	190	PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-ether", "pfc-r8a7790",
	191	"eth_mdio", "eth"),
	192	PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-ether", "pfc-r8a7790",
	193	"eth_rmii", "eth"),
	194	PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-ether", "pfc-r8a7790",
	195	"intc_irq0", "intc"),
e3a28ac2 LP	196	};
e3a28ac2 LP	197
3cc828fd MD	198	static void __init lager_add_standard_devices(void)
	199	{
	200	r8a7790_clock_init();
e3a28ac2 LP	201
	202	pinctrl_register_mappings(lager_pinctrl_map,
	203	ARRAY_SIZE(lager_pinctrl_map));
	204	r8a7790_pinmux_init();
	205
3cc828fd	206	r8a7790_add_standard_devices();
1034f4ee SH	207	platform_device_register_data(&platform_bus, "leds-gpio", -1,
	208	&lager_leds_pdata,
	209	sizeof(lager_leds_pdata));
c3842e4f SH	210	platform_device_register_data(&platform_bus, "gpio-keys", -1,
	211	&lager_keys_pdata,
	212	sizeof(lager_keys_pdata));
63d0539e GL	213	regulator_register_always_on(0, "fixed-3.3V", fixed3v3_power_consumers,
	214	ARRAY_SIZE(fixed3v3_power_consumers), 3300000);
	215	platform_device_register_resndata(&platform_bus, "sh_mmcif", 1,
	216	mmcif1_resources, ARRAY_SIZE(mmcif1_resources),
	217	&mmcif1_pdata, sizeof(mmcif1_pdata));
4901e136 SH	218
	219	platform_device_register_resndata(&platform_bus, "r8a7790-ether", -1,
	220	ether_resources,
	221	ARRAY_SIZE(ether_resources),
	222	&ether_pdata, sizeof(ether_pdata));
c75a5afa LP	223
c75a5afa LP	224	lager_add_du_device();
3cc828fd MD	225	}
3cc828fd MD	226
48c8b96f SS	227	/*
	228	* Ether LEDs on the Lager board are named LINK and ACTIVE which corresponds
	229	* to non-default 01 setting of the Micrel KSZ8041 PHY control register 1 bits
	230	* 14-15. We have to set them back to 01 from the default 00 value each time
	231	* the PHY is reset. It's also important because the PHY's LED0 signal is
	232	* connected to SoC's ETH_LINK signal and in the PHY's default mode it will
	233	* bounce on and off after each packet, which we apparently want to avoid.
	234	*/
	235	static int lager_ksz8041_fixup(struct phy_device *phydev)
	236	{
	237	u16 phyctrl1 = phy_read(phydev, 0x1e);
	238
	239	phyctrl1 &= ~0xc000;
	240	phyctrl1 \|= 0x4000;
	241	return phy_write(phydev, 0x1e, phyctrl1);
	242	}
	243
	244	static void __init lager_init(void)
	245	{
	246	lager_add_standard_devices();
	247
	248	phy_register_fixup_for_id("r8a7790-ether-ff:01", lager_ksz8041_fixup);
	249	}
	250
27113d63	251	static const char * const lager_boards_compat_dt[] __initconst = {
3cc828fd MD	252	"renesas,lager",
	253	NULL,
	254	};
	255
	256	DT_MACHINE_START(LAGER_DT, "lager")
ad09cb83	257	.smp = smp_ops(r8a7790_smp_ops),
0efd7faa	258	.init_early = r8a7790_init_early,
50c517d9	259	.init_time = rcar_gen2_timer_init,
48c8b96f	260	.init_machine = lager_init,
3cc828fd MD	261	.dt_compat = lager_boards_compat_dt,
3cc828fd MD	262	MACHINE_END