ARM: shmobile: armadillo800eva reference: Spelling s/ED/LED/
[deliverable/linux.git] / arch / arm / mach-shmobile / board-lager.c
CommitLineData
3cc828fd
MD
1/*
2 * Lager board support
3 *
5d5a87a5 4 * Copyright (C) 2013-2014 Renesas Solutions Corp.
3cc828fd 5 * Copyright (C) 2013 Magnus Damm
5d5a87a5 6 * Copyright (C) 2014 Cogent Embedded, Inc.
3cc828fd
MD
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 */
21
c3842e4f
SH
22#include <linux/gpio.h>
23#include <linux/gpio_keys.h>
d58922ce 24#include <linux/i2c.h>
c3842e4f 25#include <linux/input.h>
3cc828fd 26#include <linux/interrupt.h>
5812b8b2 27#include <linux/irq.h>
3cc828fd 28#include <linux/kernel.h>
1034f4ee 29#include <linux/leds.h>
40e6a51e 30#include <linux/mfd/tmio.h>
63d0539e
GL
31#include <linux/mmc/host.h>
32#include <linux/mmc/sh_mmcif.h>
40e6a51e 33#include <linux/mmc/sh_mobile_sdhi.h>
e3a28ac2 34#include <linux/pinctrl/machine.h>
094a804a 35#include <linux/platform_data/camera-rcar.h>
1034f4ee 36#include <linux/platform_data/gpio-rcar.h>
c75a5afa 37#include <linux/platform_data/rcar-du.h>
1eabe028 38#include <linux/platform_data/usb-rcar-gen2-phy.h>
3cc828fd 39#include <linux/platform_device.h>
48c8b96f 40#include <linux/phy.h>
be0647d5 41#include <linux/regulator/driver.h>
63d0539e 42#include <linux/regulator/fixed.h>
be0647d5 43#include <linux/regulator/gpio-regulator.h>
63d0539e 44#include <linux/regulator/machine.h>
4901e136 45#include <linux/sh_eth.h>
1eabe028
VB
46#include <linux/usb/phy.h>
47#include <linux/usb/renesas_usbhs.h>
3cc828fd 48#include <mach/r8a7790.h>
094a804a 49#include <media/soc_camera.h>
3cc828fd
MD
50#include <asm/mach-types.h>
51#include <asm/mach/arch.h>
24cf82f4
HCM
52#include <linux/mtd/partitions.h>
53#include <linux/mtd/mtd.h>
54#include <linux/spi/flash.h>
55#include <linux/spi/rspi.h>
56#include <linux/spi/spi.h>
d58922ce
KM
57#include <sound/rcar_snd.h>
58#include <sound/simple_card.h>
fd44aa5e 59#include "common.h"
b6bab126 60#include "irqs.h"
62872989 61#include "rcar-gen2.h"
d58922ce
KM
62
63/*
64 * SSI-AK4643
65 *
66 * SW1: 1: AK4643
67 * 2: CN22
68 * 3: ADV7511
69 *
70 * this command is required when playback.
71 *
72 * # amixer set "LINEOUT Mixer DACL" on
73 */
3cc828fd 74
40e6a51e
KM
75/*
76 * SDHI0 (CN8)
77 *
78 * JP3: pin1
79 * SW20: pin1
80
81 * GP5_24: 1: VDD 3.3V (defult)
82 * 0: VDD 0.0V
83 * GP5_29: 1: VccQ 3.3V (defult)
84 * 0: VccQ 1.8V
85 *
86 */
87
c75a5afa
LP
88/* DU */
89static struct rcar_du_encoder_data lager_du_encoders[] = {
90 {
91 .type = RCAR_DU_ENCODER_VGA,
92 .output = RCAR_DU_OUTPUT_DPAD0,
93 }, {
94 .type = RCAR_DU_ENCODER_NONE,
95 .output = RCAR_DU_OUTPUT_LVDS1,
96 .connector.lvds.panel = {
97 .width_mm = 210,
98 .height_mm = 158,
99 .mode = {
100 .clock = 65000,
101 .hdisplay = 1024,
102 .hsync_start = 1048,
103 .hsync_end = 1184,
104 .htotal = 1344,
105 .vdisplay = 768,
106 .vsync_start = 771,
107 .vsync_end = 777,
108 .vtotal = 806,
109 .flags = 0,
110 },
111 },
112 },
113};
114
115static const struct rcar_du_platform_data lager_du_pdata __initconst = {
116 .encoders = lager_du_encoders,
117 .num_encoders = ARRAY_SIZE(lager_du_encoders),
118};
119
120static const struct resource du_resources[] __initconst = {
121 DEFINE_RES_MEM(0xfeb00000, 0x70000),
122 DEFINE_RES_MEM_NAMED(0xfeb90000, 0x1c, "lvds.0"),
123 DEFINE_RES_MEM_NAMED(0xfeb94000, 0x1c, "lvds.1"),
124 DEFINE_RES_IRQ(gic_spi(256)),
125 DEFINE_RES_IRQ(gic_spi(268)),
126 DEFINE_RES_IRQ(gic_spi(269)),
127};
128
129static void __init lager_add_du_device(void)
130{
131 struct platform_device_info info = {
132 .name = "rcar-du-r8a7790",
133 .id = -1,
134 .res = du_resources,
135 .num_res = ARRAY_SIZE(du_resources),
37bf8103
LP
136 .data = &lager_du_pdata,
137 .size_data = sizeof(lager_du_pdata),
c75a5afa
LP
138 .dma_mask = DMA_BIT_MASK(32),
139 };
140
141 platform_device_register_full(&info);
142}
143
1034f4ee
SH
144/* LEDS */
145static struct gpio_led lager_leds[] = {
146 {
147 .name = "led8",
148 .gpio = RCAR_GP_PIN(5, 17),
149 .default_state = LEDS_GPIO_DEFSTATE_ON,
150 }, {
151 .name = "led7",
152 .gpio = RCAR_GP_PIN(4, 23),
153 .default_state = LEDS_GPIO_DEFSTATE_ON,
154 }, {
155 .name = "led6",
156 .gpio = RCAR_GP_PIN(4, 22),
157 .default_state = LEDS_GPIO_DEFSTATE_ON,
158 },
159};
160
27113d63 161static const struct gpio_led_platform_data lager_leds_pdata __initconst = {
1034f4ee
SH
162 .leds = lager_leds,
163 .num_leds = ARRAY_SIZE(lager_leds),
164};
165
c3842e4f
SH
166/* GPIO KEY */
167#define GPIO_KEY(c, g, d, ...) \
c9fd77d4 168 { .code = c, .gpio = g, .desc = d, .active_low = 1, \
e0554d90 169 .wakeup = 1, .debounce_interval = 20 }
c3842e4f 170
a6014693 171static struct gpio_keys_button gpio_buttons[] = {
c3842e4f
SH
172 GPIO_KEY(KEY_4, RCAR_GP_PIN(1, 28), "SW2-pin4"),
173 GPIO_KEY(KEY_3, RCAR_GP_PIN(1, 26), "SW2-pin3"),
174 GPIO_KEY(KEY_2, RCAR_GP_PIN(1, 24), "SW2-pin2"),
175 GPIO_KEY(KEY_1, RCAR_GP_PIN(1, 14), "SW2-pin1"),
176};
177
27113d63 178static const struct gpio_keys_platform_data lager_keys_pdata __initconst = {
c3842e4f
SH
179 .buttons = gpio_buttons,
180 .nbuttons = ARRAY_SIZE(gpio_buttons),
181};
182
63d0539e
GL
183/* Fixed 3.3V regulator to be used by MMCIF */
184static struct regulator_consumer_supply fixed3v3_power_consumers[] =
185{
186 REGULATOR_SUPPLY("vmmc", "sh_mmcif.1"),
187};
188
be0647d5
KM
189/*
190 * SDHI regulator macro
191 *
192 ** FIXME**
193 * Lager board vqmmc is provided via DA9063 PMIC chip,
194 * and we should use ${LINK}/drivers/mfd/da9063-* driver for it.
195 * but, it doesn't have regulator support at this point.
196 * It uses gpio-regulator for vqmmc as quick-hack.
197 */
198#define SDHI_REGULATOR(idx, vdd_pin, vccq_pin) \
199static struct regulator_consumer_supply vcc_sdhi##idx##_consumer = \
200 REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi." #idx); \
201 \
202static struct regulator_init_data vcc_sdhi##idx##_init_data = { \
203 .constraints = { \
204 .valid_ops_mask = REGULATOR_CHANGE_STATUS, \
205 }, \
206 .consumer_supplies = &vcc_sdhi##idx##_consumer, \
207 .num_consumer_supplies = 1, \
208}; \
209 \
210static const struct fixed_voltage_config vcc_sdhi##idx##_info __initconst = {\
211 .supply_name = "SDHI" #idx "Vcc", \
212 .microvolts = 3300000, \
213 .gpio = vdd_pin, \
214 .enable_high = 1, \
215 .init_data = &vcc_sdhi##idx##_init_data, \
216}; \
217 \
218static struct regulator_consumer_supply vccq_sdhi##idx##_consumer = \
219 REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi." #idx); \
220 \
221static struct regulator_init_data vccq_sdhi##idx##_init_data = { \
222 .constraints = { \
223 .input_uV = 3300000, \
224 .min_uV = 1800000, \
225 .max_uV = 3300000, \
226 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | \
227 REGULATOR_CHANGE_STATUS, \
228 }, \
229 .consumer_supplies = &vccq_sdhi##idx##_consumer, \
230 .num_consumer_supplies = 1, \
231}; \
232 \
233static struct gpio vccq_sdhi##idx##_gpio = \
234 { vccq_pin, GPIOF_OUT_INIT_HIGH, "vccq-sdhi" #idx }; \
235 \
236static struct gpio_regulator_state vccq_sdhi##idx##_states[] = { \
237 { .value = 1800000, .gpios = 0 }, \
238 { .value = 3300000, .gpios = 1 }, \
239}; \
240 \
241static const struct gpio_regulator_config vccq_sdhi##idx##_info __initconst = {\
242 .supply_name = "vqmmc", \
243 .gpios = &vccq_sdhi##idx##_gpio, \
244 .nr_gpios = 1, \
245 .states = vccq_sdhi##idx##_states, \
246 .nr_states = ARRAY_SIZE(vccq_sdhi##idx##_states), \
247 .type = REGULATOR_VOLTAGE, \
248 .init_data = &vccq_sdhi##idx##_init_data, \
249};
250
251SDHI_REGULATOR(0, RCAR_GP_PIN(5, 24), RCAR_GP_PIN(5, 29));
252SDHI_REGULATOR(2, RCAR_GP_PIN(5, 25), RCAR_GP_PIN(5, 30));
253
63d0539e 254/* MMCIF */
27113d63 255static const struct sh_mmcif_plat_data mmcif1_pdata __initconst = {
63d0539e 256 .caps = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE,
b77c6bce
GL
257 .clk_ctrl2_present = true,
258 .ccs_unsupported = true,
63d0539e
GL
259};
260
27113d63 261static const struct resource mmcif1_resources[] __initconst = {
b7b42df6 262 DEFINE_RES_MEM(0xee220000, 0x80),
63d0539e
GL
263 DEFINE_RES_IRQ(gic_spi(170)),
264};
265
4901e136 266/* Ether */
27113d63 267static const struct sh_eth_plat_data ether_pdata __initconst = {
4901e136 268 .phy = 0x1,
5812b8b2 269 .phy_irq = irq_pin(0),
4901e136 270 .edmac_endian = EDMAC_LITTLE_ENDIAN,
4901e136
SH
271 .phy_interface = PHY_INTERFACE_MODE_RMII,
272 .ether_link_active_low = 1,
273};
274
27113d63 275static const struct resource ether_resources[] __initconst = {
4901e136
SH
276 DEFINE_RES_MEM(0xee700000, 0x400),
277 DEFINE_RES_IRQ(gic_spi(162)),
278};
279
5d5a87a5
SS
280static const struct platform_device_info ether_info __initconst = {
281 .parent = &platform_bus,
282 .name = "r8a7790-ether",
283 .id = -1,
284 .res = ether_resources,
285 .num_res = ARRAY_SIZE(ether_resources),
286 .data = &ether_pdata,
287 .size_data = sizeof(ether_pdata),
288 .dma_mask = DMA_BIT_MASK(32),
289};
290
24cf82f4
HCM
291/* SPI Flash memory (Spansion S25FL512SAGMFIG11 64Mb) */
292static struct mtd_partition spi_flash_part[] = {
293 /* Reserved for user loader program, read-only */
294 {
295 .name = "loader",
296 .offset = 0,
297 .size = SZ_256K,
298 .mask_flags = MTD_WRITEABLE,
299 },
300 /* Reserved for user program, read-only */
301 {
302 .name = "user",
303 .offset = MTDPART_OFS_APPEND,
304 .size = SZ_4M,
305 .mask_flags = MTD_WRITEABLE,
306 },
307 /* All else is writable (e.g. JFFS2) */
308 {
309 .name = "flash",
310 .offset = MTDPART_OFS_APPEND,
311 .size = MTDPART_SIZ_FULL,
312 .mask_flags = 0,
313 },
314};
315
d422c451 316static const struct flash_platform_data spi_flash_data = {
24cf82f4
HCM
317 .name = "m25p80",
318 .parts = spi_flash_part,
319 .nr_parts = ARRAY_SIZE(spi_flash_part),
320 .type = "s25fl512s",
321};
322
323static const struct rspi_plat_data qspi_pdata __initconst = {
324 .num_chipselect = 1,
325};
326
327static const struct spi_board_info spi_info[] __initconst = {
328 {
a09b2f0b
GU
329 .modalias = "m25p80",
330 .platform_data = &spi_flash_data,
331 .mode = SPI_MODE_0 | SPI_TX_QUAD | SPI_RX_QUAD,
332 .max_speed_hz = 30000000,
333 .bus_num = 0,
334 .chip_select = 0,
24cf82f4
HCM
335 },
336};
337
338/* QSPI resource */
339static const struct resource qspi_resources[] __initconst = {
340 DEFINE_RES_MEM(0xe6b10000, 0x1000),
a70eda7e 341 DEFINE_RES_IRQ_NAMED(gic_spi(184), "mux"),
24cf82f4
HCM
342};
343
094a804a
VB
344/* VIN */
345static const struct resource vin_resources[] __initconst = {
346 /* VIN0 */
347 DEFINE_RES_MEM(0xe6ef0000, 0x1000),
348 DEFINE_RES_IRQ(gic_spi(188)),
349 /* VIN1 */
350 DEFINE_RES_MEM(0xe6ef1000, 0x1000),
351 DEFINE_RES_IRQ(gic_spi(189)),
352};
353
354static void __init lager_add_vin_device(unsigned idx,
355 struct rcar_vin_platform_data *pdata)
356{
357 struct platform_device_info vin_info = {
358 .parent = &platform_bus,
359 .name = "r8a7790-vin",
360 .id = idx,
361 .res = &vin_resources[idx * 2],
362 .num_res = 2,
363 .dma_mask = DMA_BIT_MASK(32),
364 .data = pdata,
365 .size_data = sizeof(*pdata),
366 };
367
368 BUG_ON(idx > 1);
369
370 platform_device_register_full(&vin_info);
371}
372
373#define LAGER_CAMERA(idx, name, addr, pdata, flag) \
374static struct i2c_board_info i2c_cam##idx##_device = { \
375 I2C_BOARD_INFO(name, addr), \
376}; \
377 \
378static struct rcar_vin_platform_data vin##idx##_pdata = { \
379 .flags = flag, \
380}; \
381 \
382static struct soc_camera_link cam##idx##_link = { \
383 .bus_id = idx, \
384 .board_info = &i2c_cam##idx##_device, \
385 .i2c_adapter_id = 2, \
386 .module_name = name, \
387 .priv = pdata, \
388}
389
390/* Camera 0 is not currently supported due to adv7612 support missing */
391LAGER_CAMERA(1, "adv7180", 0x20, NULL, RCAR_VIN_BT656);
392
393static void __init lager_add_camera1_device(void)
394{
395 platform_device_register_data(&platform_bus, "soc-camera-pdrv", 1,
396 &cam1_link, sizeof(cam1_link));
397 lager_add_vin_device(1, &vin1_pdata);
398}
399
1e0d2c49
VB
400/* SATA1 */
401static const struct resource sata1_resources[] __initconst = {
402 DEFINE_RES_MEM(0xee500000, 0x2000),
403 DEFINE_RES_IRQ(gic_spi(106)),
404};
405
406static const struct platform_device_info sata1_info __initconst = {
407 .parent = &platform_bus,
408 .name = "sata-r8a7790",
409 .id = 1,
410 .res = sata1_resources,
411 .num_res = ARRAY_SIZE(sata1_resources),
412 .dma_mask = DMA_BIT_MASK(32),
413};
414
1eabe028 415/* USBHS */
1eabe028
VB
416static const struct resource usbhs_resources[] __initconst = {
417 DEFINE_RES_MEM(0xe6590000, 0x100),
418 DEFINE_RES_IRQ(gic_spi(107)),
419};
420
421struct usbhs_private {
422 struct renesas_usbhs_platform_info info;
423 struct usb_phy *phy;
424};
425
426#define usbhs_get_priv(pdev) \
427 container_of(renesas_usbhs_get_info(pdev), struct usbhs_private, info)
428
429static int usbhs_power_ctrl(struct platform_device *pdev,
430 void __iomem *base, int enable)
431{
432 struct usbhs_private *priv = usbhs_get_priv(pdev);
433
434 if (!priv->phy)
435 return -ENODEV;
436
437 if (enable) {
438 int retval = usb_phy_init(priv->phy);
439
440 if (!retval)
441 retval = usb_phy_set_suspend(priv->phy, 0);
442 return retval;
443 }
444
445 usb_phy_set_suspend(priv->phy, 1);
446 usb_phy_shutdown(priv->phy);
447 return 0;
448}
449
450static int usbhs_hardware_init(struct platform_device *pdev)
451{
452 struct usbhs_private *priv = usbhs_get_priv(pdev);
453 struct usb_phy *phy;
36be7686
MD
454 int ret;
455
456 /* USB0 Function - use PWEN as GPIO input to detect DIP Switch SW5
457 * setting to avoid VBUS short circuit due to wrong cable.
458 * PWEN should be pulled up high if USB Function is selected by SW5
459 */
460 gpio_request_one(RCAR_GP_PIN(5, 18), GPIOF_IN, NULL); /* USB0_PWEN */
461 if (!gpio_get_value(RCAR_GP_PIN(5, 18))) {
462 pr_warn("Error: USB Function not selected - check SW5 + SW6\n");
463 ret = -ENOTSUPP;
464 goto error;
465 }
1eabe028
VB
466
467 phy = usb_get_phy_dev(&pdev->dev, 0);
36be7686
MD
468 if (IS_ERR(phy)) {
469 ret = PTR_ERR(phy);
470 goto error;
471 }
1eabe028
VB
472
473 priv->phy = phy;
474 return 0;
36be7686
MD
475 error:
476 gpio_free(RCAR_GP_PIN(5, 18));
477 return ret;
1eabe028
VB
478}
479
480static int usbhs_hardware_exit(struct platform_device *pdev)
481{
482 struct usbhs_private *priv = usbhs_get_priv(pdev);
483
484 if (!priv->phy)
485 return 0;
486
487 usb_put_phy(priv->phy);
488 priv->phy = NULL;
36be7686
MD
489
490 gpio_free(RCAR_GP_PIN(5, 18));
1eabe028
VB
491 return 0;
492}
493
494static int usbhs_get_id(struct platform_device *pdev)
495{
496 return USBHS_GADGET;
497}
498
499static u32 lager_usbhs_pipe_type[] = {
500 USB_ENDPOINT_XFER_CONTROL,
501 USB_ENDPOINT_XFER_ISOC,
502 USB_ENDPOINT_XFER_ISOC,
503 USB_ENDPOINT_XFER_BULK,
504 USB_ENDPOINT_XFER_BULK,
505 USB_ENDPOINT_XFER_BULK,
506 USB_ENDPOINT_XFER_INT,
507 USB_ENDPOINT_XFER_INT,
508 USB_ENDPOINT_XFER_INT,
509 USB_ENDPOINT_XFER_BULK,
510 USB_ENDPOINT_XFER_BULK,
511 USB_ENDPOINT_XFER_BULK,
512 USB_ENDPOINT_XFER_BULK,
513 USB_ENDPOINT_XFER_BULK,
514 USB_ENDPOINT_XFER_BULK,
515 USB_ENDPOINT_XFER_BULK,
516};
517
518static struct usbhs_private usbhs_priv __initdata = {
519 .info = {
520 .platform_callback = {
521 .power_ctrl = usbhs_power_ctrl,
522 .hardware_init = usbhs_hardware_init,
523 .hardware_exit = usbhs_hardware_exit,
524 .get_id = usbhs_get_id,
525 },
526 .driver_param = {
527 .buswait_bwait = 4,
528 .pipe_type = lager_usbhs_pipe_type,
529 .pipe_size = ARRAY_SIZE(lager_usbhs_pipe_type),
530 },
531 }
532};
533
534static void __init lager_register_usbhs(void)
535{
536 usb_bind_phy("renesas_usbhs", 0, "usb_phy_rcar_gen2");
537 platform_device_register_resndata(&platform_bus,
538 "renesas_usbhs", -1,
539 usbhs_resources,
540 ARRAY_SIZE(usbhs_resources),
541 &usbhs_priv.info,
542 sizeof(usbhs_priv.info));
543}
1eabe028
VB
544
545/* USBHS PHY */
546static const struct rcar_gen2_phy_platform_data usbhs_phy_pdata __initconst = {
547 .chan0_pci = 0, /* Channel 0 is USBHS */
548 .chan2_pci = 1, /* Channel 2 is PCI USB */
549};
550
551static const struct resource usbhs_phy_resources[] __initconst = {
552 DEFINE_RES_MEM(0xe6590100, 0x100),
553};
554
d58922ce
KM
555/* I2C */
556static struct i2c_board_info i2c2_devices[] = {
557 {
558 I2C_BOARD_INFO("ak4643", 0x12),
559 }
560};
561
562/* Sound */
563static struct resource rsnd_resources[] __initdata = {
564 [RSND_GEN2_SCU] = DEFINE_RES_MEM(0xec500000, 0x1000),
565 [RSND_GEN2_ADG] = DEFINE_RES_MEM(0xec5a0000, 0x100),
566 [RSND_GEN2_SSIU] = DEFINE_RES_MEM(0xec540000, 0x1000),
567 [RSND_GEN2_SSI] = DEFINE_RES_MEM(0xec541000, 0x1280),
568};
569
570static struct rsnd_ssi_platform_info rsnd_ssi[] = {
50f359d7
KM
571 RSND_SSI(0, gic_spi(370), 0),
572 RSND_SSI(0, gic_spi(371), RSND_SSI_CLK_PIN_SHARE),
d58922ce
KM
573};
574
50f359d7 575static struct rsnd_src_platform_info rsnd_src[2] = {
d58922ce
KM
576 /* no member at this point */
577};
578
50f359d7
KM
579static struct rsnd_dai_platform_info rsnd_dai = {
580 .playback = { .ssi = &rsnd_ssi[0], },
581 .capture = { .ssi = &rsnd_ssi[1], },
582};
583
d58922ce
KM
584static struct rcar_snd_info rsnd_info = {
585 .flags = RSND_GEN2,
586 .ssi_info = rsnd_ssi,
587 .ssi_info_nr = ARRAY_SIZE(rsnd_ssi),
50f359d7
KM
588 .src_info = rsnd_src,
589 .src_info_nr = ARRAY_SIZE(rsnd_src),
590 .dai_info = &rsnd_dai,
591 .dai_info_nr = 1,
d58922ce
KM
592};
593
594static struct asoc_simple_card_info rsnd_card_info = {
595 .name = "AK4643",
596 .card = "SSI01-AK4643",
597 .codec = "ak4642-codec.2-0012",
598 .platform = "rcar_sound",
9f85ff84 599 .daifmt = SND_SOC_DAIFMT_LEFT_J | SND_SOC_DAIFMT_CBM_CFM,
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KM
600 .cpu_dai = {
601 .name = "rcar_sound",
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602 },
603 .codec_dai = {
604 .name = "ak4642-hifi",
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KM
605 .sysclk = 11289600,
606 },
607};
608
609static void __init lager_add_rsnd_device(void)
610{
611 struct platform_device_info cardinfo = {
612 .parent = &platform_bus,
613 .name = "asoc-simple-card",
614 .id = -1,
615 .data = &rsnd_card_info,
616 .size_data = sizeof(struct asoc_simple_card_info),
617 .dma_mask = DMA_BIT_MASK(32),
618 };
619
620 i2c_register_board_info(2, i2c2_devices,
621 ARRAY_SIZE(i2c2_devices));
622
623 platform_device_register_resndata(
624 &platform_bus, "rcar_sound", -1,
625 rsnd_resources, ARRAY_SIZE(rsnd_resources),
626 &rsnd_info, sizeof(rsnd_info));
627
628 platform_device_register_full(&cardinfo);
629}
630
40e6a51e
KM
631/* SDHI0 */
632static struct sh_mobile_sdhi_info sdhi0_info __initdata = {
633 .tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
634 MMC_CAP_POWER_OFF_CARD,
635 .tmio_caps2 = MMC_CAP2_NO_MULTI_READ,
636 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT |
637 TMIO_MMC_WRPROTECT_DISABLE,
638};
639
640static struct resource sdhi0_resources[] __initdata = {
641 DEFINE_RES_MEM(0xee100000, 0x200),
642 DEFINE_RES_IRQ(gic_spi(165)),
643};
644
645/* SDHI2 */
646static struct sh_mobile_sdhi_info sdhi2_info __initdata = {
647 .tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
648 MMC_CAP_POWER_OFF_CARD,
649 .tmio_caps2 = MMC_CAP2_NO_MULTI_READ,
650 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT |
651 TMIO_MMC_WRPROTECT_DISABLE,
652};
653
654static struct resource sdhi2_resources[] __initdata = {
655 DEFINE_RES_MEM(0xee140000, 0x100),
656 DEFINE_RES_IRQ(gic_spi(167)),
657};
658
849f7b6c
VB
659/* Internal PCI1 */
660static const struct resource pci1_resources[] __initconst = {
661 DEFINE_RES_MEM(0xee0b0000, 0x10000), /* CFG */
662 DEFINE_RES_MEM(0xee0a0000, 0x10000), /* MEM */
663 DEFINE_RES_IRQ(gic_spi(112)),
664};
665
666static const struct platform_device_info pci1_info __initconst = {
667 .parent = &platform_bus,
668 .name = "pci-rcar-gen2",
669 .id = 1,
670 .res = pci1_resources,
671 .num_res = ARRAY_SIZE(pci1_resources),
672 .dma_mask = DMA_BIT_MASK(32),
673};
674
675static void __init lager_add_usb1_device(void)
676{
677 platform_device_register_full(&pci1_info);
678}
679
680/* Internal PCI2 */
681static const struct resource pci2_resources[] __initconst = {
682 DEFINE_RES_MEM(0xee0d0000, 0x10000), /* CFG */
683 DEFINE_RES_MEM(0xee0c0000, 0x10000), /* MEM */
684 DEFINE_RES_IRQ(gic_spi(113)),
685};
686
687static const struct platform_device_info pci2_info __initconst = {
688 .parent = &platform_bus,
689 .name = "pci-rcar-gen2",
690 .id = 2,
691 .res = pci2_resources,
692 .num_res = ARRAY_SIZE(pci2_resources),
693 .dma_mask = DMA_BIT_MASK(32),
694};
695
696static void __init lager_add_usb2_device(void)
697{
698 platform_device_register_full(&pci2_info);
699}
700
e3a28ac2 701static const struct pinctrl_map lager_pinctrl_map[] = {
c75a5afa
LP
702 /* DU (CN10: ARGB0, CN13: LVDS) */
703 PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7790", "pfc-r8a7790",
704 "du_rgb666", "du"),
705 PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7790", "pfc-r8a7790",
706 "du_sync_1", "du"),
707 PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7790", "pfc-r8a7790",
708 "du_clk_out_0", "du"),
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KM
709 /* I2C2 */
710 PIN_MAP_MUX_GROUP_DEFAULT("i2c-rcar.2", "pfc-r8a7790",
711 "i2c2", "i2c2"),
248deabb
GU
712 /* QSPI */
713 PIN_MAP_MUX_GROUP_DEFAULT("qspi.0", "pfc-r8a7790",
714 "qspi_ctrl", "qspi"),
715 PIN_MAP_MUX_GROUP_DEFAULT("qspi.0", "pfc-r8a7790",
716 "qspi_data4", "qspi"),
e3a28ac2
LP
717 /* SCIF0 (CN19: DEBUG SERIAL0) */
718 PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.6", "pfc-r8a7790",
719 "scif0_data", "scif0"),
720 /* SCIF1 (CN20: DEBUG SERIAL1) */
721 PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.7", "pfc-r8a7790",
722 "scif1_data", "scif1"),
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723 /* SDHI0 */
724 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7790",
725 "sdhi0_data4", "sdhi0"),
726 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7790",
727 "sdhi0_ctrl", "sdhi0"),
728 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7790",
729 "sdhi0_cd", "sdhi0"),
730 /* SDHI2 */
731 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.2", "pfc-r8a7790",
732 "sdhi2_data4", "sdhi2"),
733 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.2", "pfc-r8a7790",
734 "sdhi2_ctrl", "sdhi2"),
735 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.2", "pfc-r8a7790",
736 "sdhi2_cd", "sdhi2"),
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737 /* SSI (CN17: sound) */
738 PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7790",
739 "ssi0129_ctrl", "ssi"),
740 PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7790",
741 "ssi0_data", "ssi"),
742 PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7790",
743 "ssi1_data", "ssi"),
744 PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7790",
745 "audio_clk_a", "audio_clk"),
63d0539e
GL
746 /* MMCIF1 */
747 PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.1", "pfc-r8a7790",
748 "mmc1_data8", "mmc1"),
749 PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.1", "pfc-r8a7790",
750 "mmc1_ctrl", "mmc1"),
4901e136
SH
751 /* Ether */
752 PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-ether", "pfc-r8a7790",
753 "eth_link", "eth"),
754 PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-ether", "pfc-r8a7790",
755 "eth_mdio", "eth"),
756 PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-ether", "pfc-r8a7790",
757 "eth_rmii", "eth"),
758 PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-ether", "pfc-r8a7790",
759 "intc_irq0", "intc"),
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VB
760 /* VIN0 */
761 PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.0", "pfc-r8a7790",
762 "vin0_data24", "vin0"),
763 PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.0", "pfc-r8a7790",
764 "vin0_sync", "vin0"),
765 PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.0", "pfc-r8a7790",
766 "vin0_field", "vin0"),
767 PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.0", "pfc-r8a7790",
768 "vin0_clkenb", "vin0"),
769 PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.0", "pfc-r8a7790",
770 "vin0_clk", "vin0"),
771 /* VIN1 */
772 PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.1", "pfc-r8a7790",
773 "vin1_data8", "vin1"),
774 PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.1", "pfc-r8a7790",
775 "vin1_clk", "vin1"),
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VB
776 /* USB0 */
777 PIN_MAP_MUX_GROUP_DEFAULT("renesas_usbhs", "pfc-r8a7790",
36be7686 778 "usb0_ovc_vbus", "usb0"),
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VB
779 /* USB1 */
780 PIN_MAP_MUX_GROUP_DEFAULT("pci-rcar-gen2.1", "pfc-r8a7790",
781 "usb1", "usb1"),
782 /* USB2 */
783 PIN_MAP_MUX_GROUP_DEFAULT("pci-rcar-gen2.2", "pfc-r8a7790",
784 "usb2", "usb2"),
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LP
785};
786
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MD
787static void __init lager_add_standard_devices(void)
788{
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KM
789 int fixed_regulator_idx = 0;
790 int gpio_regulator_idx = 0;
791
3cc828fd 792 r8a7790_clock_init();
e3a28ac2
LP
793
794 pinctrl_register_mappings(lager_pinctrl_map,
795 ARRAY_SIZE(lager_pinctrl_map));
796 r8a7790_pinmux_init();
797
3cc828fd 798 r8a7790_add_standard_devices();
1034f4ee
SH
799 platform_device_register_data(&platform_bus, "leds-gpio", -1,
800 &lager_leds_pdata,
801 sizeof(lager_leds_pdata));
c3842e4f
SH
802 platform_device_register_data(&platform_bus, "gpio-keys", -1,
803 &lager_keys_pdata,
804 sizeof(lager_keys_pdata));
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KM
805 regulator_register_always_on(fixed_regulator_idx++,
806 "fixed-3.3V", fixed3v3_power_consumers,
63d0539e
GL
807 ARRAY_SIZE(fixed3v3_power_consumers), 3300000);
808 platform_device_register_resndata(&platform_bus, "sh_mmcif", 1,
809 mmcif1_resources, ARRAY_SIZE(mmcif1_resources),
810 &mmcif1_pdata, sizeof(mmcif1_pdata));
4901e136 811
5d5a87a5 812 platform_device_register_full(&ether_info);
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LP
813
814 lager_add_du_device();
24cf82f4
HCM
815
816 platform_device_register_resndata(&platform_bus, "qspi", 0,
817 qspi_resources,
818 ARRAY_SIZE(qspi_resources),
819 &qspi_pdata, sizeof(qspi_pdata));
820 spi_register_board_info(spi_info, ARRAY_SIZE(spi_info));
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KM
821
822 platform_device_register_data(&platform_bus, "reg-fixed-voltage", fixed_regulator_idx++,
823 &vcc_sdhi0_info, sizeof(struct fixed_voltage_config));
824 platform_device_register_data(&platform_bus, "reg-fixed-voltage", fixed_regulator_idx++,
825 &vcc_sdhi2_info, sizeof(struct fixed_voltage_config));
826
827 platform_device_register_data(&platform_bus, "gpio-regulator", gpio_regulator_idx++,
828 &vccq_sdhi0_info, sizeof(struct gpio_regulator_config));
829 platform_device_register_data(&platform_bus, "gpio-regulator", gpio_regulator_idx++,
830 &vccq_sdhi2_info, sizeof(struct gpio_regulator_config));
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VB
831
832 lager_add_camera1_device();
1e0d2c49
VB
833
834 platform_device_register_full(&sata1_info);
1eabe028
VB
835
836 platform_device_register_resndata(&platform_bus, "usb_phy_rcar_gen2",
837 -1, usbhs_phy_resources,
838 ARRAY_SIZE(usbhs_phy_resources),
839 &usbhs_phy_pdata,
840 sizeof(usbhs_phy_pdata));
841 lager_register_usbhs();
849f7b6c
VB
842 lager_add_usb1_device();
843 lager_add_usb2_device();
d58922ce
KM
844
845 lager_add_rsnd_device();
40e6a51e
KM
846
847 platform_device_register_resndata(&platform_bus, "sh_mobile_sdhi", 0,
848 sdhi0_resources, ARRAY_SIZE(sdhi0_resources),
849 &sdhi0_info, sizeof(struct sh_mobile_sdhi_info));
850 platform_device_register_resndata(&platform_bus, "sh_mobile_sdhi", 2,
851 sdhi2_resources, ARRAY_SIZE(sdhi2_resources),
852 &sdhi2_info, sizeof(struct sh_mobile_sdhi_info));
3cc828fd
MD
853}
854
48c8b96f
SS
855/*
856 * Ether LEDs on the Lager board are named LINK and ACTIVE which corresponds
857 * to non-default 01 setting of the Micrel KSZ8041 PHY control register 1 bits
858 * 14-15. We have to set them back to 01 from the default 00 value each time
859 * the PHY is reset. It's also important because the PHY's LED0 signal is
860 * connected to SoC's ETH_LINK signal and in the PHY's default mode it will
861 * bounce on and off after each packet, which we apparently want to avoid.
862 */
863static int lager_ksz8041_fixup(struct phy_device *phydev)
864{
865 u16 phyctrl1 = phy_read(phydev, 0x1e);
866
867 phyctrl1 &= ~0xc000;
868 phyctrl1 |= 0x4000;
869 return phy_write(phydev, 0x1e, phyctrl1);
870}
871
872static void __init lager_init(void)
873{
874 lager_add_standard_devices();
875
5812b8b2
SS
876 irq_set_irq_type(irq_pin(0), IRQ_TYPE_LEVEL_LOW);
877
6802cdc5
SH
878 if (IS_ENABLED(CONFIG_PHYLIB))
879 phy_register_fixup_for_id("r8a7790-ether-ff:01",
880 lager_ksz8041_fixup);
48c8b96f
SS
881}
882
27113d63 883static const char * const lager_boards_compat_dt[] __initconst = {
3cc828fd
MD
884 "renesas,lager",
885 NULL,
886};
887
888DT_MACHINE_START(LAGER_DT, "lager")
ad09cb83 889 .smp = smp_ops(r8a7790_smp_ops),
0efd7faa 890 .init_early = r8a7790_init_early,
50c517d9 891 .init_time = rcar_gen2_timer_init,
48c8b96f 892 .init_machine = lager_init,
3fbbcbdf 893 .init_late = shmobile_init_late,
3cc828fd
MD
894 .dt_compat = lager_boards_compat_dt,
895MACHINE_END
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