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ARM: shmobile: BOCK-W: set proper DMA masks for Ether device
[deliverable/linux.git] / arch / arm / mach-shmobile / board-lager.c
CommitLineData
3cc828fd
MD		 1/*
2 * Lager board support
3 *
4 * Copyright (C) 2013 Renesas Solutions Corp.
5 * Copyright (C) 2013 Magnus Damm
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20
c3842e4f
SH		 21#include <linux/gpio.h>
22#include <linux/gpio_keys.h>
d58922ce 23#include <linux/i2c.h>
c3842e4f 24#include <linux/input.h>
3cc828fd 25#include <linux/interrupt.h>
5812b8b2 26#include <linux/irq.h>
3cc828fd 27#include <linux/kernel.h>
1034f4ee 28#include <linux/leds.h>
40e6a51e 29#include <linux/mfd/tmio.h>
63d0539e
GL		 30#include <linux/mmc/host.h>
31#include <linux/mmc/sh_mmcif.h>
40e6a51e 32#include <linux/mmc/sh_mobile_sdhi.h>
e3a28ac2 33#include <linux/pinctrl/machine.h>
094a804a 34#include <linux/platform_data/camera-rcar.h>
1034f4ee 35#include <linux/platform_data/gpio-rcar.h>
c75a5afa 36#include <linux/platform_data/rcar-du.h>
1eabe028 37#include <linux/platform_data/usb-rcar-gen2-phy.h>
3cc828fd 38#include <linux/platform_device.h>
48c8b96f 39#include <linux/phy.h>
be0647d5 40#include <linux/regulator/driver.h>
63d0539e 41#include <linux/regulator/fixed.h>
be0647d5 42#include <linux/regulator/gpio-regulator.h>
63d0539e 43#include <linux/regulator/machine.h>
4901e136 44#include <linux/sh_eth.h>
1eabe028
VB		 45#include <linux/usb/phy.h>
46#include <linux/usb/renesas_usbhs.h>
3cc828fd 47#include <mach/common.h>
63d0539e 48#include <mach/irqs.h>
3cc828fd 49#include <mach/r8a7790.h>
094a804a 50#include <media/soc_camera.h>
3cc828fd
MD		 51#include <asm/mach-types.h>
52#include <asm/mach/arch.h>
24cf82f4
HCM		 53#include <linux/mtd/partitions.h>
54#include <linux/mtd/mtd.h>
55#include <linux/spi/flash.h>
56#include <linux/spi/rspi.h>
57#include <linux/spi/spi.h>
d58922ce
KM		 58#include <sound/rcar_snd.h>
59#include <sound/simple_card.h>
60
61/*
62 * SSI-AK4643
63 *
64 * SW1: 1: AK4643
65 * 2: CN22
66 * 3: ADV7511
67 *
68 * this command is required when playback.
69 *
70 * # amixer set "LINEOUT Mixer DACL" on
71 */
3cc828fd 72
40e6a51e
KM		 73/*
74 * SDHI0 (CN8)
75 *
76 * JP3: pin1
77 * SW20: pin1
78
79 * GP5_24: 1: VDD 3.3V (defult)
80 * 0: VDD 0.0V
81 * GP5_29: 1: VccQ 3.3V (defult)
82 * 0: VccQ 1.8V
83 *
84 */
85
c75a5afa
LP		 86/* DU */
87static struct rcar_du_encoder_data lager_du_encoders[] = {
88 {
89 .type = RCAR_DU_ENCODER_VGA,
90 .output = RCAR_DU_OUTPUT_DPAD0,
91 }, {
92 .type = RCAR_DU_ENCODER_NONE,
93 .output = RCAR_DU_OUTPUT_LVDS1,
94 .connector.lvds.panel = {
95 .width_mm = 210,
96 .height_mm = 158,
97 .mode = {
98 .clock = 65000,
99 .hdisplay = 1024,
100 .hsync_start = 1048,
101 .hsync_end = 1184,
102 .htotal = 1344,
103 .vdisplay = 768,
104 .vsync_start = 771,
105 .vsync_end = 777,
106 .vtotal = 806,
107 .flags = 0,
108 },
109 },
110 },
111};
112
113static const struct rcar_du_platform_data lager_du_pdata __initconst = {
114 .encoders = lager_du_encoders,
115 .num_encoders = ARRAY_SIZE(lager_du_encoders),
116};
117
118static const struct resource du_resources[] __initconst = {
119 DEFINE_RES_MEM(0xfeb00000, 0x70000),
120 DEFINE_RES_MEM_NAMED(0xfeb90000, 0x1c, "lvds.0"),
121 DEFINE_RES_MEM_NAMED(0xfeb94000, 0x1c, "lvds.1"),
122 DEFINE_RES_IRQ(gic_spi(256)),
123 DEFINE_RES_IRQ(gic_spi(268)),
124 DEFINE_RES_IRQ(gic_spi(269)),
125};
126
127static void __init lager_add_du_device(void)
128{
129 struct platform_device_info info = {
130 .name = "rcar-du-r8a7790",
131 .id = -1,
132 .res = du_resources,
133 .num_res = ARRAY_SIZE(du_resources),
37bf8103
LP		 134 .data = &lager_du_pdata,
135 .size_data = sizeof(lager_du_pdata),
c75a5afa
LP		 136 .dma_mask = DMA_BIT_MASK(32),
137 };
138
139 platform_device_register_full(&info);
140}
141
1034f4ee
SH		 142/* LEDS */
143static struct gpio_led lager_leds[] = {
144 {
145 .name = "led8",
146 .gpio = RCAR_GP_PIN(5, 17),
147 .default_state = LEDS_GPIO_DEFSTATE_ON,
148 }, {
149 .name = "led7",
150 .gpio = RCAR_GP_PIN(4, 23),
151 .default_state = LEDS_GPIO_DEFSTATE_ON,
152 }, {
153 .name = "led6",
154 .gpio = RCAR_GP_PIN(4, 22),
155 .default_state = LEDS_GPIO_DEFSTATE_ON,
156 },
157};
158
27113d63 159static const struct gpio_led_platform_data lager_leds_pdata __initconst = {
1034f4ee
SH		 160 .leds = lager_leds,
161 .num_leds = ARRAY_SIZE(lager_leds),
162};
163
c3842e4f
SH		 164/* GPIO KEY */
165#define GPIO_KEY(c, g, d, ...) \
c9fd77d4 166 { .code = c, .gpio = g, .desc = d, .active_low = 1, \
e0554d90 167 .wakeup = 1, .debounce_interval = 20 }
c3842e4f 168
a6014693 169static struct gpio_keys_button gpio_buttons[] = {
c3842e4f
SH		 170 GPIO_KEY(KEY_4, RCAR_GP_PIN(1, 28), "SW2-pin4"),
171 GPIO_KEY(KEY_3, RCAR_GP_PIN(1, 26), "SW2-pin3"),
172 GPIO_KEY(KEY_2, RCAR_GP_PIN(1, 24), "SW2-pin2"),
173 GPIO_KEY(KEY_1, RCAR_GP_PIN(1, 14), "SW2-pin1"),
174};
175
27113d63 176static const struct gpio_keys_platform_data lager_keys_pdata __initconst = {
c3842e4f
SH		 177 .buttons = gpio_buttons,
178 .nbuttons = ARRAY_SIZE(gpio_buttons),
179};
180
63d0539e
GL		 181/* Fixed 3.3V regulator to be used by MMCIF */
182static struct regulator_consumer_supply fixed3v3_power_consumers[] =
183{
184 REGULATOR_SUPPLY("vmmc", "sh_mmcif.1"),
185};
186
be0647d5
KM		 187/*
188 * SDHI regulator macro
189 *
190 ** FIXME**
191 * Lager board vqmmc is provided via DA9063 PMIC chip,
192 * and we should use ${LINK}/drivers/mfd/da9063-* driver for it.
193 * but, it doesn't have regulator support at this point.
194 * It uses gpio-regulator for vqmmc as quick-hack.
195 */
196#define SDHI_REGULATOR(idx, vdd_pin, vccq_pin) \
197static struct regulator_consumer_supply vcc_sdhi##idx##_consumer = \
198 REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi." #idx); \
199 \
200static struct regulator_init_data vcc_sdhi##idx##_init_data = { \
201 .constraints = { \
202 .valid_ops_mask = REGULATOR_CHANGE_STATUS, \
203 }, \
204 .consumer_supplies = &vcc_sdhi##idx##_consumer, \
205 .num_consumer_supplies = 1, \
206}; \
207 \
208static const struct fixed_voltage_config vcc_sdhi##idx##_info __initconst = {\
209 .supply_name = "SDHI" #idx "Vcc", \
210 .microvolts = 3300000, \
211 .gpio = vdd_pin, \
212 .enable_high = 1, \
213 .init_data = &vcc_sdhi##idx##_init_data, \
214}; \
215 \
216static struct regulator_consumer_supply vccq_sdhi##idx##_consumer = \
217 REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi." #idx); \
218 \
219static struct regulator_init_data vccq_sdhi##idx##_init_data = { \
220 .constraints = { \
221 .input_uV = 3300000, \
222 .min_uV = 1800000, \
223 .max_uV = 3300000, \
224 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | \
225 REGULATOR_CHANGE_STATUS, \
226 }, \
227 .consumer_supplies = &vccq_sdhi##idx##_consumer, \
228 .num_consumer_supplies = 1, \
229}; \
230 \
231static struct gpio vccq_sdhi##idx##_gpio = \
232 { vccq_pin, GPIOF_OUT_INIT_HIGH, "vccq-sdhi" #idx }; \
233 \
234static struct gpio_regulator_state vccq_sdhi##idx##_states[] = { \
235 { .value = 1800000, .gpios = 0 }, \
236 { .value = 3300000, .gpios = 1 }, \
237}; \
238 \
239static const struct gpio_regulator_config vccq_sdhi##idx##_info __initconst = {\
240 .supply_name = "vqmmc", \
241 .gpios = &vccq_sdhi##idx##_gpio, \
242 .nr_gpios = 1, \
243 .states = vccq_sdhi##idx##_states, \
244 .nr_states = ARRAY_SIZE(vccq_sdhi##idx##_states), \
245 .type = REGULATOR_VOLTAGE, \
246 .init_data = &vccq_sdhi##idx##_init_data, \
247};
248
249SDHI_REGULATOR(0, RCAR_GP_PIN(5, 24), RCAR_GP_PIN(5, 29));
250SDHI_REGULATOR(2, RCAR_GP_PIN(5, 25), RCAR_GP_PIN(5, 30));
251
63d0539e 252/* MMCIF */
27113d63 253static const struct sh_mmcif_plat_data mmcif1_pdata __initconst = {
63d0539e 254 .caps = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE,
b77c6bce
GL		 255 .clk_ctrl2_present = true,
256 .ccs_unsupported = true,
63d0539e
GL		 257};
258
27113d63 259static const struct resource mmcif1_resources[] __initconst = {
b7b42df6 260 DEFINE_RES_MEM(0xee220000, 0x80),
63d0539e
GL		 261 DEFINE_RES_IRQ(gic_spi(170)),
262};
263
4901e136 264/* Ether */
27113d63 265static const struct sh_eth_plat_data ether_pdata __initconst = {
4901e136 266 .phy = 0x1,
5812b8b2 267 .phy_irq = irq_pin(0),
4901e136 268 .edmac_endian = EDMAC_LITTLE_ENDIAN,
4901e136
SH		 269 .phy_interface = PHY_INTERFACE_MODE_RMII,
270 .ether_link_active_low = 1,
271};
272
27113d63 273static const struct resource ether_resources[] __initconst = {
4901e136
SH		 274 DEFINE_RES_MEM(0xee700000, 0x400),
275 DEFINE_RES_IRQ(gic_spi(162)),
276};
277
24cf82f4
HCM		 278/* SPI Flash memory (Spansion S25FL512SAGMFIG11 64Mb) */
279static struct mtd_partition spi_flash_part[] = {
280 /* Reserved for user loader program, read-only */
281 {
282 .name = "loader",
283 .offset = 0,
284 .size = SZ_256K,
285 .mask_flags = MTD_WRITEABLE,
286 },
287 /* Reserved for user program, read-only */
288 {
289 .name = "user",
290 .offset = MTDPART_OFS_APPEND,
291 .size = SZ_4M,
292 .mask_flags = MTD_WRITEABLE,
293 },
294 /* All else is writable (e.g. JFFS2) */
295 {
296 .name = "flash",
297 .offset = MTDPART_OFS_APPEND,
298 .size = MTDPART_SIZ_FULL,
299 .mask_flags = 0,
300 },
301};
302
d422c451 303static const struct flash_platform_data spi_flash_data = {
24cf82f4
HCM		 304 .name = "m25p80",
305 .parts = spi_flash_part,
306 .nr_parts = ARRAY_SIZE(spi_flash_part),
307 .type = "s25fl512s",
308};
309
310static const struct rspi_plat_data qspi_pdata __initconst = {
311 .num_chipselect = 1,
312};
313
314static const struct spi_board_info spi_info[] __initconst = {
315 {
316 .modalias = "m25p80",
317 .platform_data = &spi_flash_data,
318 .mode = SPI_MODE_0,
319 .max_speed_hz = 30000000,
320 .bus_num = 0,
321 .chip_select = 0,
322 },
323};
324
325/* QSPI resource */
326static const struct resource qspi_resources[] __initconst = {
327 DEFINE_RES_MEM(0xe6b10000, 0x1000),
a70eda7e 328 DEFINE_RES_IRQ_NAMED(gic_spi(184), "mux"),
24cf82f4
HCM		 329};
330
094a804a
VB		 331/* VIN */
332static const struct resource vin_resources[] __initconst = {
333 /* VIN0 */
334 DEFINE_RES_MEM(0xe6ef0000, 0x1000),
335 DEFINE_RES_IRQ(gic_spi(188)),
336 /* VIN1 */
337 DEFINE_RES_MEM(0xe6ef1000, 0x1000),
338 DEFINE_RES_IRQ(gic_spi(189)),
339};
340
341static void __init lager_add_vin_device(unsigned idx,
342 struct rcar_vin_platform_data *pdata)
343{
344 struct platform_device_info vin_info = {
345 .parent = &platform_bus,
346 .name = "r8a7790-vin",
347 .id = idx,
348 .res = &vin_resources[idx * 2],
349 .num_res = 2,
350 .dma_mask = DMA_BIT_MASK(32),
351 .data = pdata,
352 .size_data = sizeof(*pdata),
353 };
354
355 BUG_ON(idx > 1);
356
357 platform_device_register_full(&vin_info);
358}
359
360#define LAGER_CAMERA(idx, name, addr, pdata, flag) \
361static struct i2c_board_info i2c_cam##idx##_device = { \
362 I2C_BOARD_INFO(name, addr), \
363}; \
364 \
365static struct rcar_vin_platform_data vin##idx##_pdata = { \
366 .flags = flag, \
367}; \
368 \
369static struct soc_camera_link cam##idx##_link = { \
370 .bus_id = idx, \
371 .board_info = &i2c_cam##idx##_device, \
372 .i2c_adapter_id = 2, \
373 .module_name = name, \
374 .priv = pdata, \
375}
376
377/* Camera 0 is not currently supported due to adv7612 support missing */
378LAGER_CAMERA(1, "adv7180", 0x20, NULL, RCAR_VIN_BT656);
379
380static void __init lager_add_camera1_device(void)
381{
382 platform_device_register_data(&platform_bus, "soc-camera-pdrv", 1,
383 &cam1_link, sizeof(cam1_link));
384 lager_add_vin_device(1, &vin1_pdata);
385}
386
1e0d2c49
VB		 387/* SATA1 */
388static const struct resource sata1_resources[] __initconst = {
389 DEFINE_RES_MEM(0xee500000, 0x2000),
390 DEFINE_RES_IRQ(gic_spi(106)),
391};
392
393static const struct platform_device_info sata1_info __initconst = {
394 .parent = &platform_bus,
395 .name = "sata-r8a7790",
396 .id = 1,
397 .res = sata1_resources,
398 .num_res = ARRAY_SIZE(sata1_resources),
399 .dma_mask = DMA_BIT_MASK(32),
400};
401
1eabe028 402/* USBHS */
1eabe028
VB		 403static const struct resource usbhs_resources[] __initconst = {
404 DEFINE_RES_MEM(0xe6590000, 0x100),
405 DEFINE_RES_IRQ(gic_spi(107)),
406};
407
408struct usbhs_private {
409 struct renesas_usbhs_platform_info info;
410 struct usb_phy *phy;
411};
412
413#define usbhs_get_priv(pdev) \
414 container_of(renesas_usbhs_get_info(pdev), struct usbhs_private, info)
415
416static int usbhs_power_ctrl(struct platform_device *pdev,
417 void __iomem *base, int enable)
418{
419 struct usbhs_private *priv = usbhs_get_priv(pdev);
420
421 if (!priv->phy)
422 return -ENODEV;
423
424 if (enable) {
425 int retval = usb_phy_init(priv->phy);
426
427 if (!retval)
428 retval = usb_phy_set_suspend(priv->phy, 0);
429 return retval;
430 }
431
432 usb_phy_set_suspend(priv->phy, 1);
433 usb_phy_shutdown(priv->phy);
434 return 0;
435}
436
437static int usbhs_hardware_init(struct platform_device *pdev)
438{
439 struct usbhs_private *priv = usbhs_get_priv(pdev);
440 struct usb_phy *phy;
36be7686
MD		 441 int ret;
442
443 /* USB0 Function - use PWEN as GPIO input to detect DIP Switch SW5
444 * setting to avoid VBUS short circuit due to wrong cable.
445 * PWEN should be pulled up high if USB Function is selected by SW5
446 */
447 gpio_request_one(RCAR_GP_PIN(5, 18), GPIOF_IN, NULL); /* USB0_PWEN */
448 if (!gpio_get_value(RCAR_GP_PIN(5, 18))) {
449 pr_warn("Error: USB Function not selected - check SW5 + SW6\n");
450 ret = -ENOTSUPP;
451 goto error;
452 }
1eabe028
VB		 453
454 phy = usb_get_phy_dev(&pdev->dev, 0);
36be7686
MD		 455 if (IS_ERR(phy)) {
456 ret = PTR_ERR(phy);
457 goto error;
458 }
1eabe028
VB		 459
460 priv->phy = phy;
461 return 0;
36be7686
MD		 462 error:
463 gpio_free(RCAR_GP_PIN(5, 18));
464 return ret;
1eabe028
VB		 465}
466
467static int usbhs_hardware_exit(struct platform_device *pdev)
468{
469 struct usbhs_private *priv = usbhs_get_priv(pdev);
470
471 if (!priv->phy)
472 return 0;
473
474 usb_put_phy(priv->phy);
475 priv->phy = NULL;
36be7686
MD		 476
477 gpio_free(RCAR_GP_PIN(5, 18));
1eabe028
VB		 478 return 0;
479}
480
481static int usbhs_get_id(struct platform_device *pdev)
482{
483 return USBHS_GADGET;
484}
485
486static u32 lager_usbhs_pipe_type[] = {
487 USB_ENDPOINT_XFER_CONTROL,
488 USB_ENDPOINT_XFER_ISOC,
489 USB_ENDPOINT_XFER_ISOC,
490 USB_ENDPOINT_XFER_BULK,
491 USB_ENDPOINT_XFER_BULK,
492 USB_ENDPOINT_XFER_BULK,
493 USB_ENDPOINT_XFER_INT,
494 USB_ENDPOINT_XFER_INT,
495 USB_ENDPOINT_XFER_INT,
496 USB_ENDPOINT_XFER_BULK,
497 USB_ENDPOINT_XFER_BULK,
498 USB_ENDPOINT_XFER_BULK,
499 USB_ENDPOINT_XFER_BULK,
500 USB_ENDPOINT_XFER_BULK,
501 USB_ENDPOINT_XFER_BULK,
502 USB_ENDPOINT_XFER_BULK,
503};
504
505static struct usbhs_private usbhs_priv __initdata = {
506 .info = {
507 .platform_callback = {
508 .power_ctrl = usbhs_power_ctrl,
509 .hardware_init = usbhs_hardware_init,
510 .hardware_exit = usbhs_hardware_exit,
511 .get_id = usbhs_get_id,
512 },
513 .driver_param = {
514 .buswait_bwait = 4,
515 .pipe_type = lager_usbhs_pipe_type,
516 .pipe_size = ARRAY_SIZE(lager_usbhs_pipe_type),
517 },
518 }
519};
520
521static void __init lager_register_usbhs(void)
522{
523 usb_bind_phy("renesas_usbhs", 0, "usb_phy_rcar_gen2");
524 platform_device_register_resndata(&platform_bus,
525 "renesas_usbhs", -1,
526 usbhs_resources,
527 ARRAY_SIZE(usbhs_resources),
528 &usbhs_priv.info,
529 sizeof(usbhs_priv.info));
530}
1eabe028
VB		 531
532/* USBHS PHY */
533static const struct rcar_gen2_phy_platform_data usbhs_phy_pdata __initconst = {
534 .chan0_pci = 0, /* Channel 0 is USBHS */
535 .chan2_pci = 1, /* Channel 2 is PCI USB */
536};
537
538static const struct resource usbhs_phy_resources[] __initconst = {
539 DEFINE_RES_MEM(0xe6590100, 0x100),
540};
541
d58922ce
KM		 542/* I2C */
543static struct i2c_board_info i2c2_devices[] = {
544 {
545 I2C_BOARD_INFO("ak4643", 0x12),
546 }
547};
548
549/* Sound */
550static struct resource rsnd_resources[] __initdata = {
551 [RSND_GEN2_SCU] = DEFINE_RES_MEM(0xec500000, 0x1000),
552 [RSND_GEN2_ADG] = DEFINE_RES_MEM(0xec5a0000, 0x100),
553 [RSND_GEN2_SSIU] = DEFINE_RES_MEM(0xec540000, 0x1000),
554 [RSND_GEN2_SSI] = DEFINE_RES_MEM(0xec541000, 0x1280),
555};
556
557static struct rsnd_ssi_platform_info rsnd_ssi[] = {
558 RSND_SSI_SET(0, 0, gic_spi(370), RSND_SSI_PLAY),
559 RSND_SSI_SET(0, 0, gic_spi(371), RSND_SSI_CLK_PIN_SHARE),
560};
561
562static struct rsnd_scu_platform_info rsnd_scu[2] = {
563 /* no member at this point */
564};
565
566static struct rcar_snd_info rsnd_info = {
567 .flags = RSND_GEN2,
568 .ssi_info = rsnd_ssi,
569 .ssi_info_nr = ARRAY_SIZE(rsnd_ssi),
570 .scu_info = rsnd_scu,
571 .scu_info_nr = ARRAY_SIZE(rsnd_scu),
572};
573
574static struct asoc_simple_card_info rsnd_card_info = {
575 .name = "AK4643",
576 .card = "SSI01-AK4643",
577 .codec = "ak4642-codec.2-0012",
578 .platform = "rcar_sound",
579 .daifmt = SND_SOC_DAIFMT_LEFT_J,
580 .cpu_dai = {
581 .name = "rcar_sound",
582 .fmt = SND_SOC_DAIFMT_CBS_CFS,
583 },
584 .codec_dai = {
585 .name = "ak4642-hifi",
586 .fmt = SND_SOC_DAIFMT_CBM_CFM,
587 .sysclk = 11289600,
588 },
589};
590
591static void __init lager_add_rsnd_device(void)
592{
593 struct platform_device_info cardinfo = {
594 .parent = &platform_bus,
595 .name = "asoc-simple-card",
596 .id = -1,
597 .data = &rsnd_card_info,
598 .size_data = sizeof(struct asoc_simple_card_info),
599 .dma_mask = DMA_BIT_MASK(32),
600 };
601
602 i2c_register_board_info(2, i2c2_devices,
603 ARRAY_SIZE(i2c2_devices));
604
605 platform_device_register_resndata(
606 &platform_bus, "rcar_sound", -1,
607 rsnd_resources, ARRAY_SIZE(rsnd_resources),
608 &rsnd_info, sizeof(rsnd_info));
609
610 platform_device_register_full(&cardinfo);
611}
612
40e6a51e
KM		 613/* SDHI0 */
614static struct sh_mobile_sdhi_info sdhi0_info __initdata = {
615 .tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
616 MMC_CAP_POWER_OFF_CARD,
617 .tmio_caps2 = MMC_CAP2_NO_MULTI_READ,
618 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT |
619 TMIO_MMC_WRPROTECT_DISABLE,
620};
621
622static struct resource sdhi0_resources[] __initdata = {
623 DEFINE_RES_MEM(0xee100000, 0x200),
624 DEFINE_RES_IRQ(gic_spi(165)),
625};
626
627/* SDHI2 */
628static struct sh_mobile_sdhi_info sdhi2_info __initdata = {
629 .tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
630 MMC_CAP_POWER_OFF_CARD,
631 .tmio_caps2 = MMC_CAP2_NO_MULTI_READ,
632 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT |
633 TMIO_MMC_WRPROTECT_DISABLE,
634};
635
636static struct resource sdhi2_resources[] __initdata = {
637 DEFINE_RES_MEM(0xee140000, 0x100),
638 DEFINE_RES_IRQ(gic_spi(167)),
639};
640
849f7b6c
VB		 641/* Internal PCI1 */
642static const struct resource pci1_resources[] __initconst = {
643 DEFINE_RES_MEM(0xee0b0000, 0x10000), /* CFG */
644 DEFINE_RES_MEM(0xee0a0000, 0x10000), /* MEM */
645 DEFINE_RES_IRQ(gic_spi(112)),
646};
647
648static const struct platform_device_info pci1_info __initconst = {
649 .parent = &platform_bus,
650 .name = "pci-rcar-gen2",
651 .id = 1,
652 .res = pci1_resources,
653 .num_res = ARRAY_SIZE(pci1_resources),
654 .dma_mask = DMA_BIT_MASK(32),
655};
656
657static void __init lager_add_usb1_device(void)
658{
659 platform_device_register_full(&pci1_info);
660}
661
662/* Internal PCI2 */
663static const struct resource pci2_resources[] __initconst = {
664 DEFINE_RES_MEM(0xee0d0000, 0x10000), /* CFG */
665 DEFINE_RES_MEM(0xee0c0000, 0x10000), /* MEM */
666 DEFINE_RES_IRQ(gic_spi(113)),
667};
668
669static const struct platform_device_info pci2_info __initconst = {
670 .parent = &platform_bus,
671 .name = "pci-rcar-gen2",
672 .id = 2,
673 .res = pci2_resources,
674 .num_res = ARRAY_SIZE(pci2_resources),
675 .dma_mask = DMA_BIT_MASK(32),
676};
677
678static void __init lager_add_usb2_device(void)
679{
680 platform_device_register_full(&pci2_info);
681}
682
e3a28ac2 683static const struct pinctrl_map lager_pinctrl_map[] = {
c75a5afa
LP		 684 /* DU (CN10: ARGB0, CN13: LVDS) */
685 PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7790", "pfc-r8a7790",
686 "du_rgb666", "du"),
687 PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7790", "pfc-r8a7790",
688 "du_sync_1", "du"),
689 PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7790", "pfc-r8a7790",
690 "du_clk_out_0", "du"),
d58922ce
KM		 691 /* I2C2 */
692 PIN_MAP_MUX_GROUP_DEFAULT("i2c-rcar.2", "pfc-r8a7790",
693 "i2c2", "i2c2"),
248deabb
GU		 694 /* QSPI */
695 PIN_MAP_MUX_GROUP_DEFAULT("qspi.0", "pfc-r8a7790",
696 "qspi_ctrl", "qspi"),
697 PIN_MAP_MUX_GROUP_DEFAULT("qspi.0", "pfc-r8a7790",
698 "qspi_data4", "qspi"),
e3a28ac2
LP		 699 /* SCIF0 (CN19: DEBUG SERIAL0) */
700 PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.6", "pfc-r8a7790",
701 "scif0_data", "scif0"),
702 /* SCIF1 (CN20: DEBUG SERIAL1) */
703 PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.7", "pfc-r8a7790",
704 "scif1_data", "scif1"),
40e6a51e
KM		 705 /* SDHI0 */
706 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7790",
707 "sdhi0_data4", "sdhi0"),
708 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7790",
709 "sdhi0_ctrl", "sdhi0"),
710 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7790",
711 "sdhi0_cd", "sdhi0"),
712 /* SDHI2 */
713 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.2", "pfc-r8a7790",
714 "sdhi2_data4", "sdhi2"),
715 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.2", "pfc-r8a7790",
716 "sdhi2_ctrl", "sdhi2"),
717 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.2", "pfc-r8a7790",
718 "sdhi2_cd", "sdhi2"),
d58922ce
KM		 719 /* SSI (CN17: sound) */
720 PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7790",
721 "ssi0129_ctrl", "ssi"),
722 PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7790",
723 "ssi0_data", "ssi"),
724 PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7790",
725 "ssi1_data", "ssi"),
726 PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7790",
727 "audio_clk_a", "audio_clk"),
63d0539e
GL		 728 /* MMCIF1 */
729 PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.1", "pfc-r8a7790",
730 "mmc1_data8", "mmc1"),
731 PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.1", "pfc-r8a7790",
732 "mmc1_ctrl", "mmc1"),
4901e136
SH		 733 /* Ether */
734 PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-ether", "pfc-r8a7790",
735 "eth_link", "eth"),
736 PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-ether", "pfc-r8a7790",
737 "eth_mdio", "eth"),
738 PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-ether", "pfc-r8a7790",
739 "eth_rmii", "eth"),
740 PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-ether", "pfc-r8a7790",
741 "intc_irq0", "intc"),
094a804a
VB		 742 /* VIN0 */
743 PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.0", "pfc-r8a7790",
744 "vin0_data24", "vin0"),
745 PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.0", "pfc-r8a7790",
746 "vin0_sync", "vin0"),
747 PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.0", "pfc-r8a7790",
748 "vin0_field", "vin0"),
749 PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.0", "pfc-r8a7790",
750 "vin0_clkenb", "vin0"),
751 PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.0", "pfc-r8a7790",
752 "vin0_clk", "vin0"),
753 /* VIN1 */
754 PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.1", "pfc-r8a7790",
755 "vin1_data8", "vin1"),
756 PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.1", "pfc-r8a7790",
757 "vin1_clk", "vin1"),
1eabe028
VB		 758 /* USB0 */
759 PIN_MAP_MUX_GROUP_DEFAULT("renesas_usbhs", "pfc-r8a7790",
36be7686 760 "usb0_ovc_vbus", "usb0"),
849f7b6c
VB		 761 /* USB1 */
762 PIN_MAP_MUX_GROUP_DEFAULT("pci-rcar-gen2.1", "pfc-r8a7790",
763 "usb1", "usb1"),
764 /* USB2 */
765 PIN_MAP_MUX_GROUP_DEFAULT("pci-rcar-gen2.2", "pfc-r8a7790",
766 "usb2", "usb2"),
e3a28ac2
LP		 767};
768
3cc828fd
MD		 769static void __init lager_add_standard_devices(void)
770{
be0647d5
KM		 771 int fixed_regulator_idx = 0;
772 int gpio_regulator_idx = 0;
773
3cc828fd 774 r8a7790_clock_init();
e3a28ac2
LP		 775
776 pinctrl_register_mappings(lager_pinctrl_map,
777 ARRAY_SIZE(lager_pinctrl_map));
778 r8a7790_pinmux_init();
779
3cc828fd 780 r8a7790_add_standard_devices();
1034f4ee
SH		 781 platform_device_register_data(&platform_bus, "leds-gpio", -1,
782 &lager_leds_pdata,
783 sizeof(lager_leds_pdata));
c3842e4f
SH		 784 platform_device_register_data(&platform_bus, "gpio-keys", -1,
785 &lager_keys_pdata,
786 sizeof(lager_keys_pdata));
be0647d5
KM		 787 regulator_register_always_on(fixed_regulator_idx++,
788 "fixed-3.3V", fixed3v3_power_consumers,
63d0539e
GL		 789 ARRAY_SIZE(fixed3v3_power_consumers), 3300000);
790 platform_device_register_resndata(&platform_bus, "sh_mmcif", 1,
791 mmcif1_resources, ARRAY_SIZE(mmcif1_resources),
792 &mmcif1_pdata, sizeof(mmcif1_pdata));
4901e136
SH		 793
794 platform_device_register_resndata(&platform_bus, "r8a7790-ether", -1,
795 ether_resources,
796 ARRAY_SIZE(ether_resources),
797 &ether_pdata, sizeof(ether_pdata));
c75a5afa
LP		 798
799 lager_add_du_device();
24cf82f4
HCM		 800
801 platform_device_register_resndata(&platform_bus, "qspi", 0,
802 qspi_resources,
803 ARRAY_SIZE(qspi_resources),
804 &qspi_pdata, sizeof(qspi_pdata));
805 spi_register_board_info(spi_info, ARRAY_SIZE(spi_info));
be0647d5
KM		 806
807 platform_device_register_data(&platform_bus, "reg-fixed-voltage", fixed_regulator_idx++,
808 &vcc_sdhi0_info, sizeof(struct fixed_voltage_config));
809 platform_device_register_data(&platform_bus, "reg-fixed-voltage", fixed_regulator_idx++,
810 &vcc_sdhi2_info, sizeof(struct fixed_voltage_config));
811
812 platform_device_register_data(&platform_bus, "gpio-regulator", gpio_regulator_idx++,
813 &vccq_sdhi0_info, sizeof(struct gpio_regulator_config));
814 platform_device_register_data(&platform_bus, "gpio-regulator", gpio_regulator_idx++,
815 &vccq_sdhi2_info, sizeof(struct gpio_regulator_config));
094a804a
VB		 816
817 lager_add_camera1_device();
1e0d2c49
VB		 818
819 platform_device_register_full(&sata1_info);
1eabe028
VB		 820
821 platform_device_register_resndata(&platform_bus, "usb_phy_rcar_gen2",
822 -1, usbhs_phy_resources,
823 ARRAY_SIZE(usbhs_phy_resources),
824 &usbhs_phy_pdata,
825 sizeof(usbhs_phy_pdata));
826 lager_register_usbhs();
849f7b6c
VB		 827 lager_add_usb1_device();
828 lager_add_usb2_device();
d58922ce
KM		 829
830 lager_add_rsnd_device();
40e6a51e
KM		 831
832 platform_device_register_resndata(&platform_bus, "sh_mobile_sdhi", 0,
833 sdhi0_resources, ARRAY_SIZE(sdhi0_resources),
834 &sdhi0_info, sizeof(struct sh_mobile_sdhi_info));
835 platform_device_register_resndata(&platform_bus, "sh_mobile_sdhi", 2,
836 sdhi2_resources, ARRAY_SIZE(sdhi2_resources),
837 &sdhi2_info, sizeof(struct sh_mobile_sdhi_info));
3cc828fd
MD		 838}
839
48c8b96f
SS		 840/*
841 * Ether LEDs on the Lager board are named LINK and ACTIVE which corresponds
842 * to non-default 01 setting of the Micrel KSZ8041 PHY control register 1 bits
843 * 14-15. We have to set them back to 01 from the default 00 value each time
844 * the PHY is reset. It's also important because the PHY's LED0 signal is
845 * connected to SoC's ETH_LINK signal and in the PHY's default mode it will
846 * bounce on and off after each packet, which we apparently want to avoid.
847 */
848static int lager_ksz8041_fixup(struct phy_device *phydev)
849{
850 u16 phyctrl1 = phy_read(phydev, 0x1e);
851
852 phyctrl1 &= ~0xc000;
853 phyctrl1 |= 0x4000;
854 return phy_write(phydev, 0x1e, phyctrl1);
855}
856
857static void __init lager_init(void)
858{
859 lager_add_standard_devices();
860
5812b8b2
SS		 861 irq_set_irq_type(irq_pin(0), IRQ_TYPE_LEVEL_LOW);
862
6802cdc5
SH		 863 if (IS_ENABLED(CONFIG_PHYLIB))
864 phy_register_fixup_for_id("r8a7790-ether-ff:01",
865 lager_ksz8041_fixup);
48c8b96f
SS		 866}
867
27113d63 868static const char * const lager_boards_compat_dt[] __initconst = {
3cc828fd
MD		 869 "renesas,lager",
870 NULL,
871};
872
873DT_MACHINE_START(LAGER_DT, "lager")
ad09cb83 874 .smp = smp_ops(r8a7790_smp_ops),
0efd7faa 875 .init_early = r8a7790_init_early,
50c517d9 876 .init_time = rcar_gen2_timer_init,
48c8b96f 877 .init_machine = lager_init,
3fbbcbdf 878 .init_late = shmobile_init_late,
3cc828fd
MD		 879 .dt_compat = lager_boards_compat_dt,
880MACHINE_END
Linux kernel - Deliverables
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