Commit | Line | Data |
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eccf0607 MD |
1 | /* |
2 | * r8a73a4 clock framework support | |
3 | * | |
4 | * Copyright (C) 2013 Renesas Solutions Corp. | |
5 | * Copyright (C) 2013 Magnus Damm | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License as published by | |
9 | * the Free Software Foundation; version 2 of the License. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program; if not, write to the Free Software | |
18 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | |
19 | */ | |
20 | #include <linux/init.h> | |
21 | #include <linux/io.h> | |
22 | #include <linux/kernel.h> | |
23 | #include <linux/sh_clk.h> | |
24 | #include <linux/clkdev.h> | |
25 | #include <mach/common.h> | |
26 | ||
27 | #define CPG_BASE 0xe6150000 | |
28 | #define CPG_LEN 0x270 | |
29 | ||
30 | #define MPCKCR 0xe6150080 | |
31 | ||
32 | static struct clk_mapping cpg_mapping = { | |
33 | .phys = CPG_BASE, | |
34 | .len = CPG_LEN, | |
35 | }; | |
36 | ||
37 | static struct clk extalr_clk = { | |
38 | .rate = 32768, | |
39 | .mapping = &cpg_mapping, | |
40 | }; | |
41 | ||
42 | static struct clk extal1_clk = { | |
43 | .rate = 26000000, | |
44 | .mapping = &cpg_mapping, | |
45 | }; | |
46 | ||
47 | static struct clk extal2_clk = { | |
48 | .rate = 48000000, | |
49 | .mapping = &cpg_mapping, | |
50 | }; | |
51 | ||
52 | static struct clk *main_clks[] = { | |
53 | &extalr_clk, | |
54 | &extal1_clk, | |
55 | &extal2_clk, | |
56 | }; | |
57 | ||
58 | enum { MSTP_NR }; | |
59 | static struct clk mstp_clks[MSTP_NR] = { | |
60 | }; | |
61 | ||
62 | static struct clk_lookup lookups[] = { | |
63 | }; | |
64 | ||
65 | void __init r8a73a4_clock_init(void) | |
66 | { | |
67 | void __iomem *cpg_base, *reg; | |
68 | int k, ret = 0; | |
69 | ||
70 | /* fix MPCLK to EXTAL2 for now. | |
71 | * this is needed until more detailed clock topology is supported | |
72 | */ | |
73 | cpg_base = ioremap_nocache(CPG_BASE, CPG_LEN); | |
74 | BUG_ON(!cpg_base); | |
75 | reg = cpg_base + (MPCKCR - CPG_BASE); | |
76 | iowrite32(ioread32(reg) | 1 << 7 | 0x0c, reg); /* set CKSEL */ | |
77 | iounmap(cpg_base); | |
78 | ||
79 | for (k = 0; !ret && (k < ARRAY_SIZE(main_clks)); k++) | |
80 | ret = clk_register(main_clks[k]); | |
81 | ||
82 | if (!ret) | |
83 | ret = sh_clk_mstp_register(mstp_clks, MSTP_NR); | |
84 | ||
85 | clkdev_add_table(lookups, ARRAY_SIZE(lookups)); | |
86 | ||
87 | if (!ret) | |
88 | shmobile_clk_init(); | |
89 | else | |
90 | panic("failed to setup r8a73a4 clocks\n"); | |
91 | } |