Commit | Line | Data |
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a48f1655 HN |
1 | /* |
2 | * r8a7790 Power management support | |
3 | * | |
4 | * Copyright (C) 2013 Renesas Electronics Corporation | |
5 | * Copyright (C) 2011 Renesas Solutions Corp. | |
6 | * Copyright (C) 2011 Magnus Damm | |
7 | * | |
8 | * This file is subject to the terms and conditions of the GNU General Public | |
9 | * License. See the file "COPYING" in the main directory of this archive | |
10 | * for more details. | |
11 | */ | |
12 | ||
13 | #include <linux/kernel.h> | |
07ce9dfa | 14 | #include <linux/smp.h> |
a48f1655 | 15 | #include <asm/io.h> |
07ce9dfa | 16 | #include "common.h" |
585c09df | 17 | #include "pm-rcar.h" |
fccae893 | 18 | #include "r8a7790.h" |
a48f1655 | 19 | |
07ce9dfa MD |
20 | /* RST */ |
21 | #define RST 0xe6160000 | |
22 | #define CA15BAR 0x0020 | |
23 | #define CA7BAR 0x0030 | |
24 | #define CA15RESCNT 0x0040 | |
25 | #define CA7RESCNT 0x0044 | |
26 | ||
27 | /* On-chip RAM */ | |
28 | #define MERAM 0xe8080000 | |
29 | ||
a48f1655 HN |
30 | /* SYSC */ |
31 | #define SYSCIER 0x0c | |
32 | #define SYSCIMR 0x10 | |
33 | ||
34 | #if defined(CONFIG_SMP) | |
35 | ||
36 | static void __init r8a7790_sysc_init(void) | |
37 | { | |
38 | void __iomem *base = rcar_sysc_init(0xe6180000); | |
39 | ||
40 | /* enable all interrupt sources, but do not use interrupt handler */ | |
41 | iowrite32(0x0131000e, base + SYSCIER); | |
42 | iowrite32(0, base + SYSCIMR); | |
43 | } | |
44 | ||
45 | #else /* CONFIG_SMP */ | |
46 | ||
47 | static inline void r8a7790_sysc_init(void) {} | |
48 | ||
49 | #endif /* CONFIG_SMP */ | |
50 | ||
51 | void __init r8a7790_pm_init(void) | |
52 | { | |
07ce9dfa MD |
53 | void __iomem *p; |
54 | u32 bar; | |
a48f1655 HN |
55 | static int once; |
56 | ||
07ce9dfa MD |
57 | if (once++) |
58 | return; | |
59 | ||
60 | /* MERAM for jump stub, because BAR requires 256KB aligned address */ | |
61 | p = ioremap_nocache(MERAM, shmobile_boot_size); | |
62 | memcpy_toio(p, shmobile_boot_vector, shmobile_boot_size); | |
63 | iounmap(p); | |
64 | ||
65 | /* setup reset vectors */ | |
66 | p = ioremap_nocache(RST, 0x63); | |
67 | bar = (MERAM >> 8) & 0xfffffc00; | |
68 | writel_relaxed(bar, p + CA15BAR); | |
69 | writel_relaxed(bar, p + CA7BAR); | |
70 | writel_relaxed(bar | 0x10, p + CA15BAR); | |
71 | writel_relaxed(bar | 0x10, p + CA7BAR); | |
72 | ||
73 | /* de-assert reset for all CPUs */ | |
74 | writel_relaxed((readl_relaxed(p + CA15RESCNT) & ~0x0f) | 0xa5a50000, | |
75 | p + CA15RESCNT); | |
76 | writel_relaxed((readl_relaxed(p + CA7RESCNT) & ~0x0f) | 0x5a5a0000, | |
77 | p + CA7RESCNT); | |
78 | iounmap(p); | |
79 | ||
80 | r8a7790_sysc_init(); | |
06f2c5dc | 81 | shmobile_smp_apmu_suspend_init(); |
a48f1655 | 82 | } |