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e3da5b36 MD |
1 | /* |
2 | * r7s72100 processor support | |
3 | * | |
4 | * Copyright (C) 2013 Renesas Solutions Corp. | |
5 | * Copyright (C) 2013 Magnus Damm | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License as published by | |
9 | * the Free Software Foundation; version 2 of the License. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program; if not, write to the Free Software | |
18 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | |
19 | */ | |
20 | ||
21 | #include <linux/irq.h> | |
22 | #include <linux/kernel.h> | |
23 | #include <linux/of_platform.h> | |
f6ca6f11 | 24 | #include <linux/serial_sci.h> |
e3da5b36 | 25 | #include <mach/common.h> |
f6ca6f11 | 26 | #include <mach/irqs.h> |
e3da5b36 MD |
27 | #include <mach/r7s72100.h> |
28 | #include <asm/mach/arch.h> | |
29 | ||
f6ca6f11 MD |
30 | #define SCIF_DATA(index, baseaddr, irq) \ |
31 | [index] = { \ | |
32 | .type = PORT_SCIF, \ | |
33 | .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE, \ | |
34 | .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, \ | |
35 | .scbrr_algo_id = SCBRR_ALGO_2, \ | |
36 | .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE | \ | |
37 | SCSCR_REIE, \ | |
38 | .mapbase = baseaddr, \ | |
39 | .irqs = { irq + 1, irq + 2, irq + 3, irq }, \ | |
40 | } | |
41 | ||
42 | enum { SCIF0, SCIF1, SCIF2, SCIF3, SCIF4, SCIF5, SCIF6, SCIF7 }; | |
43 | ||
44 | static const struct plat_sci_port scif[] __initconst = { | |
45 | SCIF_DATA(SCIF0, 0xe8007000, gic_iid(221)), /* SCIF0 */ | |
46 | SCIF_DATA(SCIF1, 0xe8007800, gic_iid(225)), /* SCIF1 */ | |
47 | SCIF_DATA(SCIF2, 0xe8008000, gic_iid(229)), /* SCIF2 */ | |
48 | SCIF_DATA(SCIF3, 0xe8008800, gic_iid(233)), /* SCIF3 */ | |
49 | SCIF_DATA(SCIF4, 0xe8009000, gic_iid(237)), /* SCIF4 */ | |
50 | SCIF_DATA(SCIF5, 0xe8009800, gic_iid(241)), /* SCIF5 */ | |
51 | SCIF_DATA(SCIF6, 0xe800a000, gic_iid(245)), /* SCIF6 */ | |
52 | SCIF_DATA(SCIF7, 0xe800a800, gic_iid(249)), /* SCIF7 */ | |
53 | }; | |
54 | ||
55 | static inline void r7s72100_register_scif(int idx) | |
56 | { | |
57 | platform_device_register_data(&platform_bus, "sh-sci", idx, &scif[idx], | |
58 | sizeof(struct plat_sci_port)); | |
59 | } | |
60 | ||
61 | void __init r7s72100_add_dt_devices(void) | |
62 | { | |
63 | r7s72100_register_scif(SCIF0); | |
64 | r7s72100_register_scif(SCIF1); | |
65 | r7s72100_register_scif(SCIF2); | |
66 | r7s72100_register_scif(SCIF3); | |
67 | r7s72100_register_scif(SCIF4); | |
68 | r7s72100_register_scif(SCIF5); | |
69 | r7s72100_register_scif(SCIF6); | |
70 | r7s72100_register_scif(SCIF7); | |
71 | } | |
72 | ||
e3da5b36 MD |
73 | void __init r7s72100_init_early(void) |
74 | { | |
75 | shmobile_setup_delay(400, 1, 3); /* Cortex-A9 @ 400MHz */ | |
76 | } | |
77 | ||
78 | #ifdef CONFIG_USE_OF | |
79 | static const char *r7s72100_boards_compat_dt[] __initdata = { | |
80 | "renesas,r7s72100", | |
81 | NULL, | |
82 | }; | |
83 | ||
84 | DT_MACHINE_START(R7S72100_DT, "Generic R7S72100 (Flattened Device Tree)") | |
85 | .init_early = r7s72100_init_early, | |
86 | .dt_compat = r7s72100_boards_compat_dt, | |
87 | MACHINE_END | |
88 | #endif /* CONFIG_USE_OF */ |