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ccb7cc74 KM |
1 | /* |
2 | * r8a7778 processor support | |
3 | * | |
4 | * Copyright (C) 2013 Renesas Solutions Corp. | |
5 | * Copyright (C) 2013 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> | |
52421914 | 6 | * Copyright (C) 2013 Cogent Embedded, Inc. |
ccb7cc74 KM |
7 | * |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation; version 2 of the License. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | * GNU General Public License for more details. | |
ccb7cc74 KM |
16 | */ |
17 | ||
09c32427 | 18 | #include <linux/clk/renesas.h> |
ccb7cc74 | 19 | #include <linux/io.h> |
ccb7cc74 | 20 | #include <linux/irqchip.h> |
02c94f38 | 21 | |
ccb7cc74 | 22 | #include <asm/mach/arch.h> |
ccb7cc74 | 23 | |
fd44aa5e | 24 | #include "common.h" |
ccb7cc74 | 25 | |
43cbec85 UH |
26 | #define MODEMR 0xffcc0020 |
27 | ||
43cbec85 UH |
28 | static void __init r8a7778_timer_init(void) |
29 | { | |
30 | u32 mode; | |
31 | void __iomem *modemr = ioremap_nocache(MODEMR, 4); | |
32 | ||
33 | BUG_ON(!modemr); | |
34 | mode = ioread32(modemr); | |
35 | iounmap(modemr); | |
36 | r8a7778_clocks_init(mode); | |
37 | } | |
43cbec85 | 38 | |
ccb7cc74 KM |
39 | #define INT2SMSKCR0 0x82288 /* 0xfe782288 */ |
40 | #define INT2SMSKCR1 0x8228c /* 0xfe78228c */ | |
41 | ||
42 | #define INT2NTSR0 0x00018 /* 0xfe700018 */ | |
43 | #define INT2NTSR1 0x0002c /* 0xfe70002c */ | |
20e73335 GU |
44 | |
45 | static void __init r8a7778_init_irq_dt(void) | |
ccb7cc74 KM |
46 | { |
47 | void __iomem *base = ioremap_nocache(0xfe700000, 0x00100000); | |
48 | ||
49 | BUG_ON(!base); | |
50 | ||
54aa4c48 | 51 | irqchip_init(); |
4baadb9e | 52 | |
ccb7cc74 KM |
53 | /* route all interrupts to ARM */ |
54 | __raw_writel(0x73ffffff, base + INT2NTSR0); | |
55 | __raw_writel(0xffffffff, base + INT2NTSR1); | |
56 | ||
57 | /* unmask all known interrupts in INTCS2 */ | |
58 | __raw_writel(0x08330773, base + INT2SMSKCR0); | |
59 | __raw_writel(0x00311110, base + INT2SMSKCR1); | |
60 | ||
61 | iounmap(base); | |
62 | } | |
63 | ||
19c233b7 | 64 | static const char *const r8a7778_compat_dt[] __initconst = { |
ccb7cc74 KM |
65 | "renesas,r8a7778", |
66 | NULL, | |
67 | }; | |
68 | ||
69 | DT_MACHINE_START(R8A7778_DT, "Generic R8A7778 (Flattened Device Tree)") | |
92ee341e | 70 | .init_early = shmobile_init_delay, |
ccb7cc74 | 71 | .init_irq = r8a7778_init_irq_dt, |
7759a7a8 | 72 | .init_late = shmobile_init_late, |
43cbec85 | 73 | .init_time = r8a7778_timer_init, |
ccb7cc74 KM |
74 | .dt_compat = r8a7778_compat_dt, |
75 | MACHINE_END |