Commit | Line | Data |
---|---|---|
f411fade MD |
1 | /* |
2 | * r8a7779 processor support | |
3 | * | |
dace48d0 | 4 | * Copyright (C) 2011, 2013 Renesas Solutions Corp. |
f411fade | 5 | * Copyright (C) 2011 Magnus Damm |
dace48d0 | 6 | * Copyright (C) 2013 Cogent Embedded, Inc. |
f411fade MD |
7 | * |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation; version 2 of the License. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | * GNU General Public License for more details. | |
f411fade | 16 | */ |
09c32427 | 17 | #include <linux/clk/renesas.h> |
131c2e04 | 18 | #include <linux/clocksource.h> |
f411fade | 19 | #include <linux/init.h> |
f411fade | 20 | #include <linux/irq.h> |
5b3859d7 KM |
21 | #include <linux/irqchip.h> |
22 | #include <linux/irqchip/arm-gic.h> | |
1b55353c | 23 | |
f411fade | 24 | #include <asm/mach/arch.h> |
3e353b87 | 25 | #include <asm/mach/map.h> |
1b55353c | 26 | |
fd44aa5e | 27 | #include "common.h" |
1b55353c | 28 | #include "r8a7779.h" |
3e353b87 MD |
29 | |
30 | static struct map_desc r8a7779_io_desc[] __initdata = { | |
3e940958 | 31 | /* 2M identity mapping for 0xf0000000 (MPCORE) */ |
3e353b87 MD |
32 | { |
33 | .virtual = 0xf0000000, | |
34 | .pfn = __phys_to_pfn(0xf0000000), | |
35 | .length = SZ_2M, | |
36 | .type = MT_DEVICE_NONSHARED | |
37 | }, | |
3e940958 | 38 | /* 16M identity mapping for 0xfexxxxxx (DMAC-S/HPBREG/INTC2/LRAM/DBSC) */ |
3e353b87 MD |
39 | { |
40 | .virtual = 0xfe000000, | |
41 | .pfn = __phys_to_pfn(0xfe000000), | |
42 | .length = SZ_16M, | |
43 | .type = MT_DEVICE_NONSHARED | |
44 | }, | |
45 | }; | |
46 | ||
c99cd90d | 47 | static void __init r8a7779_map_io(void) |
3e353b87 | 48 | { |
7a2071c5 | 49 | debug_ll_io_init(); |
3e353b87 MD |
50 | iotable_init(r8a7779_io_desc, ARRAY_SIZE(r8a7779_io_desc)); |
51 | } | |
f411fade | 52 | |
5b3859d7 KM |
53 | /* IRQ */ |
54 | #define INT2SMSKCR0 IOMEM(0xfe7822a0) | |
55 | #define INT2SMSKCR1 IOMEM(0xfe7822a4) | |
56 | #define INT2SMSKCR2 IOMEM(0xfe7822a8) | |
57 | #define INT2SMSKCR3 IOMEM(0xfe7822ac) | |
58 | #define INT2SMSKCR4 IOMEM(0xfe7822b0) | |
59 | ||
60 | #define INT2NTSR0 IOMEM(0xfe700060) | |
61 | #define INT2NTSR1 IOMEM(0xfe700064) | |
62 | ||
c99cd90d | 63 | static void __init r8a7779_init_irq_dt(void) |
31e4e292 | 64 | { |
5b3859d7 | 65 | irqchip_init(); |
c99cd90d | 66 | |
5b3859d7 KM |
67 | /* route all interrupts to ARM */ |
68 | __raw_writel(0xffffffff, INT2NTSR0); | |
69 | __raw_writel(0x3fffffff, INT2NTSR1); | |
70 | ||
71 | /* unmask all known interrupts in INTCS2 */ | |
72 | __raw_writel(0xfffffff0, INT2SMSKCR0); | |
73 | __raw_writel(0xfff7ffff, INT2SMSKCR1); | |
74 | __raw_writel(0xfffbffdf, INT2SMSKCR2); | |
75 | __raw_writel(0xbffffffc, INT2SMSKCR3); | |
76 | __raw_writel(0x003fee3f, INT2SMSKCR4); | |
77 | } | |
78 | ||
3e05f24a SH |
79 | #define MODEMR 0xffcc0020 |
80 | ||
c99cd90d | 81 | static u32 __init r8a7779_read_mode_pins(void) |
10e8d4f6 | 82 | { |
3e05f24a SH |
83 | static u32 mode; |
84 | static bool mode_valid; | |
85 | ||
86 | if (!mode_valid) { | |
87 | void __iomem *modemr = ioremap_nocache(MODEMR, PAGE_SIZE); | |
88 | BUG_ON(!modemr); | |
89 | mode = ioread32(modemr); | |
90 | iounmap(modemr); | |
91 | mode_valid = true; | |
92 | } | |
10e8d4f6 | 93 | |
3e05f24a | 94 | return mode; |
10e8d4f6 SH |
95 | } |
96 | ||
131c2e04 MD |
97 | static void __init r8a7779_init_time(void) |
98 | { | |
99 | r8a7779_clocks_init(r8a7779_read_mode_pins()); | |
3722ed23 | 100 | clocksource_probe(); |
131c2e04 MD |
101 | } |
102 | ||
19c233b7 | 103 | static const char *const r8a7779_compat_dt[] __initconst = { |
10e8d4f6 SH |
104 | "renesas,r8a7779", |
105 | NULL, | |
106 | }; | |
107 | ||
abe0e14b | 108 | DT_MACHINE_START(R8A7779_DT, "Generic R8A7779 (Flattened Device Tree)") |
44ade5ed | 109 | .smp = smp_ops(r8a7779_smp_ops), |
10e8d4f6 | 110 | .map_io = r8a7779_map_io, |
0157b626 | 111 | .init_early = shmobile_init_delay, |
131c2e04 | 112 | .init_time = r8a7779_init_time, |
10e8d4f6 | 113 | .init_irq = r8a7779_init_irq_dt, |
d5b00b90 | 114 | .init_late = shmobile_init_late, |
10e8d4f6 SH |
115 | .dt_compat = r8a7779_compat_dt, |
116 | MACHINE_END |